Chris Lattner
ded5762e28
update various tests for signedness changes in .s file.
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llvm-svn: 81289
2009-09-08 23:51:06 +00:00
Chris Lattner
837420e12f
adjust for signedness change. I'd appreciate it if an ARM flavored person
...
could look at this: the top undefined bits of an immediate shouldn't affect
isel (cmp vs cmp.w)
llvm-svn: 81288
2009-09-08 23:44:53 +00:00
Chris Lattner
09a6252bb8
merge thumb2-bic2.ll into thumb2-bic.ll and update for signedness changes.
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llvm-svn: 81285
2009-09-08 23:41:06 +00:00
Chris Lattner
a97bedf017
tweak this to pass on linux.
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llvm-svn: 81273
2009-09-08 23:32:40 +00:00
Chris Lattner
840fbf6897
convert to filecheck syntax
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llvm-svn: 81267
2009-09-08 23:16:26 +00:00
Chris Lattner
0b34068b2b
change selectiondag to add the sign extended versions of immediate operands
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to instructions instead of zero extended ones. This makes the asmprinter
print signed values more consistently. This apparently only really affects
the X86 backend.
llvm-svn: 81265
2009-09-08 23:05:44 +00:00
Anton Korobeynikov
2b6ef7724e
Unbreak getOnesVector() / getZeroVector() to use valid ARM extended imm's.
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llvm-svn: 81262
2009-09-08 22:51:43 +00:00
Chris Lattner
7aff10755c
filecheckize some tests
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llvm-svn: 81259
2009-09-08 22:38:46 +00:00
Dan Gohman
c95df8b6d8
Use opt -S instead of piping bitcode output through llvm-dis.
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llvm-svn: 81257
2009-09-08 22:34:10 +00:00
Dan Gohman
8d84372836
Change these tests to feed the assembly files to opt directly, instead
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of using llvm-as, now that opt supports this.
llvm-svn: 81226
2009-09-08 16:50:01 +00:00
Anton Korobeynikov
0b3a620d60
Add NEON 'laned' operations. This fixes another bunch of gcc testsuite fails and
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makes the code faster.
llvm-svn: 81220
2009-09-08 15:22:32 +00:00
Anton Korobeynikov
a3c4db1161
Unbreak
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llvm-svn: 81205
2009-09-08 07:30:03 +00:00
Evan Cheng
e1047f16e4
When remat'ing and destination virtual register has a sub-register index. Make sure the sub-register class matches the register class of the remat'ed instruction definition register class.
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llvm-svn: 81204
2009-09-08 06:39:07 +00:00
Chris Lattner
6c02945d93
disable some irrelevant eh emission
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llvm-svn: 81200
2009-09-08 06:26:40 +00:00
Chris Lattner
2e9f3b2865
fix PR4767, a crash because fp stackifier visited blocks in
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depth first order, so it wouldn't process unreachable blocks.
When compiling at -O0, late dead block elimination isn't done
and the bad instructions got to isel.
llvm-svn: 81187
2009-09-08 04:55:44 +00:00
Dan Gohman
8f7b263087
Fix an abort on a store of an empty struct member. getValue returns
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null in the case of an empty struct, so don't try to call getNumValues
on it.
llvm-svn: 81180
2009-09-08 01:44:02 +00:00
Dan Gohman
572ecc26b6
Fix a thinko: When lowering fneg with xor, bitcast the operands
...
from floating-point to integer first, and bitcast the result
back to floating-point. Previously, this test was passing by
falling back to SelectionDAG lowering. The resulting code isn't
as nice, but it's correct and CodeGen now stays on the fast path.
llvm-svn: 81171
2009-09-07 23:47:14 +00:00
Daniel Dunbar
ec3b6229d8
Don't depend on arch specific global prefix.
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llvm-svn: 81084
2009-09-05 11:53:06 +00:00
Daniel Dunbar
a953c39b9e
Eliminate uses of %prcontext.
...
- I'd appreciate it if someone else eyeballs my changes to make sure I captured
the intent of the test.
llvm-svn: 81083
2009-09-05 11:35:16 +00:00
Bob Wilson
013dfaa93a
Stabilize the order of live intervals in the priority_queue used by the
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linear scan reg alloc. This fixes a problem I ran into where extracting
a function from a larger file caused the generated code to change (masking
the problem I was trying to debug) because the allocator behaved differently.
This changes the results for two X86 regression checks. stack-color-with-reg
is improved, with one less instruction, but pr3495 is worse, with one more
copy. As far as I can tell, these tests were just getting lucky or unlucky,
so I've changed the expected results.
llvm-svn: 81060
2009-09-05 01:19:16 +00:00
Evan Cheng
46e40befe7
Run branch folding if if-converter make some transformations.
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llvm-svn: 80994
2009-09-04 07:47:40 +00:00
Daniel Dunbar
2a64e85835
Remove stale greps.
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llvm-svn: 80986
2009-09-04 05:07:52 +00:00
Bob Wilson
25410ac604
Convert tests to FileCheck.
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llvm-svn: 80983
2009-09-04 04:07:19 +00:00
Bob Wilson
9e02907942
Convert a test to FileCheck.
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llvm-svn: 80975
2009-09-04 00:32:31 +00:00
Dan Gohman
c24fb1af4f
LLVM currently represents floating-point negation as -0.0 - x. Fix
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FastISel to recognize this pattern and emit a floating-point
negation using xor.
llvm-svn: 80963
2009-09-03 22:53:57 +00:00
Daniel Dunbar
75c14da75f
Remove dead greps.
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llvm-svn: 80946
2009-09-03 20:59:02 +00:00
Dan Gohman
69e9573064
Recognize more opportunities to use SSE min and max instructions,
...
swapping the operands if necessary.
llvm-svn: 80940
2009-09-03 20:34:31 +00:00
Mon P Wang
24516ac0ca
Test cases for vector shifts changes r80935
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Changed the old vector shift test to use FileCheck
llvm-svn: 80936
2009-09-03 19:57:35 +00:00
Evan Cheng
41e87f2f13
Reference to hidden symbols do not have to go through non-lazy pointer in non-pic mode. rdar://7187172.
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llvm-svn: 80904
2009-09-03 07:04:02 +00:00
Chris Lattner
e460c8f660
merge all the basic linux/32 pic tests together into one test.
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llvm-svn: 80902
2009-09-03 06:29:23 +00:00
Chris Lattner
51fec7f6f6
rename test
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llvm-svn: 80901
2009-09-03 06:16:49 +00:00
Anton Korobeynikov
7125d63acf
More missed vdup patterns
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llvm-svn: 80838
2009-09-02 21:21:28 +00:00
Bob Wilson
6972a16bbc
Add support for generating code for vst{234}lane intrinsics.
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llvm-svn: 80707
2009-09-01 18:51:56 +00:00
Bob Wilson
75b2b04e1e
Fix incorrect declarations of intrinsics in this test.
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llvm-svn: 80705
2009-09-01 18:50:43 +00:00
Bob Wilson
d638cc8869
Add test for vld{234}_lane instructions.
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llvm-svn: 80658
2009-09-01 04:27:10 +00:00
Bob Wilson
03f5a5bfff
Fix pr4843: When an instruction has multiple destination registers that are
...
tied to different source registers, the TwoAddressInstructionPass needs to
be smarter. Change it to check before replacing a source register whether
that source register is tied to a different destination register, and if so,
defer handling it until a subsequent iteration.
llvm-svn: 80654
2009-09-01 04:18:40 +00:00
Jim Grosbach
4e0e9a4870
SJLJ is arm/darwin only for now. force the triple for the test
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llvm-svn: 80651
2009-09-01 02:34:49 +00:00
Jim Grosbach
9a220088ac
Clean up LSDA name generation and use for SJLJ exception handling. This
...
makes an eggregious hack somewhat more palatable. Bringing the LSDA forward
and making it a GV available for reference would be even better, but is
beyond the scope of what I'm looking to solve at this point.
Objective C++ code could generate function names that broke the previous
scheme. This fixes that.
llvm-svn: 80649
2009-09-01 01:57:56 +00:00
David Goodwin
0fc3764297
Don't mark a register live at an undef use.
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llvm-svn: 80621
2009-08-31 20:47:02 +00:00
Evan Cheng
493eee1fc7
Remove .n suffix for some 16-bit opcodes now that Darwin assembler is fixed.
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llvm-svn: 80615
2009-08-31 20:14:07 +00:00
Chris Lattner
f32c2d890c
eliminate some uses of prcontext. Any help here would be appreciated :)
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llvm-svn: 80520
2009-08-30 21:45:23 +00:00
Anton Korobeynikov
17529667db
Add missed pattern
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llvm-svn: 80502
2009-08-30 19:06:39 +00:00
Anton Korobeynikov
a261afbf14
EXTRACT_VECTOR_ELEMENT can have result type different from element type.
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Remove the assertion and generalize the code for ARM NEON stuff.
llvm-svn: 80498
2009-08-30 17:14:54 +00:00
Dan Gohman
f7b76078bb
CMOV_GR8 clobbers EFLAGS when its expansion involves an xor to set
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a register to 0. This fixes PR4814.
llvm-svn: 80445
2009-08-29 22:19:15 +00:00
Anton Korobeynikov
b2e6f5eed4
Do not assert on too wide splats we don't support.
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llvm-svn: 80409
2009-08-29 00:08:18 +00:00
Anton Korobeynikov
9fd6082c10
Add missed extract_element pattern
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llvm-svn: 80408
2009-08-28 23:41:26 +00:00
Evan Cheng
d7a07ab112
Let Darwin linker auto-synthesize stubs and lazy-pointers. This deletes a bunch of nasty code in ARM asm printer.
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llvm-svn: 80404
2009-08-28 23:18:09 +00:00
Evan Cheng
2d5d3700e9
v4, v5 does not support sxtb / sxth.
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llvm-svn: 80322
2009-08-28 00:31:43 +00:00
Anton Korobeynikov
cb0fdc4505
scalar_to_vector is fully legal now (implemented as subreg accesses)
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llvm-svn: 80249
2009-08-27 16:04:47 +00:00
Anton Korobeynikov
e17a92c545
Ok, sometimes it's profitable to turn scalar_to_vector stuff into subreg access.
...
Add a testcase.
llvm-svn: 80246
2009-08-27 14:51:42 +00:00
Evan Cheng
984f8efcaa
Fix PR4789. Teach eliminateFrameIndex how to handle VLDRQ and VSTRQ which cannot fold any immediate offset.
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llvm-svn: 80191
2009-08-27 01:23:50 +00:00
Dan Gohman
60fae1b2a2
X86FastISel support for loading and storing values of type i1.
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llvm-svn: 80186
2009-08-27 00:31:47 +00:00
Dan Gohman
613d152216
Expand i8 selects into control flow instead of 16-bit conditional
...
moves. This avoids the need to promote the operands (or implicitly
extend them, a partial register update condition), and can reduce
i8 register pressure. This substantially speeds up code such as
write_hex in lib/Support/raw_ostream.cpp.
subclass-coalesce.ll is too trivial and no longer tests what it was
originally intended to test.
llvm-svn: 80184
2009-08-27 00:14:12 +00:00
Bob Wilson
c7d92cfb15
Convert some more Neon tests to FileCheck.
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llvm-svn: 80120
2009-08-26 18:11:50 +00:00
Dale Johannesen
ca67bcd630
Alter 79292 to produce output that actually assembles.
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llvm-svn: 80119
2009-08-26 18:10:32 +00:00
Anton Korobeynikov
1c904039ce
Expand scalar_to_vector - we don't have any isel logic for it now
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llvm-svn: 80107
2009-08-26 16:26:09 +00:00
Dan Gohman
6bd4a58365
Don't use INSERT_SUBREG to model anyext operations on x86-64, as it
...
leads to partial-register definitions. To help avoid redundant
zero-extensions, also teach the h-register matching patterns that
use movzbl to match anyext as well as zext.
llvm-svn: 80099
2009-08-26 14:59:13 +00:00
Anton Korobeynikov
6ee3a73ba1
Add dummy inline asm handling for 'r' constraint. This fixes PR4778
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llvm-svn: 80085
2009-08-26 13:44:29 +00:00
Scott Michel
d9d9c7ef05
Updated i128 sext support for CellSPU backend, contributed by Ken Werner (IBM)
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llvm-svn: 80042
2009-08-25 22:37:34 +00:00
Chris Lattner
8d793c7b81
remove some dead lines.
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llvm-svn: 80031
2009-08-25 21:01:56 +00:00
Chris Lattner
102e6780cf
convert to filecheck style
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llvm-svn: 80029
2009-08-25 20:57:38 +00:00
Chris Lattner
70bb855eb0
convert to filecheck
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llvm-svn: 80025
2009-08-25 20:49:04 +00:00
Daniel Dunbar
e3e4e68583
Switch abi-isel.ll to FileCheck; it's not much faster, but it now tests a lot
...
more and is much nicer to the OS.
- Dan, please check. If there are parts of the test you think I should strip
out so it doesn't cause random failures let me know (there are still some PIC
label numbers in it, for example).
llvm-svn: 80019
2009-08-25 18:45:03 +00:00
David Goodwin
047f69da86
Fixup register kills after scheduling.
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llvm-svn: 80002
2009-08-25 17:03:05 +00:00
Anton Korobeynikov
b388728ba7
Provide dynamic_stackalloc lowering for MSP430.
...
This fixes PR4769
llvm-svn: 80001
2009-08-25 17:00:23 +00:00
Dan Gohman
bf08e82d8e
Remove obsolete -f flags.
...
llvm-svn: 79992
2009-08-25 15:38:29 +00:00
Dale Johannesen
b8888477db
Fix PR 4751, another difficulty with %a modifier on x86.
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llvm-svn: 79961
2009-08-25 00:16:14 +00:00
Scott Michel
ad0e6ad80f
- Remove SelectSEXTi128 from SPUISelDAGToDAG.cpp, evidently, this is redundant
...
code, according to Anton (I'm not totally convinced, but we can always
resurrect patches if we need to do so.)
- Start moving CellSPU's tests to prefer FileCheck.
llvm-svn: 79958
2009-08-24 23:57:35 +00:00
Scott Michel
3444be8f21
Prefer 'FileCheck' over 'grep'.
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llvm-svn: 79953
2009-08-24 22:49:22 +00:00
Scott Michel
ee51c50e21
128-bit sign extension and vector shift cleanups, contributed by Ken Werner
...
(IBM).
llvm-svn: 79949
2009-08-24 22:28:53 +00:00
Bob Wilson
af26d40dc0
Fix a typo. Somehow I thought this had passed before, but I guess not.
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llvm-svn: 79937
2009-08-24 21:17:17 +00:00
Bob Wilson
fadb065745
Convert slow test to use FileCheck.
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llvm-svn: 79935
2009-08-24 20:33:47 +00:00
Daniel Dunbar
60ce8bad43
Convert two gratuitous abuses of poor helpless CPU cycles to FileCheck.
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llvm-svn: 79933
2009-08-24 20:08:27 +00:00
Dale Johannesen
add8a314dd
Split test into 3.
...
llvm-svn: 79926
2009-08-24 17:51:19 +00:00
Dale Johannesen
3a5e5c7edd
Make linkerprivate work for ARM and PPC. Testcase covers
...
all Darwin targets; could be split into separate tests for
the chip subdirectories, but from Chris' last mail on testing
I assume he'd rather have only one test. Generic seems to be
the best available, maybe there should be a Darwin subdirectory?
llvm-svn: 79877
2009-08-24 01:03:42 +00:00
Daniel Dunbar
cb45f3cb4a
Rerevert (r75663 and r76805), seems there is more non-determinism.
...
llvm-svn: 79856
2009-08-23 17:26:24 +00:00
Jakob Stoklund Olesen
291647e0d9
Fix PR4753.
...
When undoing a reuse in ReuseInfo::GetRegForReload, check if it was only a
sub-register being used. The MachineOperand::getSubReg() method is only valid
for virtual registers, so we have to recover the sub-register index manually.
llvm-svn: 79855
2009-08-23 13:01:45 +00:00
Daniel Dunbar
f2e39b8c6d
Speculatively revert r76823 (i.e., reapply r75663 and r76805) to see if the real
...
problem is fixed by the TableGen determinism fix.
llvm-svn: 79851
2009-08-23 10:44:51 +00:00
Eli Friedman
79615641f1
Make x86 test actually test x86 code generation. Fix the
...
construct on ARM, which was breaking by coincidence, and add a similar
testcase for ARM.
llvm-svn: 79719
2009-08-22 03:13:10 +00:00
Chris Lattner
cf54f19140
rename test, make more specific.
...
llvm-svn: 79712
2009-08-22 00:44:24 +00:00
Anton Korobeynikov
0fe74b95a5
Add missing RUN line
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llvm-svn: 79707
2009-08-22 00:28:50 +00:00
Anton Korobeynikov
833c9c6163
Reduce the test
...
llvm-svn: 79703
2009-08-22 00:18:11 +00:00
Bob Wilson
79c0af15d0
Use CHECK-NEXT to make sure we're only getting one copy of each shuffle
...
instruction.
llvm-svn: 79702
2009-08-22 00:13:23 +00:00
Bob Wilson
6d4400e852
Match VTRN, VZIP, and VUZP shuffles. Restore the tests for these operations,
...
now using shuffles instead of intrinsics.
llvm-svn: 79673
2009-08-21 20:54:19 +00:00
Anton Korobeynikov
9458a8c84d
Add fcopysign instructions
...
llvm-svn: 79664
2009-08-21 20:02:37 +00:00
Anton Korobeynikov
a706ea5720
Handle 'r' inline asm constraint
...
llvm-svn: 79648
2009-08-21 18:15:41 +00:00
Bob Wilson
0da4ec0046
Add some tests for vext.16 and vext.32.
...
llvm-svn: 79638
2009-08-21 16:35:24 +00:00
Bob Wilson
c046b62f1a
Remove Neon intrinsics for VZIP, VUZP, and VTRN. We will represent these as
...
vector shuffles. Temporarily remove the tests for these operations until the
new implementation is working.
llvm-svn: 79579
2009-08-21 00:01:42 +00:00
Dale Johannesen
f6b2759c5e
Use FileCheck even though this means testing for something
...
that has nothing to do with the point of the test, per Chris.
llvm-svn: 79569
2009-08-20 22:12:08 +00:00
Dan Gohman
f2f57ebc84
Fix an x86 code size regression: prefer RIP-relative addressing
...
over absolute addressing even in non-PIC mode (unless the address
has an index or something else incompatible), because it has a
smaller encoding.
llvm-svn: 79553
2009-08-20 18:23:44 +00:00
Evan Cheng
86546fb692
Fix an obvious copy-n-paste bug.
...
llvm-svn: 79535
2009-08-20 17:01:04 +00:00
Dale Johannesen
facc542d5e
Use FileCheck for the test run where it's appropriate.
...
llvm-svn: 79534
2009-08-20 16:58:04 +00:00
Dale Johannesen
fc8ee02c25
Handle 'a' modifier in X86 asms. PR 4742.
...
llvm-svn: 79484
2009-08-19 22:44:41 +00:00
Bill Wendling
a62629a929
Make this test platform neutral.
...
llvm-svn: 79447
2009-08-19 18:51:45 +00:00
Dan Gohman
eb6fbd7fd1
Add an x86 peep that narrows TEST instructions to forms that use
...
a smaller encoding. These kinds of patterns are very frequent in
sqlite3, for example.
llvm-svn: 79439
2009-08-19 18:16:17 +00:00
Bob Wilson
fae9057bf0
Add support for Neon VEXT (vector extract) shuffles.
...
This is derived from a patch by Anton Korzh. I modified it to recognize
the VEXT shuffles during legalization and lower them to a target-specific
DAG node.
llvm-svn: 79428
2009-08-19 17:03:43 +00:00
Eli Friedman
914b41055a
PR4737: Fix a nasty bug in load narrowing with non-power-of-two types.
...
llvm-svn: 79415
2009-08-19 08:46:10 +00:00
Dan Gohman
56c2c54a37
Legalize the shift amount operand of SRL_PARTS, SHL_PARTS, and
...
SRA_PARTS, as is done for SRL, SHL, and SRA.
llvm-svn: 79380
2009-08-18 23:36:17 +00:00
Richard Osborne
a3a49aeee0
Add support for mergeable sections back into the XCore backend.
...
llvm-svn: 79368
2009-08-18 21:14:31 +00:00
Richard Osborne
84785e0714
Put data with relocations in the same sections as data without relocations.
...
llvm-svn: 79351
2009-08-18 17:58:17 +00:00