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Commit Graph

201 Commits

Author SHA1 Message Date
Dan Gohman
904f081ce7 Add nounwind to a few tests.
llvm-svn: 72002
2009-05-18 15:16:49 +00:00
Bob Wilson
16f684a429 Fix pr4195: When iterating through predecessor blocks, break out of the loop
after finding the (unique) layout predecessor.  Sometimes a block may be listed
more than once, and processing it more than once in this loop can lead to
inconsistent values for FtTBB/FtFBB, since the AnalyzeBranch method does not
clear these values.  There's no point in continuing the loop regardless.
The testcase for this is reduced from the 2003-05-02-DependentPHI SingleSource
test.

llvm-svn: 71536
2009-05-12 03:48:10 +00:00
Bob Wilson
d61f4e70d8 Fix pr4100. Do not remove no-op copies when they are dead. The register
scavenger gets confused about register liveness if it doesn't see them.
I'm not thrilled with this solution, but it only comes up when there are dead
copies in the code, which is something that hopefully doesn't happen much.

Here is what happens in pr4100: As shown in the following excerpt from the
debug output of llc, the source of a move gets reloaded from the stack,
inserting a new load instruction before the move.  Since that source operand
is a kill, the physical register is free to be reused for the destination
of the move.  The move ends up being a no-op, copying R3 to R3, so it is
deleted.  But, it leaves behind the load to reload %reg1028 into R3, and
that load is not updated to show that it's destination operand (R3) is dead.
The scavenger gets confused by that load because it thinks that R3 is live.

Starting RegAlloc of: %reg1025<def,dead> = MOVr %reg1028<kill>, 14, %reg0, %reg0
  Regs have values: 
  Reloading %reg1028 into R3
  Last use of R3[%reg1028], removing it from live set
  Assigning R3 to %reg1025
  Register R3 [%reg1025] is never used, removing it from live set

Alternative solutions might be either marking the load as dead, or zapping
the load along with the no-op copy.  I couldn't see an easy way to do
either of those, though.

llvm-svn: 71196
2009-05-07 23:47:03 +00:00
Evan Cheng
0ee6696fd8 Do not use register as base ptr of pre- and post- inc/dec load / store nodes.
llvm-svn: 71098
2009-05-06 18:25:01 +00:00
Dan Gohman
a79cce4aef Previously, RecursivelyDeleteDeadInstructions provided an option
of returning a list of pointers to Values that are deleted. This was
unsafe, because the pointers in the list are, by nature of what
RecursivelyDeleteDeadInstructions does, always dangling. Replace this
with a simple callback mechanism. This may eventually be removed if
all clients can reasonably be expected to use CallbackVH.

Use this to factor out the dead-phi-cycle-elimination code from LSR
utility function, and generalize it to use the
RecursivelyDeleteTriviallyDeadInstructions utility function.

This makes LSR more aggressive about eliminating dead PHI cycles;
adjust tests to either be less trivial or to simply expect fewer
instructions.

llvm-svn: 70636
2009-05-02 18:29:22 +00:00
Bob Wilson
b3e4773035 Rename file to have the correct suffix.
llvm-svn: 69380
2009-04-17 20:40:20 +00:00
Bob Wilson
b8756b00cd Use CallConvLower.h and TableGen descriptions of the calling conventions
for ARM.  Patch by Sandeep Patel.

llvm-svn: 69371
2009-04-17 19:07:39 +00:00
Dan Gohman
98aa1d9693 Expand GEPs in ScalarEvolution expressions. SCEV expressions can now
have pointer types, though in contrast to C pointer types, SCEV
addition is never implicitly scaled. This not only eliminates the
need for special code like IndVars' EliminatePointerRecurrence
and LSR's own GEP expansion code, it also does a better job because
it lets the normal optimizations handle pointer expressions just
like integer expressions.

Also, since LLVM IR GEPs can't directly index into multi-dimensional
VLAs, moving the GEP analysis out of client code and into the SCEV
framework makes it easier for clients to handle multi-dimensional
VLAs the same way as other arrays.

Some existing regression tests show improved optimization.
test/CodeGen/ARM/2007-03-13-InstrSched.ll in particular improved to
the point where if-conversion started kicking in; I turned it off
for this test to preserve the intent of the test.

llvm-svn: 69258
2009-04-16 03:18:22 +00:00
Dale Johannesen
862ade6f10 Use the output of the asm so the optimizer won't
delete it.

llvm-svn: 69018
2009-04-14 01:51:40 +00:00
Chris Lattner
42b8e431b6 move a target-specific test into its directory so it isn't run if you
don't configure the ARM target in.

llvm-svn: 68843
2009-04-10 23:58:38 +00:00
Bob Wilson
c53238dff1 Fix pr3954. The register scavenger asserts for inline assembly with
register destinations that are tied to source operands.  The
TargetInstrDescr::findTiedToSrcOperand method silently fails for inline
assembly.  The existing MachineInstr::isRegReDefinedByTwoAddr was very
close to doing what is needed, so this revision makes a few changes to
that method and also renames it to isRegTiedToUseOperand (for consistency
with the very similar isRegTiedToDefOperand and because it handles both
two-address instructions and inline assembly with tied registers).

llvm-svn: 68714
2009-04-09 17:16:43 +00:00
Bob Wilson
e0e4a070da Add testcase for PR3795.
llvm-svn: 68620
2009-04-08 18:00:55 +00:00
Duncan Sands
d0e186d90f Soft float support for FREM.
llvm-svn: 68614
2009-04-08 16:20:57 +00:00
Duncan Sands
ee34b0d05d Soft float support for undef. Reported by Xerxes Rånby.
llvm-svn: 68607
2009-04-08 13:33:37 +00:00
Bob Wilson
39c7bec188 Handle 'a' modifier in ARM inline assembly.
Patch by Richard Pennington.

llvm-svn: 68464
2009-04-06 21:46:51 +00:00
Bob Wilson
5b42ebe6a9 Fix PR3862: Recognize some ARM-specific constraints for immediates in inline
assembly.

llvm-svn: 68218
2009-04-01 17:58:54 +00:00
Evan Cheng
b3196f1298 Do not emit comments unless -asm-verbose.
llvm-svn: 67580
2009-03-24 00:17:40 +00:00
Chris Lattner
a5368fd283 add no-unwind, remove duplicate run line.
llvm-svn: 66775
2009-03-12 05:56:37 +00:00
Evan Cheng
3c9a084a1b ARM isLegalAddressImmediate should check if type is a simple type now that optimizer can create values of funky scalar types.
llvm-svn: 66429
2009-03-09 19:15:00 +00:00
Evan Cheng
67ccd79e39 Recognize triplets starting with armv5-, armv6- etc. And set the ARM arch version accordingly.
llvm-svn: 66365
2009-03-08 04:02:49 +00:00
Evan Cheng
483ece4d2e If a MI uses the same register more than once, only mark one of them as 'kill'.
llvm-svn: 66363
2009-03-08 03:58:35 +00:00
Evan Cheng
9c3ce7905e Last commit accidentially deleted this code.
llvm-svn: 65679
2009-02-28 06:02:14 +00:00
Evan Cheng
86fc9440db The last commit was overly conservative. It's ok to reuse value that's already marked livein.
llvm-svn: 65498
2009-02-26 03:02:21 +00:00
Evan Cheng
41687ff389 If a use operand is marked isKill, don't forget to add kill to its live interval as well.
llvm-svn: 65279
2009-02-22 08:35:56 +00:00
Evan Cheng
2e0cf05ad2 A couple of places where reused use operands should be marked kill. This is exposed by recent availability fallthrough changes.
llvm-svn: 64745
2009-02-17 06:41:03 +00:00
Evan Cheng
19a1ba3680 Replace one of burr scheduling heuristic with something more sensible. Now calcMaxScratches simply compute the number of true data dependencies. This actually improve a couple of tests in dejagnu suite as many tests in llvm nightly test suite.
llvm-svn: 64369
2009-02-12 08:59:45 +00:00
Evan Cheng
5be1afd928 Fix PR3457: Ignore control successors when looking for closest scheduled successor. A control successor doesn't read result(s) produced by the scheduling unit being evaluated.
llvm-svn: 64210
2009-02-10 08:30:11 +00:00
Evan Cheng
3f98669da2 Re-enable machine sinking pass now that the coalescer bugs and the AnalyzeBrnach bug are fixed.
llvm-svn: 64126
2009-02-09 08:45:39 +00:00
Bill Wendling
4ed0306d6f Revert r63999. It was breaking self-hosting builds.
llvm-svn: 64062
2009-02-08 00:58:05 +00:00
Evan Cheng
62694a52fe Enable machine sinking pass in non-fast mode.
llvm-svn: 63999
2009-02-07 01:57:46 +00:00
Evan Cheng
b36e3e34e7 Turn on machine LICM in non-fast mode.
llvm-svn: 63855
2009-02-05 08:46:33 +00:00
Rafael Espindola
0aba6c9435 Add the private linkage.
llvm-svn: 62279
2009-01-15 20:18:42 +00:00
Evan Cheng
5c92d425a9 Clean up some ARM GV asm printing out; minor fixes to match what gcc does.
llvm-svn: 60621
2008-12-06 02:00:55 +00:00
Evan Cheng
2805dcc9a0 - Register scavenger should use MachineRegisterInfo and internal map to find the first use of a register after a given machine instruction.
- When scavenging a register, in addition to the spill, insert a restore before the first use.
- Abort if client is looking to scavenge a register even when a previously scavenged register is still live.

llvm-svn: 59697
2008-11-20 02:32:35 +00:00
Evan Cheng
145b3db050 Register scavenger should process early clobber defs first. A dead early clobber def should not interfere with a normal def which happens one slot later.
llvm-svn: 59559
2008-11-18 22:28:38 +00:00
Evan Cheng
59112bc108 Actually ARM / Mac OS X does have UINTTOFP_I64_F{64|32} libcalls.
llvm-svn: 58725
2008-11-04 22:19:55 +00:00
Evan Cheng
45496b349f Custom lower bit_convert i64 -> f64 into FMDRR. This is now happening with legalizetypes.
llvm-svn: 58714
2008-11-04 19:57:48 +00:00
Devang Patel
47a504c87c Implement function notes as function attributes.
llvm-svn: 56716
2008-09-26 23:51:19 +00:00
Evan Cheng
d3225118a6 Unallocatable registers do not have live intervals.
llvm-svn: 56287
2008-09-17 18:36:25 +00:00
Dan Gohman
f38d63884f Re-enable SelectionDAG CSE for calls. It matters in the case of
libcalls, as in this testcase on ARM.

llvm-svn: 56226
2008-09-15 19:46:03 +00:00
Evan Cheng
db1693cb14 Correctly update kill infos after extending a live range and merge 2 val#'s; fix 56165 - do not mark val# copy field if the copy does not define the val#.
llvm-svn: 56199
2008-09-15 06:28:41 +00:00
Evan Cheng
ba11945234 Legalizer was missing code that expand fpow to a libcall.
llvm-svn: 56028
2008-09-09 23:02:14 +00:00
Evan Cheng
4708df4776 It's not legal to output a GV in a coalesced section if it's used in an ARM PIC relative constantpool.
llvm-svn: 54519
2008-08-08 06:56:16 +00:00
Anton Korobeynikov
52d0ff92cc Print section flags ok on platforms, which use '@' as comment string. Fix test.
llvm-svn: 54460
2008-08-07 09:55:06 +00:00
Owen Anderson
4c7ea0c270 This check is unnecessary, and getting rid of it removes a use of -disable-correct-folding.
llvm-svn: 54355
2008-08-05 17:52:54 +00:00
Owen Anderson
7fca48d0bd Remove the need for -disable-correct-folding from this test.
llvm-svn: 54354
2008-08-05 17:49:52 +00:00
Owen Anderson
231111faf9 Update these tests to work by disabling the new correct CFG generation. This flag should ONLY be used to for tests like these.
llvm-svn: 54334
2008-08-04 23:55:29 +00:00
Evan Cheng
d4eb684258 Teach ARM isLegalAddressingMode to handle unknown type without crashing. This fixes pr2589.
llvm-svn: 54004
2008-07-25 00:55:17 +00:00
Duncan Sands
ef45c602b6 Softfloat support for FDIV. Patch by
Richard Pennington.

llvm-svn: 53773
2008-07-18 21:18:48 +00:00
Gabor Greif
807c2df887 sabre brings to my attention that the 'tr' suffix is also obsolete
llvm-svn: 51349
2008-05-20 21:00:03 +00:00