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914de64a0a
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19457 Commits

Author SHA1 Message Date
Chris Lattner
914de64a0a completely remove a transformation that is unsafe in the face of 
undefs.

llvm-svn: 40439
 2007-07-23 17:10:17 +00:00
Bill Wendling
97342a9b0c Add missing SSE builtins: 
__builtin_ia32_cvtss2si64
    __builtin_ia32_cvttss2si64
    __builtin_ia32_cvtsi642ss
    __builtin_ia32_cvtsd2si64
    __builtin_ia32_cvttsd2si64
    __builtin_ia32_cvtsi642sd

llvm-svn: 40411
 2007-07-23 03:07:27 +00:00
Reid Spencer
dd93d5abaa Report an error if one occurs in releaseModule. 
llvm-svn: 40405
 2007-07-22 21:39:37 +00:00
Devang Patel
f45fc256e1 Apply temporary work around to fix llvm mis-compilation 
reported in PR 1556.

llvm-svn: 40133
 2007-07-21 00:34:29 +00:00
Evan Cheng
53cb03b583 No more noResults. 
llvm-svn: 40132
 2007-07-21 00:34:19 +00:00
Dan Gohman
ac8ccab48f Don't assume that only Uses can be kills. Defs are marked as kills initially 
when there are no uses. This fixes a dangling-pointer bug, where pointers to
deleted instructions were not removed from kills lists. More info here:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2007-July/009749.html

llvm-svn: 40131
 2007-07-20 23:17:34 +00:00
Chris Lattner
c157b172c1 zext(undef) = 0 and sext(undef) = 0, not undef. 
This hopefully fixes a miscompilation of TargetData.cpp when self hosting.

llvm-svn: 40125
 2007-07-20 22:09:02 +00:00
Chris Lattner
9663eb4a5b this xform is already done by the constant folder. 
llvm-svn: 40124
 2007-07-20 22:06:41 +00:00
Evan Cheng
cdb4e7949f Added -print-emitted-asm to print out JIT generated asm to cerr. 
llvm-svn: 40123
 2007-07-20 21:56:13 +00:00
Devang Patel
133b5cb6b6 Use SmallVector instead of std::vector. 
llvm-svn: 40109
 2007-07-20 18:04:54 +00:00
Dan Gohman
87107326f6 Optimize alignment of loads and stores. 
llvm-svn: 40102
 2007-07-20 16:34:21 +00:00
Duncan Sands
4b390d541e Place SCCPSolver also in the anonymous namespace. This 
pacifies g++-4.2.

llvm-svn: 40089
 2007-07-20 08:56:21 +00:00
Owen Anderson
89afa507b1 Fix a bug where we were marking GEP expressions with the wrong opcode. 
llvm-svn: 40085
 2007-07-20 08:19:20 +00:00
Owen Anderson
3a92d35e62 When removing instructions from the analysis, be sure to check the confirmed 
flag when determining what to do with dependencies.

llvm-svn: 40079
 2007-07-20 06:16:07 +00:00
Evan Cheng
ac92a8149e Because we promote SSE logical ops and loads to v2i64, we often end up generate 
code that cross integer / floating point domains (e.g. generate pxor / pand for
logical ops on floating point value, movdqa to load / store floating point SSE
values). Given that, it's better to use movaps instead of movdqa and movups
instead of movdqu. They have the same latency but the "aps" variants are one
byte shorter.
If the domain crossing problem is a real performance issue, then we will have to
fix it with dynamic programming based isel.

llvm-svn: 40076
 2007-07-20 00:27:43 +00:00
Evan Cheng
f8d66a1eec Oops. These stores actually produce results. 
llvm-svn: 40074
 2007-07-20 00:20:46 +00:00
Evan Cheng
ba990bbc3f Fix custom lowering of SSE FXOR. 
llvm-svn: 40071
 2007-07-19 23:36:01 +00:00
Evan Cheng
f11cf2cad8 Fix patterns so we isel the xorps, etc. for floating pt logical SSE ops. DAG combiner may fold away the (bit_convert (load)). 
llvm-svn: 40070
 2007-07-19 23:34:10 +00:00
Reid Spencer
44d34e9b61 For PR1553: 
Change the keywords for the zext and sext parameter attributes to be 
zeroext and signext so they don't conflict with the keywords for the
instructions of the same name. This gets around the ambiguity.

llvm-svn: 40069
 2007-07-19 23:13:04 +00:00
Reid Spencer
bcbcea4547 Hush a noisy warning from GCC 4.2 about overflow during conversion by using 
the type "unsigned" instead of uintptr_t for a 1-bit structure field.

llvm-svn: 40066
 2007-07-19 21:05:30 +00:00
Owen Anderson
3b1129af78 Make val_replace fail early, which reduces the time to optimize 403.gcc to 14.8s. 
llvm-svn: 40064
 2007-07-19 19:57:13 +00:00
Devang Patel
45675e56ad Verify loop info. 
llvm-svn: 40062
 2007-07-19 18:02:32 +00:00
Duncan Sands
8c6657894f Replace mysterious code causing a g++-4.2 warning 
with hopefully correct code that pleases g++-4.2.

llvm-svn: 40051
 2007-07-19 09:42:01 +00:00
Duncan Sands
840594467f As pointed out by g++-4.2, the original code didn't do 
what it thought it was doing.

llvm-svn: 40044
 2007-07-19 07:31:58 +00:00
Owen Anderson
21e3bd1cdc Remember to free the heap allocated array if we're not going to use it. 
llvm-svn: 40043
 2007-07-19 06:45:33 +00:00
Owen Anderson
57d33add2c Use SmallVector and DenseMap in even more places. 
With this, the time to optimize 403.gcc is down to 15.1s.

llvm-svn: 40042
 2007-07-19 06:37:56 +00:00
Owen Anderson
7a4b965739 Change ValueTable to use a DenseMap for mapping expressions to value numbers. 
This results in a slight speedup for 403.gcc.

llvm-svn: 40040
 2007-07-19 06:13:15 +00:00
Devang Patel
9c100bc7e9 Set up ground work to verify preserved analysis info. 
llvm-svn: 40039
 2007-07-19 05:36:09 +00:00
Owen Anderson
c32df0bc73 Move some sets and maps to SmallPtrSet and DenseMap respectively. This 
reduces the time to optimize 403.gcc from 17.6s to 16.4s.

llvm-svn: 40036
 2007-07-19 03:32:44 +00:00
Devang Patel
fe0ef94227 After a basic block is split into two parts, 
second part dominates all the blocks dominated
by original basic block. And first part dominates
second part.

llvm-svn: 40035
 2007-07-19 02:29:24 +00:00
Devang Patel
4020116257 Now this temp. fix is not required. 
llvm-svn: 40034
 2007-07-19 02:22:21 +00:00
Evan Cheng
8312ed6f77 Change instruction description to split OperandList into OutOperandList and 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;

llvm-svn: 40033
 2007-07-19 01:14:50 +00:00
Evan Cheng
45eb268032 Only adjust esp around calls in presence of alloca. 
llvm-svn: 40030
 2007-07-19 00:42:58 +00:00
Evan Cheng
30e121adf6 Only adjust esp around calls in presence of alloca. 
llvm-svn: 40028
 2007-07-19 00:42:05 +00:00
Devang Patel
ef7c515e9a Fix typo. 
llvm-svn: 40025
 2007-07-18 23:50:19 +00:00
Devang Patel
b5482a65c9 Fix dominator info update to accommodate CFG changes. 
This fixes PR1559.

llvm-svn: 40024
 2007-07-18 23:48:20 +00:00
Evan Cheng
5dd17373c5 Add comment. 
llvm-svn: 40022
 2007-07-18 23:34:48 +00:00
Evan Cheng
6a4fb5d62b Use MOV instead of LEA to restore ESP if callee-saved frame size is 0; if previous instruction updates esp, fold it in. 
llvm-svn: 40018
 2007-07-18 21:26:06 +00:00
Dan Gohman
4d64f82ab5 Add constructor overloads for LoadInst and StoreInst that insert at the 
end of a BasicBlock and have an alignment parameter.

llvm-svn: 40016
 2007-07-18 20:51:11 +00:00
Dan Gohman
2fc9d5171e Implement initial memory alignment awareness for SSE instructions. Vector loads 
and stores that have a specified alignment of less than 16 bytes now use
instructions that support misaligned memory references.

llvm-svn: 40015
 2007-07-18 20:23:34 +00:00
Owen Anderson
03b56ad400 Fix an issue where assignments that caused a SmallPtrSet to become non-small 
would result in calling realloc() on a null pointer.  Instead, if we encounter
this situation, make a normal call to malloc().

llvm-svn: 40014
 2007-07-18 19:54:15 +00:00
Dan Gohman
4c140b7128 It's not necessary to do rounding for alloca operations when the requested 
alignment is equal to the stack alignment.

llvm-svn: 40004
 2007-07-18 16:29:46 +00:00
Evan Cheng
cee32b53a4 New entry. 
llvm-svn: 39998
 2007-07-18 08:21:49 +00:00
Evan Cheng
cf0fdbc249 Fold prologue esp update when possible. 
llvm-svn: 39984
 2007-07-17 21:26:42 +00:00
Evan Cheng
6ad7064bdf Dead code. 
llvm-svn: 39979
 2007-07-17 20:01:19 +00:00
Evan Cheng
26f6d71d26 Make sure not to break eh_return. 
llvm-svn: 39978
 2007-07-17 18:40:47 +00:00
Evan Cheng
70b79bfa0e Update. 
llvm-svn: 39977
 2007-07-17 18:39:45 +00:00
Evan Cheng
46a48c5c3e Missed the case where alloca is used but the stack size (not including callee-saved portion) is zero. Thanks Dan. 
llvm-svn: 39974
 2007-07-17 18:03:34 +00:00
Rafael Espindola
d70763bb0e detect invalid combination of sret and byval 
llvm-svn: 39971
 2007-07-17 13:34:23 +00:00
Evan Cheng
532b73311e Use push / pop for prologues and epilogues. 
llvm-svn: 39967
 2007-07-17 07:59:08 +00:00