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51 Commits

Author SHA1 Message Date
Elena Demikhovsky
1df83908be AVX-512: Added all forms of VPABS instruction 
Added all intrinsics, tests for encoding, tests for intrinsics.

llvm-svn: 240386
 2015-06-23 08:19:46 +00:00
Elena Demikhovsky
0d6489273b AVX-512: added VPSHUFB instruction - all SKX forms 
Added intrinsics and encoding tests.

llvm-svn: 240277
 2015-06-22 13:00:42 +00:00
Elena Demikhovsky
9ebb2c82d0 AVX-512: Added intrinsics for VPERMT2W/D/Q/PS/PD and 
VPERMI2W/D/Q/PS/PD instructions.
Added tests.

llvm-svn: 240256
 2015-06-22 06:45:48 +00:00
Asaf Badouh
6e78caf9ff [AVX512] 
add instructions: VPAVGB and VPAVGW


review
http://reviews.llvm.org/D10504

llvm-svn: 240012
 2015-06-18 12:30:53 +00:00
Igor Breger
545927df8a AVX-512: cvtusi2ss/d intrinsics. 
Change builtin function name and signature ( add third parameter - rounding mode ).
Added tests for intrinsics.

Differential Revision: http://reviews.llvm.org/D10473

llvm-svn: 239888
 2015-06-17 07:23:57 +00:00
Asaf Badouh
9879449284 [AVX512] add integer min/max intrinsics support. 
review:
http://reviews.llvm.org/D10439

llvm-svn: 239806
 2015-06-16 08:39:27 +00:00
Igor Breger
f163333815 AVX-512: Implemented cvtsi2ss/d cvtusi2ss/d instructions with round control for KNL. 
Added intrinsics for cvtsi2ss/d instructions.
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D10430

llvm-svn: 239694
 2015-06-14 12:44:55 +00:00
Igor Breger
545f43a067 AVX-512: Implemented 256/128bit VALIGND/Q instructions for SKX and KNL 
Implemented DAG lowering for all these forms.
Added tests for DAG lowering and encoding.

Differential Revision: http://reviews.llvm.org/D10310

llvm-svn: 239300
 2015-06-08 14:03:17 +00:00
Asaf Badouh
08f13fa0ba re-apply 238809 
AVX-512: Implemented GETEXP instruction for KNL and SKX
Added rounding mode modifier for SQRTPS/PD
Added tests for encoding and intrinsics.
CR:
http://reviews.llvm.org/D9991

llvm-svn: 238923
 2015-06-03 13:41:48 +00:00
Asaf Badouh
f8387bd5f5 revert 238809 
llvm-svn: 238810
 2015-06-02 07:45:19 +00:00
Asaf Badouh
9a55f1d0aa AVX-512: Implemented GETEXP instruction for KNL and SKX 
Added rounding mode modifier for SQRTPS/PD
Added tests for encoding and intrinsics.

llvm-svn: 238809
 2015-06-02 07:18:14 +00:00
Elena Demikhovsky
0b01514dcb AVX-512: Added intrinsics for ADDSS/D, MULSS/D, SUBSS/D, DIVSS/D 
instructions. These intrinsics are comming with rounding mode.
Added intrinsics for MAXSS/D, MINSS/D - with and without  sae.

By Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 237560
 2015-05-18 07:24:19 +00:00
Elena Demikhovsky
f25b492812 AVX-512: Added SKX instructions and intrinsics: 
{add/sub/mul/div/} x {ps/pd} x {128/256} 2. max/min with sae

By Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 236971
 2015-05-11 06:05:05 +00:00
Elena Demikhovsky
28f6bb84a5 AVX-512: Added all forms of FP compare instructions for KNL and SKX. 
Added intrinsics for the instructions. CC parameter of the intrinsics was changed from i8 to i32 according to the spec.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 236714
 2015-05-07 11:24:42 +00:00
Elena Demikhovsky
40362f45c8 AVX-512: added integer "add" and "sub" instructions with saturation for SKX 
with intrinsics and tests

by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 236418
 2015-05-04 12:35:55 +00:00
Elena Demikhovsky
5b00c277f4 AVX-512: Added VPACK* instructions forms for KNL and SKX 
and their intrinsics
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 236414
 2015-05-04 09:14:02 +00:00
Sanjay Patel
7bcb75e23d [x86] remove RCPPS and RSQRTPS intrinsic instruction definitions 
We don't need codegen-only intrinsic instructions for the vector forms of these instructions.

This makes the reciprocal estimate instruction lowering identical to how we handle normal
square roots: (V)SQRTPS / (V)SQRTPD.

No existing regression tests fail with this patch.

Differential Revision: http://reviews.llvm.org/D9301

llvm-svn: 236013
 2015-04-28 18:48:45 +00:00
Elena Demikhovsky
23e33119e3 AVX-512: Added "pandn" intrinsics set 
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 235971
 2015-04-28 08:12:42 +00:00
Sanjay Patel
8f76b5a451 fix 80-cols; NFC 
llvm-svn: 235902
 2015-04-27 17:45:44 +00:00
Sanjay Patel
5c239c3e21 fix typos; NFC 
llvm-svn: 235896
 2015-04-27 17:03:31 +00:00
Elena Demikhovsky
abf0138a81 AVX-512: Added logical and arithmetic instructions for SKX 
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 235375
 2015-04-21 10:27:40 +00:00
Elena Demikhovsky
74d944b41a AVX-512: intrinsics for VPADD, VPMULDQ and VPSUB 
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 233906
 2015-04-02 10:51:40 +00:00
Elena Demikhovsky
28fa559e12 AVX-512: added intrinsics for VPAND, VPOR and VPXOR 
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 233525
 2015-03-30 08:30:34 +00:00
Quentin Colombet
77e9397bd4 [X86] Fix a regression introduced by r223641. 
The permps and permd instructions have their operands swapped compared to the
intrinsic definition. Therefore, they do not fall into the INTR_TYPE_2OP
category.

I did not create a new category for those two, as they are the only one AFAICT
in that case.

<rdar://problem/20108262>

llvm-svn: 232085
 2015-03-12 19:34:12 +00:00
Elena Demikhovsky
b15d81ba19 AVX-512: recommitted 229837 + bugfix + test 
llvm-svn: 230223
 2015-02-23 15:12:31 +00:00
Eric Christopher
c93875565e Revert "AVX-512: Full implementation for VRNDSCALESS/SD instructions and intrinsics." 
The instructions were being generated on architectures that don't support avx512.

This reverts commit r229837.

llvm-svn: 229942
 2015-02-20 00:45:28 +00:00
Elena Demikhovsky
41438d50e6 AVX-512: Full implementation for VRNDSCALESS/SD instructions and intrinsics. 
llvm-svn: 229837
 2015-02-19 10:48:04 +00:00
Elena Demikhovsky
2ae2229fab AVX-512: Added support for FP instructions with embedded rounding mode. 
By Asaf Badouh <asaf.badouh@intel.com>

llvm-svn: 229645
 2015-02-18 07:59:20 +00:00
Elena Demikhovsky
237f19f35f AVX-512: Added FMA intrinsics with rounding mode 
By Asaf Badouh and Elena Demikhovsky

Added special nodes for rounding: FMADD_RND, FMSUB_RND..
It will prevent merge between nodes with rounding and other standard nodes.

llvm-svn: 227303
 2015-01-28 10:21:27 +00:00
Elena Demikhovsky
bb8ca1f551 AVX-512: Added FMA instructions, intrinsics an tests for KNL and SKX targets 
by Asaf Badouh

http://reviews.llvm.org/D6456

llvm-svn: 224764
 2014-12-23 10:30:39 +00:00
Elena Demikhovsky
aeb7ff5f14 AVX-512: Added all forms of BLENDM instructions, 
intrinsics, encoding tests for AVX-512F and skx instructions.

llvm-svn: 224707
 2014-12-22 13:52:48 +00:00
Elena Demikhovsky
51c511a201 AVX-512: Added EXPAND instructions and intrinsics. 
llvm-svn: 224241
 2014-12-15 10:03:52 +00:00
Cameron McInally
a7f40d9986 [AVX512] Add support for 512b variable bit shift intrinsics. 
llvm-svn: 224028
 2014-12-11 17:13:05 +00:00
Elena Demikhovsky
e879b19906 AVX-512: Added all forms of COMPRESS instruction 
+ intrinsics + tests

llvm-svn: 224019
 2014-12-11 15:02:24 +00:00
Elena Demikhovsky
3492489267 X86 intrinsics moved form X86ISelLowering.cpp to X86IntrinsicsInfo.h 
X86ISelLowering.cpp has a long switch for intrinsics. I moved a part of
this long switch to the new intrinsics table in X86IntrinsicsInfo.h.
No functional changes, just code and compile time optimization.

llvm-svn: 223641
 2014-12-08 09:03:08 +00:00
Ahmed Bougacha
b46577058a [X86] Refactor PMOV[SZ]Xrm to add missing AVX2 patterns. 
Most patterns will go away once the extload legalization changes land.

Differential Revision: http://reviews.llvm.org/D6125

llvm-svn: 223567
 2014-12-06 01:31:07 +00:00
Michael Liao
59822d4755 [X86] Clean up whitespace as well as minor coding style 
llvm-svn: 223339
 2014-12-04 05:20:33 +00:00
Elena Demikhovsky
868b76ae69 AVX-512: Scalar ERI intrinsics 
including SAE mode and memory operand.
Added AVX512_maskable_scalar template, that should cover all scalar instructions in the future.

The main difference between AVX512_maskable_scalar<> and AVX512_maskable<> is using X86select instead of vselect.
I need it, because I can't create vselect node for MVT::i1 mask for scalar instruction.

http://reviews.llvm.org/D6378

llvm-svn: 222820
 2014-11-26 10:46:49 +00:00
Cameron McInally
c32dadfa69 [AVX512] Add 512b integer shift by variable intrinsics and patterns. 
llvm-svn: 222786
 2014-11-25 20:41:51 +00:00
Cameron McInally
69dc38d962 [AVX512] Add integer shift by immediate intrinsics. 
llvm-svn: 221811
 2014-11-12 19:58:54 +00:00
Elena Demikhovsky
2450049261 AVX-512: Intrinsics for ERI 
3 instructions: vrcp28, vrsqrt28, vexp2, only vector forms.
Intrinsics include SAE (Suppres All Exceptions) parameter.

http://reviews.llvm.org/D6214

llvm-svn: 221774
 2014-11-12 07:31:03 +00:00
Robert Khasanov
6a848d2b84 [AVX512] Added intrinsics for 128-, 256- and 512-bit versions of VPCMP/VPCMPU{BWDQ} 
Added CMP_MASK_CC intrinsic type.
Added tests for intrinsics.

Patch by Sergey Lisitsyn <sergey.lisitsyn@intel.com>

llvm-svn: 219316
 2014-10-08 15:49:26 +00:00
Robert Khasanov
f86e0f1129 [AVX512] Added intrinsics for 128-, 256- and 512-bit versions of VCMPGT{BWDQ}. 
Patch by Sergey Lisitsyn <sergey.lisitsyn@intel.com>

llvm-svn: 218670
 2014-09-30 12:15:52 +00:00
Robert Khasanov
61a1201dfa [AVX512] Added intrinsics for 128- and 256-bit versions of VCMPEQ{BWDQ} 
Fixed lowering of this intrinsics in case when mask is v2i1 and v4i1.
Now cmp intrinsics lower in the following way:
 (i8 (int_x86_avx512_mask_pcmpeq_q_128
             (v2i64 %a), (v2i64 %b), (i8 %mask))) ->
 (i8 (bitcast
   (v8i1 (insert_subvector undef,
           (v2i1 (and (PCMPEQM %a, %b),
                      (extract_subvector
                         (v8i1 (bitcast %mask)), 0))), 0))))

llvm-svn: 218669
 2014-09-30 11:41:54 +00:00
Robert Khasanov
2972b6033d [AVX512] Added intrinsics for VPCMPEQB and VPCMPEQW. 
Added new operand type for intrinsics (IIT_V64)

llvm-svn: 218668
 2014-09-30 11:32:22 +00:00
Robert Khasanov
06de3de89a [AVX512] Enabled intrinsics for VPCMPEQD and VPCMPEQQ. 
Added CMP_MASK intrinsic type

llvm-svn: 218667
 2014-09-30 11:19:50 +00:00
Elena Demikhovsky
234d9b228b Fixed compilation problem on Windows (initialization of non-aggregate type). 
After commit 217131.

llvm-svn: 217134
 2014-09-04 07:20:39 +00:00
Elena Demikhovsky
8b1d641c54 X86 Intrinsics table - changed to a static table sorted by intrinsic id. 
Used binary search over the tables.

llvm-svn: 217131
 2014-09-04 06:34:34 +00:00
Elena Demikhovsky
f1b643ba53 X86 intrinsics table - simplifies intrinsics lowering. 
The tables are initialized when X86TargetLowering object is created.

llvm-svn: 216345
 2014-08-24 09:19:56 +00:00
Elena Demikhovsky
8124f6acfb Reverted last commit 
llvm-svn: 215827
 2014-08-17 09:36:07 +00:00