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Author SHA1 Message Date
John Brawn
5f32a8dbc4 [AArch64] Do 64-bit vector move of 0 and -1 by extracting from the 128-bit move 
Currently a vector move of 0 or -1 will use different instructions depending on
the size of the vector. Using a single instruction (the 128-bit one) for both
gives more opportunity for Machine CSE to eliminate instructions.

Differential Revision: https://reviews.llvm.org/D53579

llvm-svn: 345270
 2018-10-25 14:56:48 +00:00
Jiangning Liu
0fbb128209 Fix PR23065. Avoid optimizing bitcast of build_vector with constant input to scalar_to_vector. 
llvm-svn: 233778
 2015-04-01 01:52:38 +00:00