3 Commits

Author	SHA1	Message	Date
Meera Nakrani	df6a87cef9	[ARM] Corrected condition in isSaturatingConditional ... Fixed a small error in an if condition to prevent usat/ssat being generated if (upper constant + 1) is not a power of 2.	2020-09-15 10:14:30 +00:00
Meera Nakrani	fa71cd65a0	[ARM] Selects SSAT/USAT from correct LLVM IR ... LLVM will canonicalize conditional selectors to a different pattern than the old code that was used. This is updating the function to match the new expected patterns and select SSAT or USAT when successful. Tests have also been updated to use the new patterns. Differential Review: https://reviews.llvm.org/D87379	2020-09-14 10:58:21 +00:00
Florian Hahn	f565a28c4f	[ARM] Lower unsigned saturation to USAT ... Summary: Implement lower of unsigned saturation on an interval [0, k] where k + 1 is a power of two using USAT instruction in a similar way to how [~k, k] is lowered using SSAT on ARM models that supports it. Patch by Marten Svanfeldt Reviewers: t.p.northover, pbarrio, eastig, SjoerdMeijer, javed.absar, fhahn Reviewed By: fhahn Subscribers: fhahn, aemerson, javed.absar, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D41348 llvm-svn: 321164	2017-12-20 11:13:57 +00:00