Evan Cheng
6acdef5d11
Duh. Default to ARMCC::AL (always).
...
llvm-svn: 56301
2008-09-18 07:28:19 +00:00
Evan Cheng
f2c04a10e6
Fix addrmode1 instruction encodings; fix bx_ret encoding.
...
llvm-svn: 56277
2008-09-17 07:53:38 +00:00
Evan Cheng
63b98ccd5e
Fix random abort.
...
llvm-svn: 56184
2008-09-13 01:55:59 +00:00
Evan Cheng
775a37e4b4
Typo.
...
llvm-svn: 56182
2008-09-13 01:44:01 +00:00
Evan Cheng
200cdea934
Rely on instruction format to determine so_reg operand for now.
...
llvm-svn: 56181
2008-09-13 01:38:29 +00:00
Evan Cheng
0a3a595612
Revert 56176. All those instruction formats are still needed.
...
llvm-svn: 56180
2008-09-13 01:35:33 +00:00
Evan Cheng
1ac0a5f278
Accidentially flipped the condition.
...
llvm-svn: 56179
2008-09-13 01:29:57 +00:00
Evan Cheng
d68f2947a9
Add debug dumps.
...
llvm-svn: 56178
2008-09-13 01:15:21 +00:00
Evan Cheng
18fd8337b3
Eliminate unnecessary instruction formats.
...
llvm-svn: 56176
2008-09-12 23:15:39 +00:00
Evan Cheng
66e7651a16
Addrmode 1 S bit can be dynamically set. Look for CPSR def.
...
llvm-svn: 56172
2008-09-12 22:45:55 +00:00
Evan Cheng
adf6720626
Rewrite address mode 1 code emission routines.
...
llvm-svn: 56171
2008-09-12 22:01:15 +00:00
Dan Gohman
e1f9be27bc
Tidy up several unbeseeming casts from pointer to intptr_t.
...
llvm-svn: 55779
2008-09-04 17:05:41 +00:00
Evan Cheng
e97c48a34a
Revamp ARM JIT.
...
llvm-svn: 55624
2008-09-02 06:52:38 +00:00
Anton Korobeynikov
4f6e612973
Remove bunch of gcc 4.3-related warnings from Target
...
llvm-svn: 47369
2008-02-20 11:22:39 +00:00
Dan Gohman
cabaec582f
Rename MRegisterInfo to TargetRegisterInfo.
...
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Chris Lattner
f83aae613c
rename TargetInstrDescriptor -> TargetInstrDesc.
...
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
llvm-svn: 45695
2008-01-07 07:27:27 +00:00
Chris Lattner
f7f96d818f
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
...
that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
llvm-svn: 45674
2008-01-07 01:56:04 +00:00
Chris Lattner
9e5cc35593
Add new shorter predicates for testing machine operands for various types:
...
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
Chris Lattner
12477d46b4
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
...
llvm-svn: 45453
2007-12-30 20:49:49 +00:00
Chris Lattner
ad9a6ccb83
Remove attribution from file headers, per discussion on llvmdev.
...
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Raul Herbster
db2f42989b
Comments added. It now generates V5TE multiply instructions. However, it is still necessary to model PUWLSH bits more clearly.
...
llvm-svn: 41627
2007-08-30 23:29:26 +00:00
Evan Cheng
8c896cc115
Initial JIT support for ARM by Raul Fernandes Herbster.
...
llvm-svn: 40887
2007-08-07 01:37:15 +00:00
Chris Lattner
71e2481181
no email addrs in file headers
...
llvm-svn: 39962
2007-07-17 05:56:43 +00:00
Evan Cheng
96254545ae
Initial ARM JIT support by Raul Fernandes Herbster.
...
llvm-svn: 37926
2007-07-05 21:15:40 +00:00