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18 Commits

Author SHA1 Message Date
Misha Brukman
1fef885677 Remove trailing whitespace 
llvm-svn: 21425
 2005-04-21 23:30:14 +00:00
Nate Begeman
ecb5b5c028 Make pattern isel default for ppc 
Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
  0 == off
  1 == on
  2 == target default

llvm-svn: 21309
 2005-04-15 22:12:16 +00:00
Nate Begeman
152dbbe856 Remove 64 bit simple ISel, it never worked correctly 
Add initial (buggy) implementation of 64 bit pattern ISel

llvm-svn: 21096
 2005-04-05 08:51:15 +00:00
Nate Begeman
0e77845b7e Addition of the PPC32 Pattern ISel. While it is far from complete, it will 
be brought up to parity with the current simple ISel in the coming days.
Currently, -pattern-isel is required to trigger it.

llvm-svn: 20805
 2005-03-24 04:41:43 +00:00
Misha Brukman
c98cd22aae Fix build on Linux/PowerPC64 using SuSE GCC (#undef PPC) 
llvm-svn: 17744
 2004-11-14 20:34:01 +00:00
Nate Begeman
e816600b3e All PPC instructions are now auto-printed 
32 and 64 bit AsmWriters unified
Darwin and AIX specific features of AsmWriter split out

llvm-svn: 16163
 2004-09-04 05:00:00 +00:00
Misha Brukman
d5acc2ec78 Consistently name passed with 32 or 64 in their name 
llvm-svn: 15855
 2004-08-17 05:02:58 +00:00
Nate Begeman
224deaa061 Replace PowerPCPEI.cpp with target independant PrologEpilogInserter 
llvm-svn: 15746
 2004-08-14 22:16:36 +00:00
Misha Brukman
fc82624aab 64-bit instruction selector and AIX-specific 64-bit asm printer 
llvm-svn: 15669
 2004-08-11 23:42:15 +00:00
Nate Begeman
6120e8f04f Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer. 
llvm-svn: 15662
 2004-08-11 07:40:04 +00:00
Misha Brukman
694c9ff1a6 Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest. 
llvm-svn: 15636
 2004-08-11 00:11:25 +00:00
Misha Brukman
3da9167cc4 CodePrinter -> AsmPrinter 
llvm-svn: 15599
 2004-08-09 22:27:45 +00:00
Chris Lattner
bbf11b1e1d Changes commited for Nate Begeman: 
Use a PowerPC specific prolog epilog inserter to control where spilled
callee save regs are placed on the stack.
Get rid of implicit return address stack slot, save return address reg
(LR) in appropriate slot
Improve code generated for functions that don't have calls or access
globals


Note from Chris: PowerPCPEI will eventually be eliminated, once the
functionality is merged into CodeGen/PrologEpilogInserter.cpp

llvm-svn: 15536
 2004-08-06 06:58:50 +00:00
Misha Brukman
0fe1f5d880 Add PowerPCBranchSelector to discover which are `long' branches. 
Contributed by Nate Begeman.

llvm-svn: 15280
 2004-07-27 18:33:06 +00:00
Brian Gaeke
53dc31efcd Do IMPLICIT_DEFs on incoming args' hard regs, to avoid confusing the regalloc. 
Support single-fp incoming args.
Support single-fp outgoing args ('call' operands).
Support double-fp return values.

llvm-svn: 14880
 2004-07-16 10:31:25 +00:00
Chris Lattner
60fb3d60a8 The powerpc is now gone. However it is now just known as the Skeleton target. 
llvm-svn: 14877
 2004-07-16 07:14:34 +00:00
Brian Gaeke
24f70fa16d Add comments describing how you would add prototypes for factory methods for 
PowerPC-specific passes here.

llvm-svn: 11073
 2004-02-02 19:05:28 +00:00
Brian Gaeke
764f1b476a Import of skeletal PowerPC backend I have had laying around for months... 
llvm-svn: 10937
 2004-01-21 21:13:19 +00:00