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Commit Graph

138913 Commits

Author SHA1 Message Date
Konstantin Zhuravlyov
bbe6c88c7e [AMDGPU] Ask subtarget if waitcnt instruction is needed before barrier instruction
Differential Revision: https://reviews.llvm.org/D24985

llvm-svn: 282875
2016-09-30 16:50:36 +00:00
Konstantin Zhuravlyov
ef884dccde [AMDGPU] Do not run scalar optimization passes at "-O0"
Differential Revision: https://reviews.llvm.org/D25055

llvm-svn: 282873
2016-09-30 16:39:24 +00:00
Artur Pilipenko
af3e8db88d CVP. Turn marking adds as no wrap on by default (was turned off by 279082)
With 282650 in tree extra no wrap on adds doesn't cause regressions anymore. Reenable the optimzation.

llvm-svn: 282872
2016-09-30 16:20:08 +00:00
Zachary Turner
afdf5e3940 Resubmit "Add llvm::enumerate() to STLExtras."
The CL was originally failing due to the use of some C++14
specific features, so I've removed those.  Hopefully this will
satisfy the bots.

llvm-svn: 282867
2016-09-30 15:43:59 +00:00
Matthew Simpson
f6e1d8dedb [LV] Build all scalar steps for non-uniform induction variables
When building the steps for scalar induction variables, we previously attempted
to determine if all the scalar users of the induction variable were uniform. If
they were, we would only emit the step corresponding to vector lane zero. This
optimization was too aggressive. We generally don't know the entire set of
induction variable users that will be scalar. We have
isScalarAfterVectorization, but this is only a conservative estimate of the
instructions that will be scalarized. Thus, an induction variable may have
scalar users that aren't already known to be scalar. To avoid emitting unused
steps, we can only check that the induction variable is uniform. This should
fix PR30542.

Reference: https://llvm.org/bugs/show_bug.cgi?id=30542
llvm-svn: 282863
2016-09-30 15:13:52 +00:00
Dylan McKay
cdace906da [AVR] Add the ELF object file writer
Summary: This adds the ELF32 writer for AVR.

Reviewers: kparzysz

Subscribers: beanz, mgorny

Differential Revision: https://reviews.llvm.org/D25031

llvm-svn: 282856
2016-09-30 14:09:20 +00:00
Dylan McKay
8e9c5b26db Revert "[RegAllocGreedy] Attempt to split unspillable live intervals"
It was accidentally committed.

llvm-svn: 282855
2016-09-30 14:05:15 +00:00
Dylan McKay
fc0928fdac [AVR] Add the assembly instruction printer
Summary:
This change adds the AVR assembly instruction printer.

No tests are included in this patch. I have left them downstream so we can
add them once `llc` successfully runs (there's very few components left
to upstream until this).

Reviewers: arsenm, kparzysz

Subscribers: wdng, beanz, mgorny

Differential Revision: https://reviews.llvm.org/D25028

llvm-svn: 282854
2016-09-30 14:01:50 +00:00
Dylan McKay
2b3e685349 [RegAllocGreedy] Attempt to split unspillable live intervals
Summary:
Previously, when allocating unspillable live ranges, we would never
attempt to split. We would always bail out and try last ditch graph
recoloring.

This patch changes this by attempting to split all live intervals before
performing recoloring.

This fixes LLVM bug PR14879.

I can't add test cases for any backends other than AVR because none of
them have small enough register classes to trigger the bug.

Reviewers: qcolombet

Subscribers: MatzeB

Differential Revision: https://reviews.llvm.org/D25070

llvm-svn: 282852
2016-09-30 13:59:20 +00:00
Petr Hosek
4f8f123c96 [CMake] Support symlinks even with LLVM_INSTALL_TOOLCHAIN_ONLY
When LLVM_INSTALL_TOOLCHAIN_ONLY is used and LLVM_TOOLCHAIN_TOOLS
contains a tool which is a symlink, it would be ignored. This already
worked before but got broken in r282510.

Differential Revision: https://reviews.llvm.org/D25067

llvm-svn: 282844
2016-09-30 06:29:28 +00:00
Craig Topper
4c30ce46a8 [AVX-512] Store address operand should be an input operand for the special stack spilling pseudos for XMM16-31 and YMM16-31 without VLX.
llvm-svn: 282843
2016-09-30 05:35:47 +00:00
Craig Topper
b9d2d4ca13 [AVX-512] Add the special stack spilling pseudos for XMM16-31 and YMM16-31 without VLX to teh isFrameLoadOpcode and isFrameStoreOpcode.
llvm-svn: 282842
2016-09-30 05:35:45 +00:00
Craig Topper
0213fa7d16 Revert r282835 "[AVX-512] Always use the full 32 register vector classes for addRegisterClass regardless of whether AVX512/VLX is enabled or not."
Turns out this doesn't pass verify-machineinstrs.

llvm-svn: 282841
2016-09-30 05:35:42 +00:00
Kostya Serebryany
43c4fa2adf [libfuzzer] test for c-ares CVE-2016-5180
llvm-svn: 282839
2016-09-30 05:15:45 +00:00
Adam Nemet
ca8cbca151 [LDist] Port to new streaming API for opt remarks
llvm-svn: 282838
2016-09-30 04:56:25 +00:00
Craig Topper
ce7f1ca0c2 [X86] Add AVX-512 VTs to findRepresentativeClass as well as v16i16 which was also missing. Change register class to include the extra 16 AVX512 registers.
I'm not completely sure what this method does or why all the 256-bit VTs returned VR128RegClass when the comments on the method definiton say it should return the largest super register class. I just figured AVX-512 should be similar.

llvm-svn: 282836
2016-09-30 04:31:37 +00:00
Craig Topper
829b549027 [AVX-512] Always use the full 32 register vector classes for addRegisterClass regardless of whether AVX512/VLX is enabled or not.
If AVX512 is disabled, the registers should already be marked reserved. Pattern predicates and register classes on instructions should take care of most of the rest. Loads/stores and physical register copies for XMM16-31 and YMM16-31 without VLX have already been taken care of.

I'm a little unclear why this changed the register allocation of the SSE2 run of the sad.ll test, but the registers selected appear to be valid after this change.

llvm-svn: 282835
2016-09-30 04:31:33 +00:00
Adam Nemet
718a6b9aef [LoopUnroll] Port to the new streaming interface for opt remarks.
llvm-svn: 282834
2016-09-30 03:44:16 +00:00
Piotr Padlewski
98cb07e1d2 [thinlto] Don't decay threshold for hot callsites
Summary:
We don't want to decay hot callsites to import chains of hot
callsites. The same mechanism is used in LIPO.

Reviewers: tejohnson, eraman, mehdi_amini

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D24976

llvm-svn: 282833
2016-09-30 03:01:17 +00:00
Matt Arsenault
3a9a1ac61b AMDGPU: Use unsigned compare for eq/ne
For some reason there are both of these available, except
for scalar 64-bit compares which only has u64. I'm not sure
why there are both (I'm guessing it's for the one bit inputs we
don't use), but for consistency always using the
unsigned one.

llvm-svn: 282832
2016-09-30 01:50:20 +00:00
Kostya Serebryany
d31e44ab52 [libFuzzer] remove the code for -print_pcs=1 with the old coverage. It still works with the new one (trace-pc-guard)
llvm-svn: 282831
2016-09-30 01:24:57 +00:00
Kostya Serebryany
8e6582edf5 [libFuzzer] more the feature set to InputCorpus; on feature update, change the feature counter of the old best input
llvm-svn: 282829
2016-09-30 01:19:56 +00:00
Adam Nemet
d6eee273b7 [LoopDataPrefetch] Port to new streaming API for opt remarks
llvm-svn: 282826
2016-09-30 00:42:43 +00:00
Justin Lebar
2e623163a0 Move UTF functions into namespace llvm.
Summary:
This lets people link against LLVM and their own version of the UTF
library.

I determined this only affects llvm, clang, lld, and lldb by running

$ git grep -wl 'UTF[0-9]\+\|\bConvertUTF\bisLegalUTF\|getNumBytesFor' | cut -f 1 -d '/' | sort | uniq
  clang
  lld
  lldb
  llvm

Tested with

  ninja lldb
  ninja check-clang check-llvm check-lld

(ninja check-lldb doesn't complete for me with or without this patch.)

Reviewers: rnk

Subscribers: klimek, beanz, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D24996

llvm-svn: 282822
2016-09-30 00:38:45 +00:00
Adam Nemet
cdbc87b8e9 [LV] Port the remarks in processLoop to the new streaming API
This completes LV.

llvm-svn: 282821
2016-09-30 00:29:30 +00:00
Adam Nemet
907a78cd5a [LV] Port the last opt remark in Hints to the new streaming interface
llvm-svn: 282820
2016-09-30 00:29:25 +00:00
Reid Kleckner
d8564063fd [X86] Don't preserve Win64 SSE CSRs when SSE is disabled
Code that doesn't use floating point and doesn't use SSE (kernel code)
shouldn't save and restore SSE registers.

Fixes PR30503

llvm-svn: 282819
2016-09-30 00:17:49 +00:00
Quentin Colombet
5705443f01 [AArch64][RegisterBankInfo] Use static mapping for 3-operands instrs.
This uses a TableGen'ed like structure for all 3-operands instrs.
The output of the RegBankSelect pass should be identical but the
RegisterBankInfo will do less dynamic allocations.

llvm-svn: 282817
2016-09-30 00:10:00 +00:00
Quentin Colombet
2fc0df719f [AArch64][RegisterBankInfo] Add static value mapping for 3-op instrs.
This is the kind of input TableGen should generate at some point.
NFC.

llvm-svn: 282816
2016-09-30 00:09:58 +00:00
Quentin Colombet
6fe4d7907c [AArch64][RegisterBankInfo] Check the statically created ValueMapping.
Make sure that the ValueMappings contain the value we expect at the
indices we expect.

NFC.

llvm-svn: 282815
2016-09-30 00:09:43 +00:00
Adam Nemet
abdb6ed3d0 [LAA, LV] Port to new streaming interface for opt remarks. Update LV
(Recommit after making sure IsVerbose gets properly initialized in
DiagnosticInfoOptimizationBase.  See previous commit that takes care of
this.)

OptimizationRemarkAnalysis directly takes the role of the report that is
generated by LAA.

Then we need the magic to be able to turn an LAA remark into an LV
remark.  This is done via a new OptimizationRemark ctor.

llvm-svn: 282813
2016-09-30 00:01:30 +00:00
Adam Nemet
a367afa8b2 [Diag] Use non-static member initializer for IsVerbose. NFC
llvm-svn: 282812
2016-09-30 00:01:27 +00:00
Zachary Turner
d200751f68 Revert "Add llvm::enumerate() to STLExtras."
This reverts commit r282804 as it seems to use some C++ features
that not all compilers support.

llvm-svn: 282809
2016-09-29 23:05:41 +00:00
Zachary Turner
b83b38ce16 Add llvm::enumerate() to STLExtras.
enumerate allows you to iterate over a range by pairing the
iterator's value with its index in the enumeration.  This gives
you most of the benefits of using a for loop while still allowing
the range syntax.

llvm-svn: 282804
2016-09-29 22:59:30 +00:00
Sanjay Patel
29dc6bed46 [InstCombine] fix function names; NFC
Also, make foldSelectExtConst() a member of InstCombiner, remove
unnecessary parameters from its interface, and group visitSelectInst
helpers together in the header file.

llvm-svn: 282796
2016-09-29 22:18:30 +00:00
Joerg Sonnenberger
6a2f96cac9 GC HAVE_STRDUP.
llvm-svn: 282793
2016-09-29 21:50:37 +00:00
Joerg Sonnenberger
02c6e1640d GC more left-over libtool defines.
llvm-svn: 282791
2016-09-29 21:47:34 +00:00
Joerg Sonnenberger
5e1585521e GC HAVE_PRINTF_A, HAVE_STD_ISINF_IN_CMATH and HAVE_STD_ISNAN_IN_CMATH
llvm-svn: 282789
2016-09-29 21:45:45 +00:00
Joerg Sonnenberger
220947e66f HAVE_DIA_SDK is directly checked by value, so define it as 0/1.
llvm-svn: 282788
2016-09-29 21:44:25 +00:00
Joerg Sonnenberger
1d615d4436 Move _chsize_s and _Unwind_Backtrace to the correct position.
llvm-svn: 282786
2016-09-29 21:42:36 +00:00
Joerg Sonnenberger
4f1bd48bae Fix HAVE_POSIX_FALLOCATE entry.
llvm-svn: 282785
2016-09-29 21:39:53 +00:00
Joerg Sonnenberger
6a45916f71 Fix comments to match autoconf.
llvm-svn: 282784
2016-09-29 21:39:11 +00:00
Joerg Sonnenberger
6a90b11cb3 GC HAVE_DLD.
llvm-svn: 282783
2016-09-29 21:37:46 +00:00
Joerg Sonnenberger
39c880f477 GC HAVE_DYLD, HAVE_PRELOADED_SYMBOLS and HAVE_SHL_LOAD
llvm-svn: 282782
2016-09-29 21:35:27 +00:00
Joerg Sonnenberger
722a4bfa22 Sort mallctl, fix comment for mallinfo.
llvm-svn: 282781
2016-09-29 21:33:53 +00:00
Joerg Sonnenberger
1da18e65b3 GC HAVE_DLERROR.
llvm-svn: 282780
2016-09-29 21:32:30 +00:00
Joerg Sonnenberger
8b77a8502e GC srand48/lrand48/drand48.
llvm-svn: 282779
2016-09-29 21:31:54 +00:00
Joerg Sonnenberger
b60414eb27 GC HAVE_BCOPY.
llvm-svn: 282778
2016-09-29 21:30:23 +00:00
Joerg Sonnenberger
4094bb2329 GC opendir/readdir/closedir checks.
llvm-svn: 282776
2016-09-29 21:29:57 +00:00
Joerg Sonnenberger
1b77ccf7a5 GC HAVE_SETJMP_H and checks for the content of setjmp.h.
llvm-svn: 282775
2016-09-29 21:28:37 +00:00