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30 Commits

Author SHA1 Message Date
Alp Toker
03b6e12fae Reduce verbiage of lit.local.cfg files 
We can just split targets_to_build in one place and make it immutable.

llvm-svn: 210496
 2014-06-09 22:42:55 +00:00
Tim Northover
31e1362588 TableGen: fix operand counting for aliases 
TableGen has a fairly dubious heuristic to decide whether an alias should be
printed: does the alias have lest operands than the real instruction. This is
bad enough (particularly with no way to override it), but it should at least be
calculated consistently for both strings.

This patch implements that logic: first get the *correct* string for the
variant, in the same way as the Matcher, without guessing; then count the
number of whitespace chars.

There are basically 4 changes this brings about after the previous
commits; all of these appear to be good, so I have changed the tests:

+ ARM64: we print "neg X, Y" instead of "sub X, xzr, Y".
+ ARM64: we skip implicit "uxtx" and "uxtw" modifiers.
+ Sparc: we print "mov A, B" instead of "or %g0, A, B".
+ Sparc: we print "fcmpX A, B" instead of "fcmpX %fcc0, A, B"

llvm-svn: 208969
 2014-05-16 09:42:04 +00:00
Venkatraman Govindaraju
34b3409b1a [Sparc] Add trap on integer condition codes (Ticc) instructions to Sparc backend. 
llvm-svn: 202670
 2014-03-02 23:39:07 +00:00
Venkatraman Govindaraju
773ff0c22b [Sparc] Add return/rett instruction to Sparc backend. 
llvm-svn: 202666
 2014-03-02 22:55:53 +00:00
Venkatraman Govindaraju
bb48cf7681 [Sparc] Add fcmpe* instructions to Sparc backend. 
llvm-svn: 202661
 2014-03-02 19:56:19 +00:00
Venkatraman Govindaraju
13d3f28f34 [Sparc] Add VIS instructions to sparc backend. 
llvm-svn: 202660
 2014-03-02 19:31:21 +00:00
Venkatraman Govindaraju
caf11daede [SparcV9] Adds support for branch on integer register instructions (BPr) and conditional moves on integer register (MOVr/FMOVr). 
llvm-svn: 202628
 2014-03-02 09:46:56 +00:00
Venkatraman Govindaraju
e478c48fa6 [Sparc] Add support for parsing branches and conditional move instructions with %fcc1-%fcc3 conditional registers. 
llvm-svn: 202616
 2014-03-02 06:28:15 +00:00
Venkatraman Govindaraju
6aea38dc6d [Sparc] Add support for parsing fcmp with %fcc registers. 
llvm-svn: 202610
 2014-03-02 03:39:39 +00:00
Venkatraman Govindaraju
1c2ec775cb [SparcV9] Add support for parsing branch instructions with prediction. 
llvm-svn: 202602
 2014-03-01 22:03:07 +00:00
Venkatraman Govindaraju
44a4d4b894 [Sparc] Add support for parsing annulled branch instructions. 
llvm-svn: 202599
 2014-03-01 20:08:48 +00:00
Venkatraman Govindaraju
30d1614f94 [Sparc] Add support for parsing sparcv9 instructions addc/subc/addccc/subccc. 
llvm-svn: 202598
 2014-03-01 18:54:52 +00:00
Venkatraman Govindaraju
96169e7898 [Sparc] Add missing ALU instruction patterns. 
llvm-svn: 202597
 2014-03-01 17:51:00 +00:00
Venkatraman Govindaraju
78e98664c7 Add support for parsing sun-style section flags in ELFAsmParser. 
llvm-svn: 202573
 2014-03-01 06:21:00 +00:00
Venkatraman Govindaraju
9242ded302 [Sparc] Implement writeNopData. Emit actual NOP instruction instead of just filling with zeroes. 
llvm-svn: 202572
 2014-03-01 05:45:09 +00:00
Venkatraman Govindaraju
dd81a65959 [Sparc] Teach SparcAsmParser to emit correct relocations for PIC code. 
llvm-svn: 202571
 2014-03-01 05:07:21 +00:00
Venkatraman Govindaraju
789e2fd1b7 [Sparc] Add support for parsing directives in SparcAsmParser. 
llvm-svn: 202564
 2014-03-01 02:18:04 +00:00
Venkatraman Govindaraju
439a7d90a6 [Sparc] Emit 'restore' instead of 'restore %g0, %g0, %g0'. This improves the readability of the generated code. 
llvm-svn: 202563
 2014-03-01 01:04:26 +00:00
Venkatraman Govindaraju
b3d477bcf8 [Sparc] Add support for parsing synthetic instruction 'mov'. 
llvm-svn: 200965
 2014-02-07 09:06:52 +00:00
Venkatraman Govindaraju
772dbc91ad [Sparc] Emit correct encoding for atomic instructions. Also, add support for parsing CAS instructions to test the CAS encoding. 
llvm-svn: 200963
 2014-02-07 07:34:49 +00:00
Venkatraman Govindaraju
61788f1428 [Sparc] Add support for sparc relocation types in ELF object file. 
llvm-svn: 200112
 2014-01-26 03:21:28 +00:00
Venkatraman Govindaraju
740a35b34e [Sparc] Correct quad register list in the asm parser. 
Add test cases to check parsing of v9 double registers and their aliased quad registers.

llvm-svn: 199974
 2014-01-24 05:24:01 +00:00
Venkatraman Govindaraju
816c9a7dd9 [Sparc] Add support for parsing floating point instructions. 
llvm-svn: 199033
 2014-01-12 04:48:54 +00:00
Venkatraman Govindaraju
c4cec3f2a4 [Sparc] Add support for parsing jmpl instruction and make indirect call and jmp instructions as aliases to jmpl. 
llvm-svn: 198909
 2014-01-10 01:48:17 +00:00
Venkatraman Govindaraju
0e7023f897 [SparcV9] Rename operands in some sparc64 instructions so that TableGen can encode them correctly. 
llvm-svn: 198740
 2014-01-08 07:47:57 +00:00
Venkatraman Govindaraju
d26e61b5c9 [Sparc] Add support for parsing branch instructions and conditional moves. 
llvm-svn: 198738
 2014-01-08 06:14:52 +00:00
Venkatraman Govindaraju
69760d5a12 [Sparc] Add support for parsing sparc asm modifiers such as %hi, %lo etc., 
Also, correct the offsets for FixupsKindInfo.

llvm-svn: 198681
 2014-01-07 08:00:49 +00:00
Venkatraman Govindaraju
a9c093fcc8 [Sparc] Add support for parsing memory operands in sparc AsmParser. 
llvm-svn: 198658
 2014-01-07 01:49:11 +00:00
Venkatraman Govindaraju
77e789f69a Add lit.local.cfg for MC/Sparc 
llvm-svn: 198536
 2014-01-05 03:07:04 +00:00
Venkatraman Govindaraju
7b675d45b0 [Sparc] Add initial implementation of MC Code emitter for sparc. 
llvm-svn: 198533
 2014-01-05 02:13:48 +00:00