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Commit Graph

2772 Commits

Author SHA1 Message Date
Evan Cheng
973fceab0c Disable opt-ext pass to unbreak the build for now.
llvm-svn: 93286
2010-01-13 01:51:43 +00:00
Jeffrey Yasskin
59ca529e20 Try to fix the ARM and PPC buildbots. The -mattr=vector-unaligned-mem
flag doesn't exist there, and this is an x86 test.

llvm-svn: 93279
2010-01-13 00:31:43 +00:00
Evan Cheng
76db3bb18e Add a quick pass to optimize sign / zero extension instructions. For targets where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg.
For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used.

llvm-svn: 93278
2010-01-13 00:30:23 +00:00
Evan Cheng
0dddace5f1 Add nounwind.
llvm-svn: 93244
2010-01-12 18:29:23 +00:00
Duncan Sands
395053f13a Revert commit 93204, since it causes the assembler to barf
on x86-64 linux with messages like this:
Error: Incorrect register `%r14' used with `l' suffix

llvm-svn: 93242
2010-01-12 17:46:16 +00:00
Dan Gohman
a48d524fbc Make several tests less fragile.
llvm-svn: 93230
2010-01-12 04:52:47 +00:00
Dan Gohman
51b3e804dc Reapply the MOV64r0 patch, with a fix: MOV64r0 clobbers EFLAGS.
llvm-svn: 93229
2010-01-12 04:42:54 +00:00
Evan Cheng
a93b476689 Add manual ISD::OR fastisel selection routines. TableGen is no longer autogen them after 93152 and 93191.
llvm-svn: 93204
2010-01-11 22:59:27 +00:00
Evan Cheng
bd938ebc90 Extend r93152 to work on OR r, r. If the source set bits are known not to overlap, then select as an ADD instead.
llvm-svn: 93191
2010-01-11 22:03:29 +00:00
Chris Lattner
644f29ddf5 reduce this to a sensible testcase.
llvm-svn: 93189
2010-01-11 21:58:19 +00:00
David Greene
5d479fa341 Shorten up this testcase.
llvm-svn: 93187
2010-01-11 21:50:35 +00:00
Evan Cheng
bc84a42d7b Revert 93158. It's breaking quite a few x86_64 tests.
llvm-svn: 93185
2010-01-11 21:13:41 +00:00
Jakob Stoklund Olesen
f1c71ef6ba Avoid adding PHI arguments for a predecessor that has gone away when a BRCOND was constant folded.
This fixes PR5980.

llvm-svn: 93184
2010-01-11 21:02:33 +00:00
Dan Gohman
541c4f4c5d Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it
has an immediate with at least 32 bits of leading zeros, to avoid needing to
materialize that immediate in a register first.

FileCheckize, tidy, and extend a testcase to cover this case.

This fixes rdar://7527390.

llvm-svn: 93160
2010-01-11 17:58:34 +00:00
Dan Gohman
5b79391087 Re-instate MOV64r0 and MOV16r0, with adjustments to work with the
new AsmPrinter. This is perhaps less elegant than describing them
in terms of MOV32r0 and subreg operations, but it allows the
current register to rematerialize them.

llvm-svn: 93158
2010-01-11 17:37:57 +00:00
Dan Gohman
5f2685d424 Generalize this check to avoid depending on a specific register assignment.
llvm-svn: 93157
2010-01-11 17:24:27 +00:00
Dan Gohman
d2df677a8f Make this test less trivial, to avoid spurious failures.
llvm-svn: 93156
2010-01-11 17:23:56 +00:00
Evan Cheng
ee806a0db5 Select an OR with immediate as an ADD if the input bits are known zero. This allow the instruction to be 3address-fied if needed.
llvm-svn: 93152
2010-01-11 17:03:47 +00:00
David Greene
b879ff4855 Implement a feature (-vector-unaligned-mem) to allow targets to
ignore alignment requirements for SIMD memory operands.  This
is useful on architectures like the AMD 10h that do not trap on
unaligned references if a status bit is twiddled at startup time.

llvm-svn: 93151
2010-01-11 16:29:42 +00:00
Jeffrey Yasskin
53a8f3981c Fix http://llvm.org/PR5729: x86-64 tail calls were putting their targets into
R11, and then asserting that the target was in R9.  Since R9 isn't reserved for
the target anymore, and is used as an argument, this patch changes the
assertion.

llvm-svn: 93065
2010-01-09 18:56:43 +00:00
Dan Gohman
3708af1c59 Revert an earlier change to SIGN_EXTEND_INREG for vectors. The VTSDNode
really does need to be a vector type, because
TargetLowering::getOperationAction for SIGN_EXTEND_INREG uses that type,
and it needs to be able to distinguish between vectors and scalars.

Also, fix some more issues with legalization of vector casts.

llvm-svn: 93043
2010-01-09 02:13:55 +00:00
Evan Cheng
2e497d1ed4 Fix a critical bug in 64-bit atomic operation lowering for 32-bit. The results of the cmpxchg8b instructions are being thrown away when it branches back to the top of the checking loop. This means the loop always compares against the old value and this can result in a dead lock.
llvm-svn: 93028
2010-01-08 23:41:50 +00:00
Evan Cheng
f96a9ec02b ReplaceAllUsesOfValueWith may delete other nodes that the one being replaced. Do not delete dead nodes again.
llvm-svn: 92988
2010-01-08 02:36:12 +00:00
Chris Lattner
e0199dff81 Fix rdar://7517201, a regression introduced by r92849.
When folding a and(any_ext(load)) both the any_ext and the
load have to have only a single use.

This removes the anyext-uses.ll testcase which started failing
because it is unreduced and unclear what it is testing.

llvm-svn: 92950
2010-01-07 21:59:23 +00:00
Evan Cheng
4523041394 APInt'fy TargetLowering::SimplifySetCC to fix PR5963.
llvm-svn: 92943
2010-01-07 20:58:44 +00:00
Evan Cheng
51d86260ff Fix a minor regression from my dag combiner changes. One more place which needs to look pass truncates.
llvm-svn: 92885
2010-01-07 00:54:06 +00:00
Jakob Stoklund Olesen
09012552b8 Add comments.
llvm-svn: 92883
2010-01-07 00:51:04 +00:00
Jakob Stoklund Olesen
a63aa4e54b Add Target hook to duplicate machine instructions.
Some instructions refer to unique labels, and so cannot be trivially cloned
with CloneMachineInstr.

llvm-svn: 92873
2010-01-06 23:47:07 +00:00
Evan Cheng
25dcf9b830 Teach dag combine to fold the following transformation more aggressively:
(OP (trunc x), (trunc y)) -> (trunc (OP x, y))

Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel.

This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places.

llvm-svn: 92849
2010-01-06 19:38:29 +00:00
Dan Gohman
93a28a6ce9 Move this test from test/Transforms/IndVarSimplify to
test/CodeGen/X86, as doesn't use -indvars, and it does use
llc -march=x86-64.

llvm-svn: 92799
2010-01-05 22:52:54 +00:00
Bill Wendling
7e9607ab56 Don't assign the shift the same type as the variable being shifted. This could
result in illegal types for the SHL operator.

llvm-svn: 92797
2010-01-05 22:39:10 +00:00
Dan Gohman
5fa04f2707 Delete useless trailing semicolons.
llvm-svn: 92740
2010-01-05 17:55:26 +00:00
Dan Gohman
73b0882c6e Make this test more portable.
llvm-svn: 92514
2010-01-04 21:23:34 +00:00
Dan Gohman
b71bc40eed Add some tests and update an existing test to reflect recent
x86 isel peeps.

llvm-svn: 92509
2010-01-04 20:53:54 +00:00
Anton Korobeynikov
3915cf5ef4 Fix invalid chain folding for memory variant of sdiv / udiv
llvm-svn: 92472
2010-01-04 10:31:54 +00:00
Chris Lattner
8e83066d12 fix PR5930, allowing the asmprinter to emit difference between
two labels as a truncate.

llvm-svn: 92455
2010-01-03 18:33:18 +00:00
Chris Lattner
49cda26f7e add PR#
llvm-svn: 92451
2010-01-03 18:10:58 +00:00
Chris Lattner
7246a69d2b differences between two blockaddress's don't cause a
global variable initializer to require relocations.

llvm-svn: 92450
2010-01-03 18:09:40 +00:00
Chris Lattner
9e64bad0da allow this to work on linux hosts.
llvm-svn: 92407
2010-01-02 00:22:15 +00:00
Chris Lattner
fe8af82cd4 Teach codegen to handle:
(X != null) | (Y != null) --> (X|Y) != 0
 (X == null) & (Y == null) --> (X|Y) == 0

so that instcombine can stop doing this for pointers.  This is part of PR3351,
which is a case where instcombine doing this for pointers (inserting ptrtoint)
is pessimizing code.

llvm-svn: 92406
2010-01-02 00:00:03 +00:00
Chris Lattner
4e49a69ec5 rename file.
llvm-svn: 92405
2010-01-01 23:55:04 +00:00
Chris Lattner
44298d184a Teach codegen to lower llvm.powi to an efficient (but not optimal)
multiply sequence when the power is a constant integer.  Before, our
codegen for std::pow(.., int) always turned into a libcall, which was
really inefficient.

This should also make many gfortran programs happier I'd imagine.

llvm-svn: 92388
2010-01-01 03:32:16 +00:00
Chris Lattner
3d38dbff2a Make this more likely to generate a libcall.
llvm-svn: 92387
2010-01-01 03:26:51 +00:00
Sanjiv Gupta
543a6716fb Extern declaration for unordered.f32 libcall was not being emitted. Fixed that.
llvm-svn: 92242
2009-12-29 03:24:34 +00:00
Sanjiv Gupta
efad5b2a93 Fixed llc crash for zext (i1 -> i8) loads.
llvm-svn: 92201
2009-12-28 04:53:24 +00:00
Chris Lattner
4e96d36f72 handle equality memcmp of 8 bytes on x86-64 with two unaligned loads and a
compare.  On other targets we end up with a call to memcmp because we don't
want 16 individual byte loads.  We should be able to use movups as well, but
we're failing to select the generated icmp.

llvm-svn: 92107
2009-12-24 01:07:17 +00:00
Chris Lattner
5d3919d5f9 move an optimization for memcmp out of simplifylibcalls and into
SDISel.  This optimization was causing simplifylibcalls to 
introduce type-unsafe nastiness.  This is the first step, I'll be 
expanding the memcmp optimizations shortly, covering things that
we really really wouldn't want simplifylibcalls to do.

llvm-svn: 92098
2009-12-24 00:37:38 +00:00
Sanjiv Gupta
7872817f59 Reapply 91904.
llvm-svn: 91996
2009-12-23 11:19:09 +00:00
Sanjiv Gupta
1cd15ef29f deleting empty file.
llvm-svn: 91994
2009-12-23 10:35:24 +00:00
Sanjiv Gupta
70e1523215 Reverting back 91904.
llvm-svn: 91993
2009-12-23 09:46:01 +00:00