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Author SHA1 Message Date
Chandler Carruth
1926e141f1 FileCheck-ize and simplify RUN lines. 
llvm-svn: 134352
 2011-07-02 20:43:11 +00:00
Chandler Carruth
5de1d825e4 FileCheck-ize 
llvm-svn: 134351
 2011-07-02 20:43:08 +00:00
Chandler Carruth
01e8f9314e FileCheck-ize and tighten up assertions to only check the relevant sections. 
llvm-svn: 134350
 2011-07-02 20:43:04 +00:00
Chandler Carruth
500b05b1bb FileCheck-ize and cleanup IR. 
llvm-svn: 134349
 2011-07-02 20:43:01 +00:00
Chandler Carruth
c674fb38ef FileCheck-ize 
llvm-svn: 134348
 2011-07-02 20:42:59 +00:00
Chandler Carruth
341ed5f0a0 Remove a grep that is already checked with FileCheck. 
llvm-svn: 134346
 2011-07-02 20:42:56 +00:00
Chandler Carruth
88e183829b FileCheck-ize 
llvm-svn: 134345
 2011-07-02 20:42:53 +00:00
Chandler Carruth
7a0f51e003 FileCheck-ize and modernize IR. 
llvm-svn: 134344
 2011-07-02 20:42:50 +00:00
Chandler Carruth
4af34fe339 FileCheck-ize and simplify RUNs. 
llvm-svn: 134343
 2011-07-02 20:42:48 +00:00
Chandler Carruth
9e114fc3ee FileCheck-ize and modernize the RUN line. 
llvm-svn: 134342
 2011-07-02 20:42:44 +00:00
Chandler Carruth
df1690a113 FileCheck-ize, tightening checks and avoiding a temporary file. 
llvm-svn: 134341
 2011-07-02 20:42:42 +00:00
Chandler Carruth
a5b1de166b FileCheck-ize, tightening checks and avoiding a temporary file. 
llvm-svn: 134340
 2011-07-02 20:42:39 +00:00
Chandler Carruth
c041ee0766 FileCheck-ize 
llvm-svn: 134339
 2011-07-02 20:42:36 +00:00
Chandler Carruth
4f82b948fd FileCheck-ize 
llvm-svn: 134338
 2011-07-02 20:42:33 +00:00
Chandler Carruth
e344d9c676 FileCheck-ize a test, avoiding a temporary file. 
llvm-svn: 134337
 2011-07-02 20:42:31 +00:00
Chandler Carruth
d939fba46d FileCheck-ize and simplify this test. 
llvm-svn: 134336
 2011-07-02 20:42:28 +00:00
Chandler Carruth
b870175dd5 FileCheck-ize 
llvm-svn: 134335
 2011-07-02 20:42:25 +00:00
Chandler Carruth
d98a57cc5a FileCheck-ize another codegen test. 
llvm-svn: 134334
 2011-07-02 20:42:22 +00:00
Chandler Carruth
4c7e28777b Partially FileCheck-ize a test to remove a weird quoting situation. 
llvm-svn: 134333
 2011-07-02 20:42:20 +00:00
Chandler Carruth
0d1da937eb FileCheck-ize another test, and upgrade its syntax a bit. 
llvm-svn: 134332
 2011-07-02 20:42:17 +00:00
Chandler Carruth
4fd8502d12 FileCheck-ize another codegen test, tightening it up. 
llvm-svn: 134331
 2011-07-02 20:42:14 +00:00
Chandler Carruth
b74aff3ce8 FileCheck-ize another test, making it much more precise for testing the 
individual cases, while hard coding less about registers in use.

llvm-svn: 134330
 2011-07-02 20:42:11 +00:00
Chandler Carruth
70fa55f478 FileCheck-ize another test. This one is more clear and runs fewer 
commands as a result.

llvm-svn: 134329
 2011-07-02 20:42:08 +00:00
Chandler Carruth
72358a4bf8 FileCheck-ize a test, no functionality changed. 
llvm-svn: 134328
 2011-07-02 20:42:06 +00:00
Jordy Rose
6f7044e2b9 Use subprocess.Popen instead of popen2 to stop a deprecation warning when running lit on OS X 
llvm-svn: 134324
 2011-07-02 17:28:55 +00:00
Duncan Sands
da72617832 Remove unused array. 
llvm-svn: 134323
 2011-07-02 16:36:24 +00:00
Duncan Sands
3eb91b3dfd Revert previous commit. It seems that whether casting to void 
is valid or not depends on which system you build.

llvm-svn: 134321
 2011-07-02 13:14:22 +00:00
Duncan Sands
938be63a66 Supress gcc-4.5 warning about the result not being used. 
llvm-svn: 134319
 2011-07-02 13:06:23 +00:00
Duncan Sands
c1389003b7 Remove unused constant. 
llvm-svn: 134318
 2011-07-02 13:05:02 +00:00
Rafael Espindola
cf67208057 Use getVNInfoAt. 
llvm-svn: 134312
 2011-07-02 07:50:27 +00:00
Jakob Stoklund Olesen
4d72701c7e Consistent diagnostic capitalization and redundant context elimination. 
llvm-svn: 134311
 2011-07-02 07:23:40 +00:00
Jakob Stoklund Olesen
b94d989634 Better diagnostics when inline asm fails to allocate. 
asm.c:2:7: error: ran out of registers during register allocation
  asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9));
        ^

llvm-svn: 134310
 2011-07-02 07:17:37 +00:00
Rafael Espindola
a8c92aa8ef Check the VN of the src register at the two copies, not just the 
register number.

llvm-svn: 134309
 2011-07-02 05:34:02 +00:00
Eric Christopher
9689f96b1e Be less specific about register allocation ordering. 
llvm-svn: 134308
 2011-07-02 04:06:41 +00:00
Jakob Stoklund Olesen
c19c47697f Include a source location when complaining about bad inline assembly. 
Add a MI->emitError() method that the backend can use to report errors
related to inline assembly. Call it from X86FloatingPoint.cpp when the
constraints are wrong.

This enables proper clang diagnostics from the backend:

$ clang -c pr30848.c
pr30848.c:5:12: error: Inline asm output regs must be last on the x87 stack
  __asm__ ("" : "=u" (d));  /* { dg-error "output regs" } */
           ^
1 error generated.

llvm-svn: 134307
 2011-07-02 03:53:34 +00:00
Andrew Trick
ac38d56661 indvars -disable-iv-rewrite: bug fix involving weird geps and related cleanup. 
llvm-svn: 134306
 2011-07-02 02:34:25 +00:00
Jakob Stoklund Olesen
60871c3ee0 Use a new strategy for preventing eviction loops in RAGreedy. 
Every live range is assigned a cascade number the first time it is
involved in an eviction. As the evictor, it gets a new cascade number.
Every evictee is assigned the same cascade number as the evictor.

Eviction is prohibited if the evictor has a lower assigned cascade
number than the evictee.

This means that assigned cascade numbers are monotonically increasing
with every eviction, yet they are bounded by NextCascade which can only
be incremented by new live ranges. Thus, infinite loops cannot happen,
but eviction cascades can still be triggered by new live ranges as we
want.

Thanks to Andy for explaining this to me.

llvm-svn: 134303
 2011-07-02 01:37:09 +00:00
Evan Cheng
09210c224a Add getFeatureBits to extract feature bits for a given CPU. 
llvm-svn: 134298
 2011-07-02 00:43:44 +00:00
Eric Christopher
491e8d6593 Remove the confusing getDarwinNumber() api and friends. 
Part of rdar://9714064

llvm-svn: 134291
 2011-07-02 00:19:55 +00:00
Cameron Zwarich
6ea6623f23 Take a stab at fixing the llvm-x86_64-linux-checks failure. 
llvm-svn: 134287
 2011-07-01 23:45:21 +00:00
Eric Christopher
7260817287 TargetConstant immediates won't be placed into registers so tighten 
up the valid constant check earlier.

rdar://9692967

llvm-svn: 134286
 2011-07-01 23:04:38 +00:00
Douglas Gregor
6ebfe1623c Add initial *-*-rtems* target, from Joel Sherrill 
llvm-svn: 134282
 2011-07-01 22:41:06 +00:00
Evan Cheng
018b2055fc Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. 
llvm-svn: 134281
 2011-07-01 22:36:09 +00:00
Evan Cheng
a230202d5e Add MCSubtargetInfo target registry stuff. 
llvm-svn: 134279
 2011-07-01 22:25:04 +00:00
Dan Gohman
c093f48834 Teach IVUsers to stop at non-affine expressions unless they are both 
outside the loop and reducible.

This more completely hides them from LSR, which isn't usually able to
do anything meaningful with non-affine expressions anyway, and this
consequently hides them from SCEVExpander, which is acutely unprepared
for non-affine expressions.

Replace test/CodeGen/X86/lsr-nonaffine.ll with a new test that tests
the new behavior.

This works around the bug in PR10117 / rdar://problem/9633149, and is
generally an improvement besides.

llvm-svn: 134268
 2011-07-01 22:05:19 +00:00
Owen Anderson
dccc4e4b9a Generalize @llvm.ctlz, @llvm.cttz, and @llvm.ctpop to work on vectors of integers, and fix the one optimization pass that I'm aware of that needs updating for this. At least one current target, ARM NEON, can implement these operations on vectors directly. 
llvm-svn: 134265
 2011-07-01 21:52:38 +00:00
Eli Friedman
c3fee5e2c7 Calling-convention specifications for illegal types are no-ops. Simplify based on this. 
llvm-svn: 134264
 2011-07-01 21:33:28 +00:00
Jim Grosbach
461adc233e ARMv7M vs. ARMv7E-M support. 
The DSP instructions in the Thumb2 instruction set are an optional extension
in the Cortex-M* archtitecture. When present, the implementation is considered
an "ARMv7E-M implementation," and when not, an "ARMv7-M implementation."

Add a subtarget feature hook for the v7e-m instructions and hook it up. The
cortex-m3 cpu is an example of a v7m implementation, while the cortex-m4 is
a v7e-m implementation.

rdar://9572992

llvm-svn: 134261
 2011-07-01 21:12:19 +00:00
Evan Cheng
e7e74a3250 Rename TargetSubtarget to TargetSubtargetInfo for consistency. 
llvm-svn: 134259
 2011-07-01 21:01:15 +00:00
Evan Cheng
771cdf9b5d - Added MCSubtargetInfo to capture subtarget features and scheduling 
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
  and hide more details from targets.

llvm-svn: 134257
 2011-07-01 20:45:01 +00:00