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76 Commits

Author SHA1 Message Date
Anton Korobeynikov
ae224d3711 Use conventional syntax for branches. 
Patch by Job!

llvm-svn: 186291
 2013-07-14 18:19:44 +00:00
Jakob Stoklund Olesen
1149a36ced Move MRI liveouts to MSP430 return instructions. 
llvm-svn: 174411
 2013-02-05 18:12:06 +00:00
Jakob Stoklund Olesen
b8af245a15 Remove variable_ops from call instructions in most targets. 
Call instructions are no longer required to be variadic, and
variable_ops should only be used for instructions that encode a variable
number of arguments, like the ARM stm/ldm instructions.

llvm-svn: 160189
 2012-07-13 20:44:29 +00:00
Jia Liu
b077b6085d Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 
llvm-svn: 150878
 2012-02-18 12:03:15 +00:00
Chris Lattner
01e8c46349 Flag -> Glue, the ongoing saga 
llvm-svn: 122513
 2010-12-23 18:28:41 +00:00
Chris Lattner
ec4bb143ef fix breakage from r98938 by correctly marking msp430 calls as variadic. 
Patch by Ben Ransford!

llvm-svn: 106722
 2010-06-24 06:46:50 +00:00
Eric Christopher
4173fa9514 Remove isTwoAddress from MSP430. 
llvm-svn: 106455
 2010-06-21 20:07:30 +00:00
Eric Christopher
27afc6b948 Make 80-column. 
llvm-svn: 106448
 2010-06-21 18:56:55 +00:00
Anton Korobeynikov
f31181a0cc Do folding for indirect branches, where possible 
llvm-svn: 102836
 2010-05-01 12:28:21 +00:00
Anton Korobeynikov
9b724bd446 Implement indirect branches on MSP430 
llvm-svn: 102835
 2010-05-01 12:04:32 +00:00
Anton Korobeynikov
7a84875b09 Long branch target oparands are not pc-rel. 
This should fix PR6603.

llvm-svn: 102834
 2010-05-01 12:04:22 +00:00
Dan Gohman
99c6bcbc13 The mayHaveSideEffects flag is no longer used. 
llvm-svn: 97348
 2010-02-27 23:47:46 +00:00
Chris Lattner
7acf9be6c4 move target-independent opcodes out of TargetInstrInfo 
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687
 2010-02-09 19:54:29 +00:00
Anton Korobeynikov
f1080f2bbe Add branch relaxation pass (shamelessly stolen from PPC). 
llvm-svn: 93554
 2010-01-15 21:19:05 +00:00
Anton Korobeynikov
75c93b4ec3 Provide instruction sizes & encoding. No opcodes yet (but not needed so far). 
llvm-svn: 93553
 2010-01-15 21:18:39 +00:00
Anton Korobeynikov
719dd1465f Enable bit tests and setcc stuff. 
llvm-svn: 93552
 2010-01-15 21:18:18 +00:00
Anton Korobeynikov
fb1954f28d Fix cmp emission on msp430: we definitely should turn stuff like 
"icmp lhs, rhs" into "cmp rhs, lhs". This should fix PR5979.

llvm-svn: 93496
 2010-01-15 01:29:49 +00:00
Anton Korobeynikov
5cd169e17e Implement variable-width shifts. 
No testcase yet - it seems we're exposing generic codegen bugs.

llvm-svn: 91221
 2009-12-12 18:55:37 +00:00
Anton Korobeynikov
0ace515a4c Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas! 
llvm-svn: 90819
 2009-12-08 01:03:04 +00:00
Anton Korobeynikov
71b92ae4e0 Initial codegen support for MSP430 ISRs 
llvm-svn: 90739
 2009-12-07 02:27:53 +00:00
Anton Korobeynikov
10669b8c42 Drop unsupported imm operands 
llvm-svn: 89573
 2009-11-22 01:13:54 +00:00
Dan Gohman
4631d78a3b Set isBarrier = 1 on return instructions, as they are control barriers. 
llvm-svn: 86851
 2009-11-11 18:11:07 +00:00
Anton Korobeynikov
552b831b91 Add and-not (bic) patterns. Based heavily on patch by Brian Lucas! 
llvm-svn: 86471
 2009-11-08 15:33:12 +00:00
Anton Korobeynikov
ff23fbb6c0 Move OR patterns upper to all logical stuff. No functionality change. 
llvm-svn: 86470
 2009-11-08 15:32:44 +00:00
Anton Korobeynikov
79aadcfa1a Some nice peephole patterns. Based on patch by Brian Lucas! 
llvm-svn: 86469
 2009-11-08 15:32:28 +00:00
Anton Korobeynikov
aaf4cc8e92 Print tab before operand of jcc 
llvm-svn: 86468
 2009-11-08 15:32:11 +00:00
Anton Korobeynikov
6f4ee0efe1 Fix invalid operand updates & implement post-inc memory operands 
llvm-svn: 86466
 2009-11-08 14:27:38 +00:00
Anton Korobeynikov
123d792160 First try of the post-inc operands handling... Not fully worked, though :( 
llvm-svn: 86386
 2009-11-07 17:15:25 +00:00
Anton Korobeynikov
9dc741f523 Add some dummy support for post-incremented loads 
llvm-svn: 86385
 2009-11-07 17:15:06 +00:00
Dan Gohman
3393a4c997 Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a 
bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.

llvm-svn: 85517
 2009-10-29 18:10:34 +00:00
Anton Korobeynikov
d104087bfe Distinguish between pcrel imm operands and 'normal' ones. Fix fixes gross weirdness of asmprinting. 
llvm-svn: 84710
 2009-10-21 00:13:25 +00:00
Anton Korobeynikov
deadc3ed2d Add missed mem-mem move patterns 
llvm-svn: 83812
 2009-10-11 23:03:53 +00:00
Anton Korobeynikov
4465f90db6 Implement proper asmprinting for the globals. This eliminates bogus "call" modifier and also adds support for offsets wrt globals. 
llvm-svn: 83784
 2009-10-11 19:14:02 +00:00
Anton Korobeynikov
1f9ff55cbc It seems that OR operation does not affect status reg at all. 
Remove impdef of SRW. This fixes PR4779

llvm-svn: 83739
 2009-10-10 22:17:47 +00:00
Anton Korobeynikov
27fdf43425 Special constants as destinations does not work as expected - drop the patterns. 
llvm-svn: 78191
 2009-08-05 14:42:00 +00:00
Anton Korobeynikov
8753e89b79 Typo 
llvm-svn: 71975
 2009-05-17 10:15:22 +00:00
Anton Korobeynikov
02d9c5b905 Add imm-reg and imm-mem patters for cmp on msp430 
(imm is allowed to be source operand, not dest...)

llvm-svn: 71393
 2009-05-10 14:49:00 +00:00
Anton Korobeynikov
8364529d37 Add 8 bit select 
llvm-svn: 71235
 2009-05-08 18:50:26 +00:00
Anton Korobeynikov
df33e5a803 Handle implicit zext in a better way. Shamelessly stolen from x86 backend. 
Thanks for Dan Gohman for suggestion!

llvm-svn: 70782
 2009-05-03 15:50:18 +00:00
Anton Korobeynikov
8988fea464 Make handling of conditional stuff much more straightforward 
llvm-svn: 70767
 2009-05-03 13:19:09 +00:00
Anton Korobeynikov
d8c42b2dee Temporary disable imm patterns for cmp. Actually, all cmp-related stuff (select_cc, setcc, br_cc). needs to be rethought 
llvm-svn: 70766
 2009-05-03 13:18:50 +00:00
Anton Korobeynikov
4b5232c990 Add 8bit shifts 
llvm-svn: 70759
 2009-05-03 13:16:37 +00:00
Anton Korobeynikov
d0e3939bdf Handle logical shift right (at least I hope so :) ) 
llvm-svn: 70758
 2009-05-03 13:16:17 +00:00
Anton Korobeynikov
7dd27f2e41 Handle anyext 
llvm-svn: 70757
 2009-05-03 13:15:57 +00:00
Anton Korobeynikov
b97b120cf9 Implement bswap 
llvm-svn: 70753
 2009-05-03 13:15:03 +00:00
Anton Korobeynikov
cebc97d79c Properly handle ExternalSymbol's 
llvm-svn: 70752
 2009-05-03 13:14:46 +00:00
Anton Korobeynikov
80d0bdc789 Provide addc and subc 
llvm-svn: 70748
 2009-05-03 13:13:34 +00:00
Anton Korobeynikov
1f80bde7ad Add left shift 
llvm-svn: 70747
 2009-05-03 13:13:17 +00:00
Anton Korobeynikov
d9b4143e47 Add direct branch 
llvm-svn: 70746
 2009-05-03 13:12:58 +00:00
Anton Korobeynikov
c5a13f6a3f It's error-prone to maintain two separate variants of asmprinting stuff, one of which is even used. Drop second (aka 'intel') variant of operands. It can be added later, if needed. 
llvm-svn: 70745
 2009-05-03 13:12:37 +00:00