1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-27 22:12:47 +01:00
Commit Graph

89 Commits

Author SHA1 Message Date
Chris Lattner
01e8c46349 Flag -> Glue, the ongoing saga
llvm-svn: 122513
2010-12-23 18:28:41 +00:00
Eric Christopher
318243d2c6 Remove isTwoAddress from SystemZ.
llvm-svn: 106467
2010-06-21 20:25:57 +00:00
Jakob Stoklund Olesen
b3539aa611 Merge the SystemZ subreg_even32 SubRegIndex into subreg_32bit. The SubRegIndices
were overspecified when inheriting sub-subregisters, for instance:

R0Q:subreg_even32 = R0Q:subreg_32bit = R0Q:subreg_even:subreg_32bit.

This meant that composeSubRegIndices(subreg_even, subreg_32bit) was ambiguous.

llvm-svn: 105063
2010-05-28 23:48:29 +00:00
Chris Lattner
4a35b78926 Improve systemz to model cmp and ucmp nodes as returning
their flags correctly.

llvm-svn: 99738
2010-03-28 05:21:52 +00:00
Chris Lattner
896b393fab set SDNPVariadic on nodes throughout the rest of the targets that
need them.

llvm-svn: 98937
2010-03-19 05:33:51 +00:00
Chris Lattner
b198628a6b fix a type compatibility bug. imm is i32 in the input
pattern, not i64.

llvm-svn: 97956
2010-03-08 18:52:55 +00:00
Dan Gohman
99c6bcbc13 The mayHaveSideEffects flag is no longer used.
llvm-svn: 97348
2010-02-27 23:47:46 +00:00
Dan Gohman
3393a4c997 Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a
bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.

llvm-svn: 85517
2009-10-29 18:10:34 +00:00
Dan Gohman
b20fae567f Update SystemZ to use PSW following the way x86 uses EFLAGS. Besides
eliminating a use of MVT::Flag, this is needed for an upcoming CodeGen
change.

This unfortunately requires SystemZ to switch to the list-burr
scheduler, in order to handle the physreg defs properly, however
that's what LLVM has available at this time.

llvm-svn: 85357
2009-10-28 00:55:57 +00:00
Anton Korobeynikov
23ecf9767c Some dummy cost model for s390x:
- Prefer short-imm instructions over ext-imm, when possible
 - Prefer Z10 instructions over Z9, when possible

This hopefully should fix some dejagnu test fails on solaris

llvm-svn: 79741
2009-08-22 11:46:16 +00:00
Anton Korobeynikov
a6998a6d4c Typo :(
llvm-svn: 79657
2009-08-21 18:41:02 +00:00
Anton Korobeynikov
3756177f71 Correct instruction names for subtract-with-borrow
llvm-svn: 79656
2009-08-21 18:37:28 +00:00
Anton Korobeynikov
81300620cf Convert bswap test to filecheck, add more test entries & convert stuff to filecheck
llvm-svn: 78212
2009-08-05 16:50:53 +00:00
Anton Korobeynikov
c95b5fb0e5 Add memory versions of some instructions.
Patch by Neale Ferguson!

llvm-svn: 78203
2009-08-05 16:16:11 +00:00
Anton Korobeynikov
d8faa95b25 Add carry producing / using versions of add / sub
llvm-svn: 76316
2009-07-18 14:16:06 +00:00
Anton Korobeynikov
ff561b2308 Provide expansion for ct* intrinsics
llvm-svn: 76311
2009-07-18 12:26:13 +00:00
Anton Korobeynikov
3e8bb65ec8 Temporary disable 16 bit bswap
llvm-svn: 76063
2009-07-16 14:35:57 +00:00
Anton Korobeynikov
94e21c8740 Add instruction formats and few opcodes
llvm-svn: 76062
2009-07-16 14:35:20 +00:00
Anton Korobeynikov
e11a89ba74 Add bswap patterns
llvm-svn: 76061
2009-07-16 14:34:52 +00:00
Anton Korobeynikov
6c622a4547 Provide crazy pseudos for regpairs spills / reloads
llvm-svn: 76060
2009-07-16 14:34:15 +00:00
Anton Korobeynikov
2e8f54d16d Revert the commit, it just hides the real bug
llvm-svn: 76045
2009-07-16 14:28:26 +00:00
Anton Korobeynikov
0276bc9176 Out GR128 regclass is not a 'real' i128 one.
llvm-svn: 76044
2009-07-16 14:27:53 +00:00
Anton Korobeynikov
4181716247 Handle bitconverts
llvm-svn: 76042
2009-07-16 14:27:01 +00:00
Anton Korobeynikov
bbf0fe2a76 Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
llvm-svn: 76035
2009-07-16 14:24:41 +00:00
Anton Korobeynikov
df2f045667 Handle FP callee-saved regs
llvm-svn: 76029
2009-07-16 14:23:01 +00:00
Anton Korobeynikov
643215b0d7 Implement all comparisons
llvm-svn: 76017
2009-07-16 14:19:54 +00:00
Anton Korobeynikov
488f8c2fd1 Add constpool lowering / printing
llvm-svn: 76016
2009-07-16 14:19:35 +00:00
Anton Korobeynikov
d8ced10967 Fix fallout from prev. patch
llvm-svn: 76012
2009-07-16 14:18:31 +00:00
Anton Korobeynikov
bf722c6946 Use divide single for 32 bit signed divides
llvm-svn: 76010
2009-07-16 14:17:52 +00:00
Anton Korobeynikov
b3af53a626 Implement 'large' PIC model
llvm-svn: 76006
2009-07-16 14:16:05 +00:00
Anton Korobeynikov
2889a28adb Implement shifts properly (hopefilly - finally!)
llvm-svn: 76005
2009-07-16 14:15:24 +00:00
Anton Korobeynikov
6ff1411adf Remove redundand register move
llvm-svn: 76004
2009-07-16 14:14:54 +00:00
Anton Korobeynikov
f48e88136e Properly handle divides. As a bonus - implement memory versions of them.
llvm-svn: 76003
2009-07-16 14:14:33 +00:00
Anton Korobeynikov
3434b05a2c Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stuff from SingleSource/Benchmarks/Stanford
llvm-svn: 76002
2009-07-16 14:14:01 +00:00
Anton Korobeynikov
ca4d4129c6 32 bit rotate is not twoaddr instruction
llvm-svn: 76001
2009-07-16 14:13:43 +00:00
Anton Korobeynikov
e6b7c15a63 32 bit shifts have only 12 bit displacements
llvm-svn: 76000
2009-07-16 14:13:24 +00:00
Anton Korobeynikov
0e3d764cc1 Unbreak indirect branches
llvm-svn: 75997
2009-07-16 14:12:18 +00:00
Anton Korobeynikov
31bef4e21c All calls clobbers R14
llvm-svn: 75994
2009-07-16 14:11:22 +00:00
Anton Korobeynikov
6c1091e7f3 Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.
llvm-svn: 75990
2009-07-16 14:10:17 +00:00
Anton Korobeynikov
9a1ad49207 Add support for 12 bit displacements
llvm-svn: 75988
2009-07-16 14:09:35 +00:00
Anton Korobeynikov
ee8ce5b760 Add jump tables
llvm-svn: 75984
2009-07-16 14:07:50 +00:00
Anton Korobeynikov
cb3ee3ee90 Exapnd br_jt into indirect branch. Provide pattern for indirect branches.
llvm-svn: 75983
2009-07-16 14:07:24 +00:00
Anton Korobeynikov
21e498ac1c Implement 64 bit immediates
llvm-svn: 75982
2009-07-16 14:07:06 +00:00
Anton Korobeynikov
ab90a05ff3 Add rotates
llvm-svn: 75981
2009-07-16 14:06:49 +00:00
Anton Korobeynikov
ff5b07e994 Add patterns for integer negate
llvm-svn: 75980
2009-07-16 14:06:27 +00:00
Anton Korobeynikov
335aeecedc Provide proper patterns for and with imm instructions. Tune the tests accordingly.
llvm-svn: 75979
2009-07-16 14:06:00 +00:00
Anton Korobeynikov
49d065e9c9 Add 32 bit and reg-imm and disable invalid patterns for now
llvm-svn: 75978
2009-07-16 14:05:32 +00:00
Anton Korobeynikov
c9778b81c9 Add z9 and z10 target processors. Mark z10-only instructions as such.
llvm-svn: 75977
2009-07-16 14:05:00 +00:00
Anton Korobeynikov
0cc45f7a03 Fix MUL64rm instruction asmprinting
llvm-svn: 75976
2009-07-16 14:04:38 +00:00
Anton Korobeynikov
34fae672be Preliminary asmprinting of globals
llvm-svn: 75975
2009-07-16 14:04:22 +00:00