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Commit Graph

179 Commits

Author SHA1 Message Date
Chris Lattner
9b987de2c5 rename hasVariableOperands() -> isVariadic(). Add some comments.
Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.

llvm-svn: 45687
2008-01-07 05:19:29 +00:00
Chris Lattner
9d38dfa4a5 Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
llvm-svn: 45680
2008-01-07 03:13:06 +00:00
Chris Lattner
93e1e6ee12 Add predicates methods to TargetOperandInfo, and switch all clients
over to using them, instead of diddling Flags directly.  Change the
various flags from const variables to enums.

llvm-svn: 45677
2008-01-07 02:39:19 +00:00
Chris Lattner
f7f96d818f Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674
2008-01-07 01:56:04 +00:00
Chris Lattner
fc976a38ff Make MachineRegisterInfo::getVRegDef more efficient by aiming the keep the def of the vreg at the start of the list, so the list doesn't need to be traversed.
llvm-svn: 45483
2008-01-01 21:08:22 +00:00
Chris Lattner
490a9681cb switch the register iterator to act more like hte LLVM value iterator: dereferencing
it now returns the machineinstr of the use.  To get the operand, use I.getOperand().

Add a new MachineRegisterInfo::replaceRegWith, which is basically like
Value::replaceAllUsesWith.

llvm-svn: 45482
2008-01-01 20:36:19 +00:00
Chris Lattner
39b56ec51b Implement automatically updated def/use lists for all MachineInstr register
operands.  The lists are currently kept in MachineRegisterInfo, but it does
not yet provide an iterator interface to them.

llvm-svn: 45477
2008-01-01 01:12:31 +00:00
Chris Lattner
d8b7ecd871 properly encapsulate the parent field of MBB and MI with get/set accessors.
llvm-svn: 45469
2007-12-31 04:56:33 +00:00
Chris Lattner
96167aa93c Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
2007-12-31 04:13:23 +00:00
Chris Lattner
9e5cc35593 Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464
2007-12-30 23:10:15 +00:00
Chris Lattner
7504adbd72 More cleanups for MachineOperand:
- Eliminate the static "print" method for operands, moving it
    into MachineOperand::print.
  - Change various set* methods for register flags to take a bool
    for the value to set it to.  Remove unset* methods.
  - Group methods more logically by operand flavor in MachineOperand.h

llvm-svn: 45461
2007-12-30 21:56:09 +00:00
Chris Lattner
7d47b6c164 MachineOperand:
- Add getParent() accessors.
  - Move SubReg out of the AuxInfo union, to make way for future changes.
  - Remove the getImmedValue/setImmedValue methods.
  - in some MachineOperand::Create* methods, stop initializing fields that are dead.

MachineInstr:
  - Delete one copy of the MachineInstr printing code, now there is only one dump
    format and one copy of the code.
  - Make MachineOperand use the parent field to get info about preg register names if
    no target info is otherwise available.
  - Move def/use/kill/dead flag printing to the machineoperand printer, so they are
    always printed for an operand.

llvm-svn: 45460
2007-12-30 21:31:53 +00:00
Chris Lattner
31932a7542 simpilfy some register printing code.
llvm-svn: 45458
2007-12-30 21:08:36 +00:00
Chris Lattner
46e4658c95 eliminate a copy of the machineoperand printing stuff. Keep the copy that
knows how to print offsets.

llvm-svn: 45457
2007-12-30 21:03:30 +00:00
Chris Lattner
ff61fe680e Simplify and clean up some machine operand/instr printing/dumping stuff.
llvm-svn: 45456
2007-12-30 21:01:27 +00:00
Chris Lattner
98c3fabf47 two register machineoperands are not identical unless their subregs match.
llvm-svn: 45455
2007-12-30 20:55:08 +00:00
Chris Lattner
4a4943a78f MachineOperand::getImmedValue -> MachineOperand::getImm
llvm-svn: 45454
2007-12-30 20:50:28 +00:00
Chris Lattner
d6051f028d make machine operands fatter: give each one an up-pointer to the
machineinstr that owns it.

llvm-svn: 45449
2007-12-30 06:11:04 +00:00
Chris Lattner
19dd6c4eac Start using the simplified methods for adding operands.
llvm-svn: 45432
2007-12-30 00:41:17 +00:00
Chris Lattner
e868c77f16 simplify some code by factoring operand construction better.
llvm-svn: 45428
2007-12-30 00:12:25 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Evan Cheng
fd33cb316f Clean up sub-register implementation by moving subReg information back to
MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.

llvm-svn: 44104
2007-11-14 07:59:08 +00:00
Evan Cheng
2262b2a792 Optionally create a MachineInstr without default implicit operands.
llvm-svn: 42945
2007-10-13 02:23:01 +00:00
Evan Cheng
d11cd4a095 EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like
(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.

llvm-svn: 42899
2007-10-12 08:50:34 +00:00
Dan Gohman
fb60c0dfed Remove isReg, isImm, and isMBB, and change all their users to use
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958
2007-09-14 20:33:02 +00:00
Dan Gohman
53119779c2 Remove spurious consts. This fixes warnings with compilers that
are strict about such things.

llvm-svn: 41956
2007-09-14 20:08:19 +00:00
Christopher Lamb
cb63a77a51 Remove subreg index from MachineInstr's and also keep vregs as unsigned when adding operands.
llvm-svn: 40514
2007-07-26 07:00:46 +00:00
Evan Cheng
88c463eb8c MachineInstr::isPredicable() is no longer needed.
llvm-svn: 37599
2007-06-15 19:06:07 +00:00
Evan Cheng
d8b25a2091 Add missing const qualifiers.
llvm-svn: 37341
2007-05-29 18:35:22 +00:00
Evan Cheng
6f761adecb Rename M_PREDICATED to M_PREDICABLE; Moved isPredicable() to MachineInstr.
llvm-svn: 37121
2007-05-16 20:56:08 +00:00
Evan Cheng
eea85a767e Added getNumExplicitOperands and findFirstPredOperand.
llvm-svn: 37064
2007-05-15 01:26:09 +00:00
Nate Begeman
767ee95d29 llvm bug #1350, parts 1, 2, and 3.
llvm-svn: 36618
2007-05-01 05:57:02 +00:00
Evan Cheng
eff332e3e1 Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.
llvm-svn: 36483
2007-04-26 19:00:32 +00:00
Evan Cheng
201771637e Change findRegisterUseOperand() to return operand index instead.
llvm-svn: 35363
2007-03-26 22:37:45 +00:00
Evan Cheng
387f1c2bdf Use findRegisterUseOperand to find a kill of particular register.
llvm-svn: 34512
2007-02-23 01:04:26 +00:00
Evan Cheng
e4ab9c032b Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
llvm-svn: 34428
2007-02-19 21:49:54 +00:00
Reid Spencer
b27fcf3482 For PR1207:
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.

llvm-svn: 34399
2007-02-19 03:20:00 +00:00
Evan Cheng
35f59a6dd2 Added findRegisterDefOperand().
llvm-svn: 34380
2007-02-17 11:10:18 +00:00
Evan Cheng
5b8b96e9de Print <dead> def operands.
llvm-svn: 34343
2007-02-16 09:49:18 +00:00
Jeff Cohen
c396e18e8e The best unbreakage yet, addressing Bill's concerns.
llvm-svn: 32622
2006-12-16 02:15:42 +00:00
Jeff Cohen
03161dd132 An even better unbreakage...
llvm-svn: 32617
2006-12-15 22:57:14 +00:00
Bill Wendling
a3246c4272 Changed llvm_ostream et all to OStream. llvm_cerr, llvm_cout, llvm_null, are
now cerr, cout, and NullStream resp.

llvm-svn: 32298
2006-12-07 01:30:32 +00:00
Evan Cheng
59494f9e3d Move copyKillDeadInfo out-of-line. Add findRegisterUseOperand().
llvm-svn: 32273
2006-12-06 08:27:42 +00:00
Evan Cheng
cb65ba1821 - MachineInstr now keeps a ptr to TargetInstrDescriptor instead of Opcode.
- Remove the ugly TargetInstrDescriptors hack.

llvm-svn: 32032
2006-11-30 07:08:44 +00:00
Bill Wendling
d8c0883f20 Use llvm streams instead of <iostream>
llvm-svn: 31985
2006-11-28 22:48:48 +00:00
Evan Cheng
e176869ec0 Clean up.
llvm-svn: 31957
2006-11-28 02:25:34 +00:00
Evan Cheng
98fa7ab4d7 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
of opcode and number of operands.

llvm-svn: 31947
2006-11-27 23:37:22 +00:00
Chris Lattner
31f45746ad setOperand should not zap the operand list or add implicit operands to an
instruction.  Doing so breaks the FP stackifier, the alpha branch selector
the sparc fpmover.

This fixes PR1012 and CodeGen/X86/fp-stack-compare.ll

llvm-svn: 31876
2006-11-20 17:57:22 +00:00
Evan Cheng
cf45b9fa95 Minor updates.
llvm-svn: 31761
2006-11-15 20:54:29 +00:00
Evan Cheng
7cabf9d02c - Let MachineInstr ctors add implicit def and use operands. Other operands
will be inserted before these operands. If the opcode changes (by
  setOpcode), the implicit operands are updated as well.
- Added IsKill, IsDead fields to MachineOperand in preparation for changes
  that move kill / dead info to MachineInstr's.

llvm-svn: 31711
2006-11-13 23:34:06 +00:00