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Commit Graph

47 Commits

Author SHA1 Message Date
Jim Grosbach
2b81a07dc7 Simplify eliminateFrameIndex() interface back down now that PEI doesn't need
to try to re-use scavenged frame index reference registers. rdar://8277890

llvm-svn: 112241
2010-08-26 23:32:16 +00:00
Rafael Espindola
9113809536 cleanup
llvm-svn: 105322
2010-06-02 13:53:17 +00:00
Jim Grosbach
f328c5334f Change the Value argument to eliminateFrameIndex to a type-tagged value. This
is preparatory to having PEI's scavenged frame index value reuse logic
properly distinguish types of frame values (e.g., whether the value is
stack-pointer relative or frame-pointer relative).

No functionality change.

llvm-svn: 98086
2010-03-09 21:45:49 +00:00
David Greene
9934b1d063 Make the MachineFunction argument of getFrameRegister const.
This also fixes a build error.

llvm-svn: 87027
2009-11-12 21:00:03 +00:00
Jim Grosbach
61c5ce1bde Add register-reuse to frame-index register scavenging. When a target uses
a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.

eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.

ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.

llvm-svn: 83467
2009-10-07 17:12:56 +00:00
Owen Anderson
4aee97b0e3 Committed the wrong version in my last commit.
llvm-svn: 74235
2009-06-26 00:17:05 +00:00
Owen Anderson
22fb1f445e Privatize a static variable.
llvm-svn: 74234
2009-06-26 00:15:27 +00:00
Evan Cheng
38a755499d Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.
llvm-svn: 48995
2008-03-31 20:40:39 +00:00
Dan Gohman
cabaec582f Rename MRegisterInfo to TargetRegisterInfo.
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Owen Anderson
f19692b2f6 Move even more functionality from MRegisterInfo into TargetInstrInfo.
Some day I'll get it all moved over...

llvm-svn: 45672
2008-01-07 01:35:02 +00:00
Owen Anderson
e6856128ab Move some more instruction creation methods from RegisterInfo into InstrInfo.
llvm-svn: 45484
2008-01-01 21:11:32 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Evan Cheng
8464a0bf00 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
the stored register is killed.

llvm-svn: 44600
2007-12-05 03:14:33 +00:00
Evan Cheng
58b387dfb0 Remove redundant foldMemoryOperand variants and other code clean up.
llvm-svn: 44517
2007-12-02 08:30:39 +00:00
Evan Cheng
79e8b92dc3 Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0.
llvm-svn: 44479
2007-12-01 02:07:52 +00:00
Dale Johannesen
5fd9e7a615 Add parameter to getDwarfRegNum to permit targets
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.

llvm-svn: 44056
2007-11-13 19:13:01 +00:00
Anton Korobeynikov
8e8473c783 Use TableGen to emit information for dwarf register numbers.
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,

llvm-svn: 43997
2007-11-11 19:50:10 +00:00
Evan Cheng
0449186690 - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
- Fix some copy+paste bugs.

llvm-svn: 43153
2007-10-18 22:40:57 +00:00
Evan Cheng
c852780685 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
llvm-svn: 43150
2007-10-18 21:29:24 +00:00
Evan Cheng
f536e2f41e - Added a few target hooks to generate load / store instructions from / to any
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.

llvm-svn: 42621
2007-10-05 01:32:41 +00:00
Evan Cheng
5f9e291240 Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!

llvm-svn: 42346
2007-09-26 06:25:56 +00:00
Evan Cheng
58ea935f6f Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots.
llvm-svn: 41597
2007-08-30 05:52:20 +00:00
Anton Korobeynikov
5635277c36 Long live the exception handling!
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.

In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.

After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be 
thought as 'finished': I expect many small and not so small glitches
everywhere.

llvm-svn: 39855
2007-07-14 14:06:15 +00:00
Evan Cheng
e47ec4d104 eliminateFrameIndex() change.
llvm-svn: 36626
2007-05-01 09:13:03 +00:00
Evan Cheng
41f4f032ee Added MRegisterInfo hook to re-materialize an instruction.
llvm-svn: 35205
2007-03-20 08:09:38 +00:00
Evan Cheng
116f97f2c7 PEI now passes a RegScavenger ptr to eliminateFrameIndex.
llvm-svn: 34707
2007-02-28 00:21:17 +00:00
Jim Laskey
6a937ad320 Support to provide exception and selector registers.
llvm-svn: 34482
2007-02-21 22:54:50 +00:00
Evan Cheng
e4ab9c032b Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
llvm-svn: 34428
2007-02-19 21:49:54 +00:00
Reid Spencer
b27fcf3482 For PR1207:
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.

llvm-svn: 34399
2007-02-19 03:20:00 +00:00
Evan Cheng
8c2508f1ac Added getReservedRegs().
llvm-svn: 34376
2007-02-17 11:06:00 +00:00
Evan Cheng
d9d93832b0 hasFP() is now a virtual method of MRegisterInfo.
llvm-svn: 33455
2007-01-23 00:57:47 +00:00
Evan Cheng
bd6a333b52 Fix naming inconsistency.
llvm-svn: 32823
2007-01-02 21:33:40 +00:00
Evan Cheng
98fa7ab4d7 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
of opcode and number of operands.

llvm-svn: 31947
2006-11-27 23:37:22 +00:00
Evan Cheng
0e82270ff2 Matches MachineInstr changes.
llvm-svn: 31712
2006-11-13 23:36:35 +00:00
Evan Cheng
667b133ab9 getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.
llvm-svn: 28378
2006-05-18 00:12:58 +00:00
Jim Laskey
b93bc75add Foundation for call frame information.
llvm-svn: 27491
2006-04-07 16:34:46 +00:00
Jim Laskey
eb38a3e83a Expose base register for DwarfWriter. Refactor code accordingly.
llvm-svn: 27225
2006-03-28 13:48:33 +00:00
Jim Laskey
cec9c18c62 Add support to locate local variables in frames (early version.)
llvm-svn: 26994
2006-03-23 18:12:57 +00:00
Chris Lattner
15cb732cd7 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
llvm-svn: 25913
2006-02-02 20:12:32 +00:00
Andrew Lenharth
1acb71df32 whatever. Intermediate patch to see what breaks. Seems ok.
llvm-svn: 24260
2005-11-09 19:17:08 +00:00
Andrew Lenharth
bfa54fe229 This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out
llvm-svn: 23676
2005-10-09 20:11:35 +00:00
Chris Lattner
a1266f8ed5 Pass extra regclasses into spilling code
llvm-svn: 23537
2005-09-30 01:29:42 +00:00
Chris Lattner
b46e525e23 This code has always been dead for alpha
llvm-svn: 22915
2005-08-19 18:33:26 +00:00
Misha Brukman
1fdf39f2ea Remove trailing whitespace
llvm-svn: 21424
2005-04-21 23:13:11 +00:00
Misha Brukman
75da90f127 Make the rest of file header comments consistent in format and style
llvm-svn: 20048
2005-02-05 02:24:26 +00:00
Misha Brukman
74be40e1d2 Make file header comment consistent: extend the whole 80 cols to fill the line
llvm-svn: 20039
2005-02-04 20:25:52 +00:00
Andrew Lenharth
f5b9a8fe57 Let me introduce you to the early stages of the llvm backend for the alpha processor
llvm-svn: 19764
2005-01-22 23:41:55 +00:00