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Commit Graph

689 Commits

Author SHA1 Message Date
Evan Cheng
5ff34fa3b4 Kill off SimpleBBISel, it's replaced by FastISel.
llvm-svn: 55067
2008-08-20 17:50:32 +00:00
Dan Gohman
00ddda96c9 Disable DAGCombine's alignment inference in "fast" codegen mode.
llvm-svn: 55059
2008-08-20 16:30:28 +00:00
Dan Gohman
22c225c022 Use BitVector instead of std::vector<unsigned char>.
llvm-svn: 55054
2008-08-20 14:58:41 +00:00
Dan Gohman
472f4b49b6 Fix a leak in the FastISel code that Chris pointed out.
llvm-svn: 55031
2008-08-20 00:56:17 +00:00
Dan Gohman
023bedddc4 Add support for running SelectionDAG if FastISel fails. This is under
a command-line option, so that the default behavior is an abort, which
is useful for exposing code that isn't supported yet.

llvm-svn: 55028
2008-08-20 00:47:54 +00:00
Dan Gohman
1b18b91296 Add code to call FastISel, and a command-line option to enable it.
llvm-svn: 55015
2008-08-19 22:33:34 +00:00
Gordon Henriksen
2cc861a6c1 Rename some GC classes so that their roll will hopefully be clearer.
In particular, Collector was confusing to implementors. Several
thought that this compile-time class was the place to implement
their runtime GC heap. Of course, it doesn't even exist at runtime.
Specifically, the renames are:

  Collector               -> GCStrategy
  CollectorMetadata       -> GCFunctionInfo
  CollectorModuleMetadata -> GCModuleInfo
  CollectorRegistry       -> GCRegistry
  Function::getCollector  -> getGC (setGC, hasGC, clearGC)

Several accessors and nested types have also been renamed to be
consistent. These changes should be obvious.

llvm-svn: 54899
2008-08-17 18:44:35 +00:00
Gordon Henriksen
e51c9eb75e Factor GC metadata table assembly generation out of Collector in preparation for splitting AsmPrinter into its own library.
llvm-svn: 54881
2008-08-17 12:56:54 +00:00
Dan Gohman
9e27bed4f0 Rename SelectionDAGISel's FastISel to Fast, to begin to make
room for the new FastISel instruction selection code.

llvm-svn: 54749
2008-08-13 19:47:40 +00:00
Evan Cheng
cc7944b919 Add skeleton of simple basic block instruction selector.
llvm-svn: 54522
2008-08-08 07:27:28 +00:00
Evan Cheng
f8a801a9b8 Factor code that finalize PHI nodes, jump tables, etc. out of SelectBasicBlock. No functionality changes.
llvm-svn: 54438
2008-08-07 00:43:25 +00:00
Owen Anderson
667d9c95c2 Remove the -disable-correct-folding option, which was ugly and is no longer needed.
llvm-svn: 54361
2008-08-05 18:27:54 +00:00
Owen Anderson
32ae9380f1 This option doesn't need to be a target option. It can be in SDISel instead.
llvm-svn: 54336
2008-08-05 00:27:28 +00:00
Owen Anderson
84fbc312d4 - Fix SelectionDAG to generate correct CFGs.
- Add a basic machine-level dead block eliminator.

These two have to go together, since many other parts of the code generator are unable to handle the unreachable blocks otherwise created.

llvm-svn: 54333
2008-08-04 23:54:43 +00:00
Dan Gohman
60ea311ec8 Fix SDISel lowering of PHI nodes to use ComputeValueVTs.
This allows it to work correctly on aggregate values.
This fixes PR2623.

llvm-svn: 54331
2008-08-04 23:42:46 +00:00
Dan Gohman
af429b3e52 Fix SDISel lowering of zeroinitializer and undef to use ComputeValueVTs.
This allows it to work correctly on nested aggregate values.
This fixes PR2625.

llvm-svn: 54330
2008-08-04 23:30:41 +00:00
Dale Johannesen
f669e7c14f Add a flag to disable jump table generation (all
switches use the binary search algorithm) for
environments that don't support it.  PPC64 JIT
is such an environment; turn the flag on for that.

llvm-svn: 54248
2008-07-31 18:13:12 +00:00
Dan Gohman
4ca56a8993 Don't look for leaf values to store when lowering stores of
empty structs. This fixes PR2612.

llvm-svn: 54226
2008-07-30 18:36:51 +00:00
Nate Begeman
9a71580e21 Add vector shifts to the IR, patch by Eli Friedman.
CodeGen & Clang work coming next.

llvm-svn: 54161
2008-07-29 15:49:41 +00:00
Dan Gohman
9653b21dc2 Fold the useful features of alist and alist_node into ilist, and
a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the associated problems, including being opaque in gdb.

Adjust the Recycler class so that it doesn't depend on alist_node.
Also, change it to use explicit Size and Align parameters, allowing
it to work when the largest-sized node doesn't have the greatest
alignment requirement.

Change MachineInstr's MachineMemOperand list from a pool-backed
alist to a std::list for now.

llvm-svn: 54146
2008-07-28 21:51:04 +00:00
Dan Gohman
9742f7772d Rename SDOperand to SDValue.
llvm-svn: 54128
2008-07-27 21:46:04 +00:00
Dan Gohman
68487f0859 Use AliasAnalysis::pointsToConstantMemory in SDISel to avoid unnecessary
dependencies with constant load nodes. This allows them to be scheduled
freely.

llvm-svn: 54001
2008-07-25 00:04:14 +00:00
Dan Gohman
6564581be0 Enable first-class aggregates support.
Remove the GetResultInst instruction. It is still accepted in LLVM assembly
and bitcode, where it is now auto-upgraded to ExtractValueInst. Also, remove
support for return instructions with multiple values. These are auto-upgraded
to use InsertValueInst instructions.

The IRBuilder still accepts multiple-value returns, and auto-upgrades them
to InsertValueInst instructions.

llvm-svn: 53941
2008-07-23 00:34:11 +00:00
Dan Gohman
dd84251894 After early-lowering the FORMAL_ARGUMENTS node, delete it.
llvm-svn: 53874
2008-07-21 21:04:07 +00:00
Dan Gohman
b91bef08a7 Add titles to the various SelectionDAG viewGraph calls
that include useful information like the name of the
block being viewed and the current phase of compilation.

llvm-svn: 53872
2008-07-21 20:00:07 +00:00
Duncan Sands
778e45e748 Turn LegalizeTypes back off again for the moment:
it is breaking Darwin bootstrap due to missing
functionality.

llvm-svn: 53721
2008-07-17 17:06:03 +00:00
Duncan Sands
b2e1ddbd0b Turn on LegalizeTypes by default.
llvm-svn: 53671
2008-07-16 11:36:51 +00:00
Dan Gohman
e76fd33ee5 Reapply 53476 and 53480, with a fix so that it properly updates
the BB member to the current basic block after emitting
instructions.

llvm-svn: 53567
2008-07-14 18:19:29 +00:00
Evan Cheng
ebf7ff4531 Back out 53476 and 53480 for now. Somehow they cause llc to miscompile 179.art.
llvm-svn: 53502
2008-07-12 01:38:51 +00:00
Dan Gohman
6ee2195ab1 Add support for putting NamedRegionTimers in TimerGroups, and
use a timer group for the timers in SelectionDAGISel. Also,
Split scheduling out from emitting, to give each their own
timer.

llvm-svn: 53476
2008-07-11 21:54:34 +00:00
Chris Lattner
5e784a8ebd make legalize types be a command line option: -enable-legalize-types.
llvm-svn: 53434
2008-07-10 23:37:50 +00:00
Dan Gohman
93e0208361 Pool-allocation for SDNodes. The pool is allocated once for each function,
and reused across SelectionDAGs.

This drastically reduces the number of calls to malloc/free made during
instruction selection, and improves memory locality.

llvm-svn: 53211
2008-07-07 23:02:41 +00:00
Duncan Sands
3ea6f15708 Rather than having a different custom legalization
hook for each way in which a result type can be
legalized (promotion, expansion, softening etc),
just use one: ReplaceNodeResults, which returns
a node with exactly the same result types as the
node passed to it, but presumably with a bunch of
custom code behind the scenes.  No change if the
new LegalizeTypes infrastructure is not turned on.

llvm-svn: 53137
2008-07-04 11:47:58 +00:00
Bill Wendling
2c9a84d788 Revert my previous check-in that split up MachineModuleInfo. It turns out to
slow the compiler down at -O0 some 30% or more. Ooops.

llvm-svn: 53120
2008-07-03 22:53:42 +00:00
Duncan Sands
21e2a711e3 Add a new getMergeValues method that does not need
to be passed the list of value types, and use this
where appropriate.  Inappropriate places are where
the value type list is already known and may be
long, in which case the existing method is more
efficient.

llvm-svn: 53035
2008-07-02 17:40:58 +00:00
Evan Cheng
9a960dc2b2 Do run ComputeLiveOutVRegInfo with -fast.
llvm-svn: 52975
2008-07-01 18:15:04 +00:00
Evan Cheng
67ce381ffe Do not use computationally expensive scheduling heuristics with -fast.
llvm-svn: 52971
2008-07-01 18:05:03 +00:00
Evan Cheng
b33d6b69ab Apply Chris' suggestion.
llvm-svn: 52970
2008-07-01 17:59:20 +00:00
Dan Gohman
c8097f8c8c Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.

Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.

This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.

llvm-svn: 52943
2008-07-01 00:05:16 +00:00
Dan Gohman
082b08f33a Use a simpler but equivalent form of RecordSource.
llvm-svn: 52931
2008-06-30 22:21:03 +00:00
Evan Cheng
3ec3837c38 Add timing report for various sub-passes under SelectionDAGISel.
llvm-svn: 52930
2008-06-30 22:10:09 +00:00
Dan Gohman
6cc648891b Rename ISD::LOCATION to ISD::DBG_STOPPOINT to better reflect its
purpose, and give it a custom SDNode subclass so that it doesn't
need to have line number, column number, filename string, and
directory string, all existing as individual SDNodes to be the
operands.

This was the only user of ISD::STRING, StringSDNode, etc., so
remove those and some associated code.

This makes stop-points considerably easier to read in
-view-legalize-dags output, and reduces overhead (creating new
nodes and copying std::strings into them) on code containing
debugging information.

llvm-svn: 52924
2008-06-30 20:59:49 +00:00
Evan Cheng
3f664b6fd3 Split scheduling from instruction selection.
llvm-svn: 52923
2008-06-30 20:45:06 +00:00
Dan Gohman
295abfe228 Replace some std::vectors that showed up in heap profiling with
SmallVectors. Change the signature of TargetLowering::LowerArguments
to avoid returning a vector by value, and update the two targets
which still use this directly, Sparc and IA64, accordingly.

llvm-svn: 52917
2008-06-30 20:31:15 +00:00
Duncan Sands
c882a4eba9 Revert the SelectionDAG optimization that makes
it impossible to create a MERGE_VALUES node with
only one result: sometimes it is useful to be able
to create a node with only one result out of one of
the results of a node with more than one result, for
example because the new node will eventually be used
to replace a one-result node using ReplaceAllUsesWith,
cf X86TargetLowering::ExpandFP_TO_SINT.  On the other
hand, most users of MERGE_VALUES don't need this and
for them the optimization was valuable.  So add a new
utility method getMergeValues for creating MERGE_VALUES
nodes which by default performs the optimization.
Change almost everywhere to use getMergeValues (and
tidy some stuff up at the same time).

llvm-svn: 52893
2008-06-30 10:19:09 +00:00
Bill Wendling
2ab62b9a92 Refactor the DebugInfoDesc stuff out of the MachineModuleInfo file. Clean up
some uses of std::vector, where it's return std::vector by value. Yuck!

llvm-svn: 52800
2008-06-27 00:09:40 +00:00
Dan Gohman
404964dbc0 Remove the OrigVT member from AtomicSDNode, as it is redundant with
the base SDNode's VTList.

llvm-svn: 52722
2008-06-25 16:07:49 +00:00
Mon P Wang
7d89d61387 Added MemOperands to Atomic operations since Atomics touches memory.
Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub

llvm-svn: 52706
2008-06-25 08:15:39 +00:00
Dan Gohman
359de5a04e Teach ReturnInst lowering about aggregate return values.
llvm-svn: 52522
2008-06-20 01:29:26 +00:00
Dan Gohman
0d86d31373 Fix the index calculations for the extractvalue lowering code.
llvm-svn: 52517
2008-06-20 00:54:19 +00:00