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Commit Graph

172145 Commits

Author SHA1 Message Date
Jonas Paulsson
4328cc486d [SystemZ::TTI] Improve costs for i16 add, sub and mul against memory.
AH, SH and MH costs are already covered in the cases where LHS is 32 bits and
RHS is 16 bits of memory sign-extended to i32.

As these instructions are also used when LHS is i16, this patch recognizes
that the loads will get folded then as well.

Review: Ulrich Weigand
https://reviews.llvm.org/D54940

llvm-svn: 347734
2018-11-28 08:31:50 +00:00
Jonas Paulsson
5ca245644e [SystemZ::TTI] Improved cost values for comparison against memory.
Single instructions exist for i8 and i16 comparisons of memory against a
small immediate.

This patch makes sure that if the load in these cases has a single user (the
ICmp), it gets a 0 cost (folded), and also that the ICmp gets a cost of 1.

Review: Ulrich Weigand
https://reviews.llvm.org/D54897

llvm-svn: 347733
2018-11-28 08:08:05 +00:00
Jonas Paulsson
67885a2bf8 [SystemZ::TTI] Return zero cost for scalar load/store connected with a bswap.
Since byte-swapping loads and stores are supported, a 'load -> bswap' or
'bswap -> store' sequence should have the cost of one.

Review: Ulrich Weigand
https://reviews.llvm.org/D54870

llvm-svn: 347732
2018-11-28 07:52:34 +00:00
Martin Storsjo
289364c5e7 [llvm-objcopy] Hook up the -V alias to --version, output "GNU strip"
This allows libtool to detect the presence of llvm-strip and use
it with the options --strip-debug and --strip-unneeded.

Also hook up the -V alias for objcopy.

Differential Revision: https://reviews.llvm.org/D54936

llvm-svn: 347731
2018-11-28 06:51:50 +00:00
Mircea Trofin
0953e7ad7b Do not insert prefetches with unsupported memory operands.
Summary:
Ignore advices where the memory operand of the 'anchor' instruction
uses unsupported register types.

Reviewers: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D54983

llvm-svn: 347724
2018-11-28 01:08:45 +00:00
Craig Topper
f3afb84186 [X86] Add test cases to show that we don't properly take -mprefer-vector-width=256 and -min-legal-vector-width=256 into account when costing sext/zext.
The check lines marked AVX256 in the zext256/sext256 functions should be closer to the AVX values which would take into account a splitting cost.

llvm-svn: 347722
2018-11-28 00:33:34 +00:00
Craig Topper
29d7071559 [X86] Add exhaustive cost model testing for sext/zext for all vector types we reasonably support. Add cost model tests for truncating to vXi1.
Our sext/zext cost modeling was somewhat incomplete. And had no coverage for the fact that avx512bw v32i16/v64i8 types return a scalarization cost.

Truncates are a whole different mess because isTruncateFree is returning true for vectors when it shouldn't and that's the fall back for anything not in the tables.

llvm-svn: 347719
2018-11-27 22:46:05 +00:00
Evandro Menezes
9f0644167f [TableGen] Improve readability of generated code (NFC)
Improve the readability of the generated code for `MCOpcodeSwitchStatement`.

llvm-svn: 347707
2018-11-27 20:59:01 +00:00
Evandro Menezes
a13afb10aa [TableGen] Refactor macro names (NFC)
Make the names for the macros for `TargetInstrInfo` uniform.

llvm-svn: 347706
2018-11-27 20:58:27 +00:00
Martin Storsjo
017737fa7a [yaml2obj] Treat COFF/ARM64 as a 64 bit architecture
Differential Revision: https://reviews.llvm.org/D54935

llvm-svn: 347703
2018-11-27 20:47:38 +00:00
Nico Weber
ce6e3acf53 [gn build] Add enough build files to be able to build llvm-tblgen.
Adds build files for:

- llvm/lib/DebugInfo/CodeView
- llvm/lib/DebugInfo/MSF
- llvm/lib/MC
- llvm/lib/TableGen
- llvm/utils/TableGen

All the build files just list sources and deps and are uninteresting.

Differential Revision: https://reviews.llvm.org/D54931

llvm-svn: 347702
2018-11-27 20:10:26 +00:00
Zola Bridges
9edd900b44 [clang][slh] add attribute for speculative load hardening
Summary:
Resubmit this with no changes because I think the build was broken
by a different diff.
-----
The prior diff had to be reverted because there were two tests
that failed. I updated the two tests in this diff

clang/test/Misc/pragma-attribute-supported-attributes-list.test
clang/test/SemaCXX/attr-speculative-load-hardening.cpp

----- Summary from Previous Diff (Still Accurate) -----

LLVM IR already has an attribute for speculative_load_hardening. Before
this commit, when a user passed the -mspeculative-load-hardening flag to
Clang, every function would have this attribute added to it. This Clang
attribute will allow users to opt into SLH on a function by function basis.

This can be applied to functions and Objective C methods.

Reviewers: chandlerc, echristo, kristof.beyls, aaron.ballman

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D54915

llvm-svn: 347701
2018-11-27 19:56:46 +00:00
Nikita Popov
ad58715eb1 [InstCombine] Add tests for saturating add/sub; NFC
These are baseline tests for D54534.

llvm-svn: 347700
2018-11-27 19:52:56 +00:00
Craig Topper
c31727146e [X86] Add cost model tests for experimental.vector.reduce.* with -x86-experimental-vector-widening-legalization
llvm-svn: 347697
2018-11-27 19:44:40 +00:00
Craig Topper
dcfda4d0ba [X86] Add cost model test for masked load an store with -x86-experimental-vector-widening-legalization
llvm-svn: 347696
2018-11-27 19:44:36 +00:00
Craig Topper
4d39651ece [X86] Add cost model tests for fp_to_int/int_to_fp with -x86-experimental-vector-widening-legalization
llvm-svn: 347695
2018-11-27 19:44:34 +00:00
Craig Topper
2fefbf81ec [X86] Add cost model tests for shifts with -x86-experimental-vector-widening-legalization.
llvm-svn: 347694
2018-11-27 19:44:30 +00:00
Zachary Turner
f284de6824 [lit] Pass more environment variables through to child processes.
This arose when I was trying to have a substitution which invoked a
python script P, and that python script tried to invoke clang-cl (or
even cl). Since we invoke P with a custom environment, it doesn't
inherit the environment of the parent, and then when we go to invoke
clang-cl, it's unable to find the MSVC installation directory. There
were many more I could have passed through which are set by vcvarsall,
but I tried to keep it simple and only pass through the important ones.

Differential Revision: https://reviews.llvm.org/D54963

llvm-svn: 347691
2018-11-27 19:29:12 +00:00
Reid Kleckner
6df57d1bbe Add missing error checking code intended for r347687
llvm-svn: 347690
2018-11-27 19:14:11 +00:00
Reid Kleckner
e8ca9ef5bc [PDB] Add symbol records in bulk
Summary:
This speeds up linking clang.exe/pdb with /DEBUG:GHASH by 31%, from
12.9s to 9.8s.

Symbol records are typically small (16.7 bytes on average), but we
processed them one at a time. CVSymbol is a relatively "large" type. It
wraps an ArrayRef<uint8_t> with a kind an optional 32-bit hash, which we
don't need. Before this change, each DbiModuleDescriptorBuilder would
maintain an array of CVSymbols, and would write them individually with a
BinaryItemStream.

With this change, we now add symbols that happen to appear contiguously
in bulk. For each .debug$S section (roughly one per function), we
allocate two copies, one for relocation, and one for realignment
purposes. For runs of symbols that go in the module stream, which is
most symbols, we now add them as a single ArrayRef<uint8_t>, so the
vector DbiModuleDescriptorBuilder is roughly linear in the number of
.debug$S sections (O(# funcs)) instead of the number of symbol records
(very large).

Some stats on symbol sizes for the curious:
  PDB size: 507M
  sym bytes: 316,508,016
  sym count:  18,954,971
  sym byte avg: 16.7

As future work, we may be able to skip copying symbol records in the
linker for realignment purposes if we make LLVM write them aligned into
the object file. We need to double check that such symbol records are
still compatible with link.exe, but if so, it's definitely worth doing,
since my profile shows we spend 500ms in memcpy in the symbol merging
code. We could potentially cut that in half by saving a copy.
Alternatively, we could apply the relocations *after* we iterate the
symbols. This would require some careful re-engineering of the
relocation processing code, though.

Reviewers: zturner, aganea, ruiu

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D54554

llvm-svn: 347687
2018-11-27 19:00:23 +00:00
Vyacheslav Zakharin
98b988d93a [TableGen] Preprocessing support
Differential Revision: https://reviews.llvm.org/D54926

llvm-svn: 347686
2018-11-27 18:57:43 +00:00
Craig Topper
d99e39cf74 [X86] Replace an APInt that is guaranteed to be 8-bits with just an 'unsigned'
We're already mixing this APInt with other 'unsigned' variables. This allows us to use regular comparison operators instead of needing to use APInt::ult or APInt::uge. And it removes a later conversion from APInt to unsigned.

I might be adding another combine to this function and this will probably simplify the logic required for that.

llvm-svn: 347684
2018-11-27 18:24:56 +00:00
Florian Hahn
cfda8a97b4 [PartialInliner] Make PHIs free in cost computation.
InlineCost also treats them as free and the current implementation
can cause assertion failures if PHI nodes are moved outside the region
from entry BBs to the region.

It also updates the code to use the instructionsWithoutDebug iterator.

Reviewers: davidxl, davide, vsk, graham-yiu-huawei

Reviewed By: davidxl

Differential Revision: https://reviews.llvm.org/D54748

llvm-svn: 347683
2018-11-27 18:17:27 +00:00
Craig Topper
f88d85bd02 [X86] Add cascade lake arch in X86 target.
This is skylake-avx512 with the addition of avx512vnni ISA.

Patch by Jianping Chen

Differential Revision: https://reviews.llvm.org/D54785

llvm-svn: 347681
2018-11-27 18:05:00 +00:00
James Dennett
3ce09e1b66 Documentation: add \file markup as needed.
This makes Doxygen correctly associate the doc comment with the current
file rather than adding to the documentation for namespace llvm.

llvm-svn: 347679
2018-11-27 17:53:03 +00:00
Pavel Labath
9101881e58 [Demangle] remove itaniumFindTypesInMangledName
Summary:
This (very specialized) function was added to enable an LLDB use case.
Now that a more generic interface (overriding of parser functions -
D52992)  is available, and LLDB has been converted to use that (D54074),
the function is unused and can be removed.

Reviewers: erik.pilkington, sgraenitz, rsmith

Subscribers: mgorny, hiraditya, christof, libcxx-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D54893

llvm-svn: 347670
2018-11-27 16:11:24 +00:00
Andrea Di Biagio
d071132496 [llvm-mca] pass -dispatch-stats flag to a couple of tests. NFC
This change is in preparation for a patch that fixes PR36666.

llvm-mca currently doesn't know if a buffered processor resource describes a
load or store queue. So, any dynamic dispatch stall caused by the lack of
load/store queue entries is normally reported as a generic SCHEDULER stall. See for
example the -dispatch-stats output from the two tests modified by this patch.

In future, processor models will be able to tag processor resources that are
used to describe load/store queues. That information would then be used by
llvm-mca to correctly classify dynamic dispatch stalls caused by the lack of
tokens in the LS.

llvm-svn: 347662
2018-11-27 15:56:00 +00:00
Sanjay Patel
e7cb87efa9 [x86] regenerate checks; NFC
llvm-svn: 347661
2018-11-27 15:52:17 +00:00
Stanislav Mekhanoshin
a6054d7527 [AMDGPU] Disable DAG combine at -O0
Differential Revision: https://reviews.llvm.org/D54358

llvm-svn: 347659
2018-11-27 15:13:37 +00:00
Tim Northover
d6fa1b1e40 InstCombine: add comment explaining malloc deletion. NFC.
I tried to change this, not quite realising the logic behind what we
were doing. Hopefully this comment will help the next person to come
along.

llvm-svn: 347653
2018-11-27 11:08:14 +00:00
Max Kazantsev
79cc8fb024 Add missing REQUIRES: asserts
llvm-svn: 347644
2018-11-27 07:51:18 +00:00
Craig Topper
4a9148203d [X86] Add test cases for vector shifts of v2i32/v2i16/v4i16/v2i8/v4i8/v8i8 with promotion legalization and widening legalization. NFC
llvm-svn: 347643
2018-11-27 07:20:19 +00:00
Craig Topper
98b042f678 [X86] Use getUnpackl/getUnpackh instead of directly creating UNPCKL/UNPCKH nodes.
llvm-svn: 347642
2018-11-27 06:24:56 +00:00
Max Kazantsev
a509ba53fd [LoopSimplifyCFG] Turn on term folding after underlying bug fixed
llvm-svn: 347641
2018-11-27 06:19:42 +00:00
Max Kazantsev
eecd54872d [LoopSimplifyCFG] Fix corner case with duplicating successors
It fixes a bug that doesn't update Phi inputs of the only live successor that
is in the list of block's successors more than once.

Thanks @uabelho for finding this.

Differential Revision: https://reviews.llvm.org/D54849
Reviewed By: anna

llvm-svn: 347640
2018-11-27 06:17:21 +00:00
Nico Weber
cc3d32505c [gn build] Merge r347530 to gn.
llvm-svn: 347639
2018-11-27 06:04:49 +00:00
Nico Weber
3fa3a9903c Move a file I forgot to move in r347636.
llvm-svn: 347638
2018-11-27 05:49:08 +00:00
Nico Weber
32dd8bd084 [gn build] Create abi-breaking.h, config.h, llvm-config.h, and add a build file for llvm/lib/Support.
The comments at the top of
llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn and
llvm/utils/gn/build/write_cmake_config.py should explain the main bits
happening in this patch. The main parts here are that these headers are
generated at build time, not gn time, and that currently they don't do any
actual feature checks but just hardcode most things based on the current OS,
which seems to work well enough. If this stops being enough, the feature checks
should each be their own action writing the result to somewhere, and the config
write step should depend on those checks (so that they can run in parallel and
as part of the build) -- utils/llvm/gn/README.rst already has some more words
on that in "Philosophy".

(write_cmake_config.py is also going to be used to write clang's
clang/include/clang/Config/config.h)

This also adds a few files for linking to system libraries in a consistent way
if needed in llvm/utils/gn/build/libs (and moves pthread to that model).0

I'm also adding llvm/utils/gn/secondary/llvm/lib/Target/targets.gni in this
patch because $native_arch is needed for writing llvm-config.h -- the rest of
it will be used later, when the build files for llvm/lib/Target get added. That
file describes how to select which archs to build.

As a demo, also add a build file for llvm-undname and make it the default build
target (it depends on everything that can currently be built).

Differential Revision: https://reviews.llvm.org/D54678

llvm-svn: 347636
2018-11-27 05:19:17 +00:00
Craig Topper
1d0281cd43 [X86] Prevent DAG combine from folding a bitcast from vXi1 to iX with a store on pre-AVX512 targets.
If we fold the bitcast into the store we'll end up creating a truncating store to vXi1 that will get scalarized. Instead allow the bitcast to be turned into a movmsk.

We probably need to do something if the store itself is a vXi1 type, but I'll leave that til a testcase appears.

llvm-svn: 347632
2018-11-27 02:57:27 +00:00
Craig Topper
4ce89213a7 [X86] Add a bunch of test cases for storing a scalar bitcasted from a vXi1 type.
Currently a store combine will absorb the bitcast before our combine that turns bitcasts into movmsk gets a chance to run. This results in a store being created with a vXi1 type. Type legalization then promotes the input type and makes this a truncating store. Then we badly scalarize this store.

Currently we avoid this on v8i1->i8 bitcasts due to an incompletely qualified(per the original intention) check in isLoadBitCastBeneficial. An easy fix is to disable this for all vXi1->iX bitcasts on pre-avx512 targets. We'll still generate terrible code if the IR explicitly contains a store of vXi1 without a bitcast. We could probably solve that by just turning all stores of vXi1 into (store (iX (bitcast))) as an early DAG combine.

llvm-svn: 347631
2018-11-27 02:57:23 +00:00
Zola Bridges
59284b88a2 Revert "[clang][slh] add attribute for speculative load hardening"
until I figure out why the build is failing or timing out

***************************

Summary:
The prior diff had to be reverted because there were two tests
that failed. I updated the two tests in this diff

clang/test/Misc/pragma-attribute-supported-attributes-list.test
clang/test/SemaCXX/attr-speculative-load-hardening.cpp

LLVM IR already has an attribute for speculative_load_hardening. Before
this commit, when a user passed the -mspeculative-load-hardening flag to
Clang, every function would have this attribute added to it. This Clang
attribute will allow users to opt into SLH on a function by function
basis.

This can be applied to functions and Objective C methods.

Reviewers: chandlerc, echristo, kristof.beyls, aaron.ballman

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D54915

This reverts commit a5b3c232d1e3613f23efbc3960f8e23ea70f2a79.
(r347617)

llvm-svn: 347628
2018-11-27 02:22:00 +00:00
Vitaly Buka
5b6a5822b6 [stack-safety] Update comment
llvm-svn: 347626
2018-11-27 01:56:44 +00:00
Vitaly Buka
c4175726e3 [stack-safety] Fix and uncomment assert
llvm-svn: 347625
2018-11-27 01:56:35 +00:00
Vitaly Buka
f4d3b3468d [stack-safety] Fix build on gcc 5.4
llvm-svn: 347624
2018-11-27 01:56:26 +00:00
Sanjay Patel
5b729dac4a [InstCombine] add tests for rotate/bswap equality; NFC
llvm-svn: 347618
2018-11-27 00:08:21 +00:00
Zola Bridges
ac6b532d33 [clang][slh] add attribute for speculative load hardening
Summary:
The prior diff had to be reverted because there were two tests
that failed. I updated the two tests in this diff

clang/test/Misc/pragma-attribute-supported-attributes-list.test
clang/test/SemaCXX/attr-speculative-load-hardening.cpp

----- Summary from Previous Diff (Still Accurate) -----

LLVM IR already has an attribute for speculative_load_hardening. Before
this commit, when a user passed the -mspeculative-load-hardening flag to
Clang, every function would have this attribute added to it. This Clang
attribute will allow users to opt into SLH on a function by function basis.

This can be applied to functions and Objective C methods.

Reviewers: chandlerc, echristo, kristof.beyls, aaron.ballman

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D54915

llvm-svn: 347617
2018-11-27 00:03:44 +00:00
JF Bastien
60a4d80313 Fix debug build break
Comment out an assertion from D54543 which failed with error: no member named 'Range' in '(anonymous namespace)::PassAsArgInfo'.

llvm-svn: 347616
2018-11-26 23:48:47 +00:00
Sterling Augustine
567aedab5a Notify the linker when a TU compiled with split-stack has a function without a prologue.
More context here: https://go-review.googlesource.com/c/go/+/148819/

llvm-svn: 347614
2018-11-26 23:26:31 +00:00
Vitaly Buka
89a000d03a Remove trailing empty line
llvm-svn: 347613
2018-11-26 23:17:52 +00:00
Vitaly Buka
d5a578c330 [stack-safety] Analysis documentation
Summary:
Basic documentation of the Stack Safety Analysis.
It will be improved during review and upstream of an implementation.

Reviewers: kcc, eugenis, vlad.tsyrklevich, glider

Reviewed By: vlad.tsyrklevich

Subscribers: arphaman, llvm-commits

Differential Revision: https://reviews.llvm.org/D53336

llvm-svn: 347612
2018-11-26 23:16:07 +00:00