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312 Commits

Author SHA1 Message Date
Evan Cheng
1c3d571e4b SelectNodeTo now returns a SDNode*. 
llvm-svn: 29901
 2006-08-26 08:00:10 +00:00
Evan Cheng
2db7799507 Select() no longer require Result operand by reference. 
llvm-svn: 29898
 2006-08-26 05:34:46 +00:00
Evan Cheng
b246ad7b2f Match tblgen changes. 
llvm-svn: 29895
 2006-08-26 01:07:58 +00:00
Chris Lattner
db290f7479 Constify some methods. Patch provided by Anton Vayvod, thanks! 
llvm-svn: 29756
 2006-08-17 22:00:08 +00:00
Evan Cheng
7fb75bbc8d SelectNodeTo() may return a SDOperand that is different from the input. 
llvm-svn: 29726
 2006-08-16 07:30:09 +00:00
Evan Cheng
af3e059bc4 RET_FLAG has an optional input flag, but it does not produce a flag result. 
llvm-svn: 29725
 2006-08-16 07:28:58 +00:00
Chris Lattner
8ca6e82bce Eliminate use of getNode that takes a vector. 
llvm-svn: 29614
 2006-08-11 17:38:39 +00:00
Chris Lattner
c3ce410ac3 eliminate use of getNode that takes vector of operands. 
llvm-svn: 29611
 2006-08-11 17:21:12 +00:00
Evan Cheng
6053206580 Match tablegen changes. 
llvm-svn: 29604
 2006-08-11 09:08:15 +00:00
Evan Cheng
d18be1d9c1 Match tablegen isel changes. 
llvm-svn: 29549
 2006-08-07 22:28:20 +00:00
Chris Lattner
92e5f0a118 remove a dead proto 
llvm-svn: 29505
 2006-08-03 18:51:04 +00:00
Evan Cheng
92eb9a1639 Remove a duplicate pattern. 
llvm-svn: 29414
 2006-07-31 18:43:10 +00:00
Evan Cheng
3b5f1c6248 Remove InFlightSet hack. No longer needed. 
llvm-svn: 29373
 2006-07-28 00:47:19 +00:00
Evan Cheng
e869883c2d Remove NodeDepth 
llvm-svn: 29338
 2006-07-27 06:40:15 +00:00
Jim Laskey
d19ba2cf6c It was pointed out that DEBUG() is only available with -debug. 
llvm-svn: 29106
 2006-07-11 18:25:13 +00:00
Jim Laskey
4c0d841280 Ensure that dump calls that are associated with asserts are removed from 
non-debug build.

llvm-svn: 29105
 2006-07-11 17:58:07 +00:00
Chris Lattner
6a9ec7e80e Don't pass target name into TargetData anymore, it is never used or needed. 
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.

llvm-svn: 28830
 2006-06-16 18:22:52 +00:00
Evan Cheng
de0f25081a Change RET node to include signness information of the return values. i.e. 
RET chain, value1, sign1, value2, sign2, ...

llvm-svn: 28510
 2006-05-26 23:10:12 +00:00
Evan Cheng
09942d3f8b Assert if InflightSet is not cleared after instruction selecting a BB. 
llvm-svn: 28459
 2006-05-25 00:24:28 +00:00
Evan Cheng
b040dd86af Clear HandleMap and ReplaceMap after instruction selection. Or it may cause 
non-deterministic behavior.

llvm-svn: 28454
 2006-05-24 20:46:25 +00:00
Owen Anderson
c6947bf2ce Make all of the TargetMachine subclasses use the new string TargetData methods. 
This is part of the on-going work on PR 761.

llvm-svn: 28414
 2006-05-20 00:24:56 +00:00
Evan Cheng
667b133ab9 getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 
llvm-svn: 28378
 2006-05-18 00:12:58 +00:00
Evan Cheng
ea24815aa3 Remove PointerType from class Target 
llvm-svn: 28368
 2006-05-17 21:20:27 +00:00
Andrew Lenharth
14504c85ed Move this code to a common place 
llvm-svn: 28329
 2006-05-16 17:42:15 +00:00
Chris Lattner
50371a3046 Fix build breakage :( 
llvm-svn: 28267
 2006-05-12 23:26:11 +00:00
Chris Lattner
04a8ddfd68 Actually override the right method. :) 
Bug identified by coverity.

llvm-svn: 28259
 2006-05-12 18:19:25 +00:00
Owen Anderson
29e4d70aed Refactor a bunch of includes so that TargetMachine.h doesn't have to include 
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.

llvm-svn: 28238
 2006-05-12 06:33:49 +00:00
Chris Lattner
f45b6d5c08 Split SwitchSection into SwitchTo{Text|Data}Section methods. 
llvm-svn: 28184
 2006-05-09 04:59:56 +00:00
Chris Lattner
eb41c99161 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. 
llvm-svn: 28104
 2006-05-04 18:05:43 +00:00
Chris Lattner
685568510a Move some methods out of MachineInstr into MachineOperand 
llvm-svn: 28102
 2006-05-04 17:52:23 +00:00
Chris Lattner
97f1af2f14 There shalt be only one "immediate" operand type! 
llvm-svn: 28099
 2006-05-04 17:21:20 +00:00
Chris Lattner
c779fca289 Remove a bunch more SparcV9 specific stuff 
llvm-svn: 28093
 2006-05-04 01:15:02 +00:00
Chris Lattner
0f89e6b11d Remove some more unused stuff from MachineInstr that was leftover from V9. 
llvm-svn: 28091
 2006-05-04 00:44:25 +00:00
Owen Anderson
71bc529dfa Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. 
This fixes PR 759.

llvm-svn: 28074
 2006-05-03 01:29:57 +00:00
Nate Begeman
05174045df Extend printBasicBlockLabel a bit so that it can be used to print all 
basic block labels, consolidating the code to do so in one place for each
target.

llvm-svn: 28050
 2006-05-02 05:37:32 +00:00
Nate Begeman
7ed816f900 JumpTable support! What this represents is working asm and jit support for 
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.

llvm-svn: 27947
 2006-04-22 18:53:45 +00:00
Nate Begeman
6cdc599d05 Disable switch lowering for targets based on the selection dag isel, 
letting the code generator handle them directly.

llvm-svn: 27539
 2006-04-08 19:46:55 +00:00
Jim Laskey
b93bc75add Foundation for call frame information. 
llvm-svn: 27491
 2006-04-07 16:34:46 +00:00
Jim Laskey
eb38a3e83a Expose base register for DwarfWriter. Refactor code accordingly. 
llvm-svn: 27225
 2006-03-28 13:48:33 +00:00
Jim Laskey
8688957c53 Translate llvm target registers to dwarf register numbers properly. 
llvm-svn: 27180
 2006-03-27 20:18:45 +00:00
Chris Lattner
e199d55073 #include Intrinsics.h into all dag isels 
llvm-svn: 27109
 2006-03-25 06:47:10 +00:00
Jim Laskey
1716e53341 Add dwarf register numbering to register data. 
llvm-svn: 27081
 2006-03-24 21:15:58 +00:00
Jim Laskey
cec9c18c62 Add support to locate local variables in frames (early version.) 
llvm-svn: 26994
 2006-03-23 18:12:57 +00:00
Chris Lattner
89e0790edb Eliminate IntrinsicLowering from TargetMachine. 
Make the CBE and V9 backends create their own, since they're the only ones that use it.

llvm-svn: 26974
 2006-03-23 05:43:16 +00:00
Nate Begeman
42736d46b2 Remove BRTWOWAY* 
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.

llvm-svn: 26814
 2006-03-17 01:40:33 +00:00
Evan Cheng
7ec94f2ff7 Added getTargetLowering() to TargetMachine. Refactored targets to support this. 
llvm-svn: 26742
 2006-03-13 23:20:37 +00:00
Chris Lattner
125881e75b Add support for 'special' llvm globals like debug info and static ctors/dtors. 
llvm-svn: 26628
 2006-03-09 06:14:35 +00:00
Duraid Madina
a3c5cd22e1 doo de doo 
llvm-svn: 26614
 2006-03-08 06:18:46 +00:00
Chris Lattner
6b0947c277 Copysign needs to be expanded everywhere. Note that Alpha and IA64 should 
implement copysign as a native op if they have it.

llvm-svn: 26541
 2006-03-05 05:08:37 +00:00
Duraid Madina
3fcb00a53f distinguish between objects and register names, now we can have stuff 
with names like "f84", "in6" etc etc.

this should fix one or two tests

llvm-svn: 26232
 2006-02-16 13:12:57 +00:00
Chris Lattner
599b432345 Switch targets over to using SelectionDAG::getCALLSEQ_START to create 
CALLSEQ_START nodes.

llvm-svn: 26143
 2006-02-13 09:00:43 +00:00
Duraid Madina
81b9a8f8f7 fix storing booleans (grawp missed this one) 
llvm-svn: 26120
 2006-02-11 07:33:17 +00:00
Duraid Madina
a514d8d8a6 now short immediates will get matched (previously constants were all 
triggering movl 64bit imm fat instructions)

llvm-svn: 26119
 2006-02-11 07:32:15 +00:00
Evan Cheng
6bd0f9c4ba Match getTargetNode() changes (now return SDNode* instead of SDOperand). 
llvm-svn: 26085
 2006-02-09 07:17:49 +00:00
Evan Cheng
521e5a1bfe Change Select() from 
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);

llvm-svn: 26067
 2006-02-09 00:37:58 +00:00
Evan Cheng
fb902782e8 Use SelectRoot() as entry of any tblgen based isel. 
llvm-svn: 25997
 2006-02-05 06:46:41 +00:00
Nate Begeman
0be60963bd Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875
 2006-02-01 07:19:44 +00:00
Evan Cheng
f115c17f23 Allow the specification of explicit alignments for constant pool entries. 
llvm-svn: 25855
 2006-01-31 22:23:14 +00:00
Chris Lattner
5f0a3df176 Targets all now request ConstantFP to be legalized into TargetConstantFP. 
'fpimm' in .td files is now TargetConstantFP.

llvm-svn: 25771
 2006-01-29 06:26:08 +00:00
Nate Begeman
87c2c0e66b Implement Promote for VAARG, and allow it to be custom promoted for people 
who don't want the default behavior (Alpha).

llvm-svn: 25726
 2006-01-28 03:14:31 +00:00
Chris Lattner
d467a681e9 Remove some dead code 
llvm-svn: 25719
 2006-01-28 00:02:51 +00:00
Nate Begeman
d2c6fbef4a Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.

llvm-svn: 25696
 2006-01-27 21:09:22 +00:00
Chris Lattner
20d4194a0d PHI and INLINEASM are now built-in instructions provided by Target.td 
llvm-svn: 25674
 2006-01-27 01:46:15 +00:00
Duraid Madina
f868d1777b fix stack corruption! Previously, 16-byte whole-FP-register stores were 
being treated as needing only 8 bytes (though they were 16 byte aligned.)

This should fix a bunch of tests - anyone have any comments, though?

  - in Target.td , SpillSize and SpillAlignment seem dead - is this what
    Size and Alignment do now?
  - in CodeGenRegisters.h/CodeGenTarget.cpp , DeclaredSpillSize and
    DeclaredSpillAlignment seem dead.
  - there are a bunch of comments here and there that don't clearly
    distinguish between 'size' and 'spillsize' etc. hmm.

llvm-svn: 25644
 2006-01-26 09:45:03 +00:00
Duraid Madina
13335846a8 some hoovering 
llvm-svn: 25643
 2006-01-26 09:08:31 +00:00
Evan Cheng
7da6daadc7 Set SchedulingForLatency to be the default scheduling preference for all. 
llvm-svn: 25607
 2006-01-25 18:52:42 +00:00
Nate Begeman
c29fac7fce First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
 2006-01-25 18:21:52 +00:00
Evan Cheng
c368fb710f Default scheduling preference is SchedulingForLatency. 
llvm-svn: 25603
 2006-01-25 09:15:54 +00:00
Duraid Madina
7d51a9b8e3 add bundling! well not really, for now it's just stop-insertion. 
llvm-svn: 25593
 2006-01-25 02:23:38 +00:00
Duraid Madina
fa9095ff95 die, die!! r15, you are not callee-saved 
llvm-svn: 25527
 2006-01-23 06:11:45 +00:00
Duraid Madina
43e8616515 fix register corruption! (my god.) r15 is a scratch reg, using that as 
a frame pointer is a pretty doofus thing to do. use r5 instead, and
mark it callee-saved, coz that's what it is!

llvm-svn: 25526
 2006-01-23 06:08:46 +00:00
Chris Lattner
aafc339b4e Add explicit #includes of <iostream> 
llvm-svn: 25515
 2006-01-22 23:41:00 +00:00
Duraid Madina
019bfb760c insignificant, but next up is proper stack frame layout! 
llvm-svn: 25497
 2006-01-21 14:27:19 +00:00
Duraid Madina
2715941e86 remove RET hack, add proper support for rets (watching out for ret voids) 
llvm-svn: 25486
 2006-01-20 20:24:31 +00:00
Duraid Madina
94bace229d fix sext breakage: now we correctly deal with functions that return 
int vs uint

llvm-svn: 25478
 2006-01-20 16:10:05 +00:00
Duraid Madina
b18a42fd3a fix storing bools! eek! 
llvm-svn: 25476
 2006-01-20 03:40:25 +00:00
Duraid Madina
069b517767 fix boolean XOR (which fixes up comparisons..) 
llvm-svn: 25462
 2006-01-19 15:18:56 +00:00
Duraid Madina
4b75614c9c BOOM! 
llvm-svn: 25460
 2006-01-19 14:14:11 +00:00
Duraid Madina
08771721f9 click click 
llvm-svn: 25459
 2006-01-19 14:13:11 +00:00
Duraid Madina
1946b2ff30 fix calls that return f32 
llvm-svn: 25455
 2006-01-19 08:31:51 +00:00
Duraid Madina
c667c360e3 oops, this shouldn't have gotten in 
llvm-svn: 25388
 2006-01-17 03:09:48 +00:00
Duraid Madina
365cb4f82d use proper (82-bit) spills/fills when spilling FP regs, so that 
divides don't get broken. this fixes obsequi, smg2000, and probably
a bunch of other stuff (tm)

llvm-svn: 25385
 2006-01-17 02:04:52 +00:00
Duraid Madina
f9cc57d93b fixing divides 
llvm-svn: 25383
 2006-01-17 01:19:49 +00:00
Duraid Madina
d359468147 fixing divides: FP should now be 100%, and integers are fine too 
unless you try to div/mod 0 by anything, in which case you will
get some cute number, and not 0, which is bad.

llvm-svn: 25358
 2006-01-16 14:33:04 +00:00
Duraid Madina
12da32f440 fix division! again!! pattern isel, prepare to die. 
llvm-svn: 25353
 2006-01-16 06:33:38 +00:00
Duraid Madina
eb89d7a5d1 explain that r12 is the stack pointer reg 
llvm-svn: 25336
 2006-01-15 09:45:23 +00:00
Chris Lattner
be7efab5dc Cleanup IA64ISD, tell the graph drawer what the symbolic names for the enums are. 
llvm-svn: 25324
 2006-01-14 22:27:21 +00:00
Nate Begeman
85b2dc0c4e bswap implementation 
llvm-svn: 25312
 2006-01-14 03:14:10 +00:00
Duraid Madina
e8b42dc96d don't be a doofus - this fixes storing bools 
llvm-svn: 25274
 2006-01-13 10:28:25 +00:00
Chris Lattner
ea59d9a498 new nodes 
llvm-svn: 25271
 2006-01-13 02:40:58 +00:00
Duraid Madina
f6131d02a9 sabre's (correct) fix means these guys need to be flagged as well (else 
the scheduler will complain)

llvm-svn: 25241
 2006-01-12 03:28:40 +00:00
Chris Lattner
2514d94ca3 Fix an itanium call lowering bug for duraid 
llvm-svn: 25235
 2006-01-12 01:33:08 +00:00
Nate Begeman
2b45fdffcb Missed a spot. 
llvm-svn: 25233
 2006-01-11 23:20:28 +00:00
Nate Begeman
cff96008ac Add bswap, rotl, and rotr nodes 
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
 2006-01-11 21:21:00 +00:00
Chris Lattner
f9e32005dd tblgen does this now 
llvm-svn: 25220
 2006-01-11 19:53:22 +00:00
Duraid Madina
52e3f53ea5 cleanup GETFD 
llvm-svn: 25198
 2006-01-11 03:50:40 +00:00
Duraid Madina
3246f5317b this just might work 
llvm-svn: 25195
 2006-01-11 01:38:07 +00:00
Duraid Madina
242414e621 add support for selecting bools 
FIXME: this is commented out because it makes tblgen go a bit fruity
llvm-svn: 25193
 2006-01-11 01:21:12 +00:00
Chris Lattner
6a671ed26f silence a bogus warning 
llvm-svn: 25185
 2006-01-10 19:45:18 +00:00
Duraid Madina
e2986589aa heh, 'sif it'd be a legalizer bug. 
llvm-svn: 25172
 2006-01-10 05:26:01 +00:00