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a18b7d76b3
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18820 Commits

Author SHA1 Message Date
Chris Lattner
a18b7d76b3 add support for 128-bit add/sub on ppc64 
llvm-svn: 37158
 2007-05-17 06:52:46 +00:00
Reid Spencer
e22c276c5c Print integer values as both decimal and hexadecimal for convenience 
of verifying result values when debugging.

llvm-svn: 37156
 2007-05-17 06:47:54 +00:00
Chris Lattner
307a29e831 add support for 128-bit integer add/sub 
llvm-svn: 37154
 2007-05-17 06:35:11 +00:00
Reid Spencer
39e03f53ca For lshr by 0 bits, just return *this as a short cut. This also prevents 
undefined behavior when the width > 64 bits.

llvm-svn: 37153
 2007-05-17 06:26:29 +00:00
Chris Lattner
f65fe1d931 Fix PR1427 and test/CodeGen/X86/mmx-shuffle.ll 
llvm-svn: 37141
 2007-05-17 03:29:42 +00:00
Evan Cheng
dc9e574073 Remove. Not needed. 
llvm-svn: 37139
 2007-05-17 00:11:35 +00:00
Evan Cheng
4fa2db30d9 Default implementation of TargetInstrInfo::getBlockSize(). 
llvm-svn: 37138
 2007-05-16 23:53:44 +00:00
Evan Cheng
3163b77d5e Add target hook to specify block size limit for if-conversion. 
llvm-svn: 37134
 2007-05-16 23:45:53 +00:00
Dale Johannesen
cc99a6fc32 Don't fold bitconvert(load) for preinc/postdec loads. Likewise stores. 
llvm-svn: 37130
 2007-05-16 22:45:30 +00:00
Evan Cheng
ab88e91c81 isBlockPredicable() always ignore terminal instructions; add comments. 
llvm-svn: 37126
 2007-05-16 21:54:37 +00:00
Evan Cheng
b09bf9914f ARM::tB is also predicable. 
llvm-svn: 37125
 2007-05-16 21:53:43 +00:00
Evan Cheng
973f4a19cb PredicateInstruction returns true if the operation was successful. 
llvm-svn: 37124
 2007-05-16 21:53:07 +00:00
Evan Cheng
30f3168b7b Add default implementation of PredicateInstruction(). 
llvm-svn: 37123
 2007-05-16 21:20:37 +00:00
Evan Cheng
6f761adecb Rename M_PREDICATED to M_PREDICABLE; Moved isPredicable() to MachineInstr. 
llvm-svn: 37121
 2007-05-16 20:56:08 +00:00
Evan Cheng
48f230dcb0 Move if-conversion after all passes that may use register scavenger. 
llvm-svn: 37120
 2007-05-16 20:52:46 +00:00
Evan Cheng
f7a017dfa7 Removed isPredicable(). 
llvm-svn: 37119
 2007-05-16 20:50:23 +00:00
Evan Cheng
d3f1a259db Make ARM::B isPredicable; Make Bcc and MOVCC condition option a normal operand so they are not predicable. 
llvm-svn: 37118
 2007-05-16 20:50:01 +00:00
Evan Cheng
0aced52f41 Added isPredicable bit to class Instruction. 
llvm-svn: 37117
 2007-05-16 20:47:01 +00:00
Reid Spencer
1ec1e07949 Fix a bug in the "fromString" method where radix 2,8 and 16 values were 
not being generated correctly because the shl operator does not mutate its
object but returns a new value. Also, make the distinction between radix
16 and the others more clear.

llvm-svn: 37111
 2007-05-16 19:18:22 +00:00
Reid Spencer
a89e097aa2 Avoid a "loss of precision" error in gcc 4.1.3. 
llvm-svn: 37105
 2007-05-16 16:39:29 +00:00
Duncan Sands
3296999dbb Output exception call-sites in address order, as required by the unwinding 
runtime.

llvm-svn: 37104
 2007-05-16 12:12:23 +00:00
Evan Cheng
6943cefdcd Conditional branch is not a barrier. 
llvm-svn: 37103
 2007-05-16 07:45:54 +00:00
Chris Lattner
a18b36cf45 Use a ptr set instead of a linear search to unique TokenFactor operands. 
This fixes PR1423

llvm-svn: 37102
 2007-05-16 06:37:59 +00:00
Chris Lattner
e67947b38f implement the missing maskmovq mmx intrinsic that akor hit. 
llvm-svn: 37100
 2007-05-16 06:08:17 +00:00
Evan Cheng
c149ee9f00 Fix comment. 
llvm-svn: 37098
 2007-05-16 05:14:06 +00:00
Evan Cheng
3fb34a4fdd Devang points out that we need an assertion here. 
llvm-svn: 37097
 2007-05-16 05:11:10 +00:00
Reid Spencer
3c3aa55322 Implement printing of instruction result values when debug info is turned 
on. This helps to speed up the debugging time by showing computational
results as the program executes.

llvm-svn: 37095
 2007-05-16 02:05:13 +00:00
Evan Cheng
a781c7788a Bug fix: should check ABI alignment, not pref. alignment. 
llvm-svn: 37094
 2007-05-16 02:04:50 +00:00
Evan Cheng
34928ae31f Hooks for predication support. 
llvm-svn: 37093
 2007-05-16 02:01:49 +00:00
Evan Cheng
aafca4d4a2 Initial commit of (very basic) if converter. 
llvm-svn: 37092
 2007-05-16 02:00:57 +00:00
Dale Johannesen
78ae2e1acb Remove extra CFG edges before doing these passes; it makes them happier. 
llvm-svn: 37089
 2007-05-15 21:19:17 +00:00
Lauro Ramos Venancio
251ea5ab65 Fix an infinite recursion in GetNegatedExpression. 
llvm-svn: 37086
 2007-05-15 17:05:43 +00:00
Duncan Sands
eddbb07561 The index into the actions table is a ULEB128 not a SLEB128. 
llvm-svn: 37084
 2007-05-15 13:54:14 +00:00
Chris Lattner
701ec7ae28 selects can also reach here 
llvm-svn: 37081
 2007-05-15 06:42:04 +00:00
Chris Lattner
272d600454 implement the ModuleProvider::dematerializeFunction hook 
llvm-svn: 37080
 2007-05-15 06:29:44 +00:00
Reid Spencer
b1ac506546 Un-brain-dead-ify the lowering of part set for the reverse case. 
llvm-svn: 37071
 2007-05-15 02:26:52 +00:00
Chris Lattner
ba648e0d45 Fix some subtle issues handling immediate values. This fixes 
test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll

llvm-svn: 37069
 2007-05-15 01:33:58 +00:00
Chris Lattner
4861b958f1 fix some subtle inline asm selection issues 
llvm-svn: 37067
 2007-05-15 01:31:05 +00:00
Evan Cheng
9f0ffdf4b3 Add PredicateOperand to all ARM instructions that have the condition field. 
llvm-svn: 37066
 2007-05-15 01:29:07 +00:00
Chris Lattner
ce20a357f1 fix subtle bugs in inline asm operand selection 
llvm-svn: 37065
 2007-05-15 01:28:08 +00:00
Evan Cheng
eea85a767e Added getNumExplicitOperands and findFirstPredOperand. 
llvm-svn: 37064
 2007-05-15 01:26:09 +00:00
Chris Lattner
dfc6f4a06c Fix Transforms/InstCombine/2007-05-14-Crash.ll 
llvm-svn: 37057
 2007-05-15 00:16:00 +00:00
Lauro Ramos Venancio
c9c5da3939 Fix previous patch. GOTOFF can be used only when the symbol has internal 
linkage or hidden visibility.

llvm-svn: 37055
 2007-05-14 23:20:21 +00:00
Chris Lattner
eba1b74df3 implement a simple fneg optimization/propagation thing. This compiles: 
CodeGen/PowerPC/fneg.ll into:

_t4:
        fmul f0, f3, f4
        fmadd f1, f1, f2, f0
        blr

instead of:

_t4:
        fneg f0, f3
        fmul f0, f0, f4
        fmsub f1, f1, f2, f0
        blr

llvm-svn: 37054
 2007-05-14 22:04:50 +00:00
Evan Cheng
9645be8cf5 Only worry about intervening kill if there are more than one live ranges in the interval. 
llvm-svn: 37052
 2007-05-14 21:23:51 +00:00
Evan Cheng
e9e48bcf28 Fix for PR1406: 
v1 =
r2 = move v1
   = op r2<kill>
...
r2 = move v1
   = op r2<kill>

Clear the first r2 kill if v1 and r2 are joined.

llvm-svn: 37050
 2007-05-14 21:10:05 +00:00
Evan Cheng
bb876d7323 When marking a register as being implicitly defined, make sure to clear its partial use info as well. 
llvm-svn: 37046
 2007-05-14 20:39:18 +00:00
Lauro Ramos Venancio
3ff817509f Optimize PIC implementation. GOTOFF can be used when the symbol is defined 
and used in the same module.

llvm-svn: 37044
 2007-05-14 18:46:23 +00:00
Lauro Ramos Venancio
c6d71fb584 Enable aliases on arm-linux. 
llvm-svn: 37042
 2007-05-14 18:32:56 +00:00
Reid Spencer
afe2314bb0 Give names to the final result values of the part_set computations. This 
just aids in readability and debugability of the output. No functional change.

llvm-svn: 37037
 2007-05-14 17:21:17 +00:00