1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00
Commit Graph

7118 Commits

Author SHA1 Message Date
Clement Courbet
519dab966b [llvm-exegesis] Fix doc in r342947.
llvm-exegesis.rst was using invalid indentation for bullet points.

llvm-svn: 342948
2018-09-25 07:48:38 +00:00
Clement Courbet
0301f9855d [llvm-exegesis] Allow benchmarking arbitrary code snippets.
Summary:

This is a step towards fixing PR38048.

Note that right now the measurements are given per instruction. We'll
need to give measurements a per code snippet and update the analysis (PR38731).

Reviewers: gchatelet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D52041

llvm-svn: 342947
2018-09-25 07:31:44 +00:00
Kristina Brooks
3f85f9ee6d [Docs] [Support] Correct a missed reference and use up to date .inc examples.
In my original diff I missed #include "llvm/System/Thing.h" and forgot to update a
reference to .inc files a few lines down. This patch corrects these things as 
they were missed in revision 342500.

llvm-svn: 342705
2018-09-21 01:53:51 +00:00
Calixte Denizet
79a1f91df9 [IR] Add a boolean field in DILocation to know if a line must covered or not
Summary:
Some lines have a hit counter where they should not have one.
For example, in C++, some cleanup is adding at the end of a scope represented by a '}'.
So such a line has a hit counter where a user expects to not have one.
The goal of the patch is to add this information in DILocation which is used to get the covered lines in GCOVProfiling.cpp.
A following patch in clang will add this information when generating IR (https://reviews.llvm.org/D49916).

Reviewers: marco-c, davidxl, vsk, javed.absar, rnk

Reviewed By: rnk

Subscribers: eraman, xur, danielcdh, aprantl, rnk, dblaikie, #debug-info, vsk, llvm-commits, sylvestre.ledru

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D49915

llvm-svn: 342631
2018-09-20 08:53:06 +00:00
Sylvestre Ledru
ec4bae1501 Improve the doc about the initial commit email sent to the ML
llvm-svn: 342622
2018-09-20 07:43:24 +00:00
Kristina Brooks
79e13b3973 Remove svn:executable from a documentation file.
Should fix the buildbot failure caused by it.

llvm-svn: 342502
2018-09-18 18:37:16 +00:00
Kristina Brooks
ed0109da57 [Docs] [Support] System Library to Support Library transition along with minor corrections to reflect it.
System Library has been a long deprecated term along with the path lib/System, having been superseded/renamed
to the Support Library a long time ago. These patches reflect those changes in documentation as well as
update some outdated examples and provide context to the origin of the Support Library.

Differential Revision: https://reviews.llvm.org/D52107

llvm-svn: 342500
2018-09-18 18:05:38 +00:00
Teresa Johnson
4c2b238d91 [ThinLTO] Update LangRef doc for summary parsing
Summary:
Remove note about summary being ignored. Update to reflect the
fact that summary is now parsed by llvm-as.

While here, fix one summary format that changed since the initial
implementation.

Reviewers: dexonsmith

Subscribers: inglorion, llvm-commits

Differential Revision: https://reviews.llvm.org/D51540

llvm-svn: 342479
2018-09-18 13:44:13 +00:00
Richard Smith
0fc962508b Add flag to llvm-profdata to allow symbols in profile data to be remapped, and
add a tool to generate symbol remapping files.

Summary:
The new tool llvm-cxxmap builds a symbol mapping table from a file containing
a description of partial equivalences to apply to mangled names and files
containing old and new symbol tables.

Reviewers: davidxl

Subscribers: mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D51470

llvm-svn: 342168
2018-09-13 20:22:02 +00:00
Hans Wennborg
b70865a352 ReleaseNotes: update links to use https
llvm-svn: 341785
2018-09-10 08:50:31 +00:00
Reid Kleckner
8c11658b5d [benchmark] Re-enable benchmarks on all platforms including Windows
The assertion in MCCodeView.cpp was resolved in r340878.

This reverts both r340905 and r340836, making benchmarks build by
default everywhere.

llvm-svn: 341716
2018-09-07 21:47:00 +00:00
Chandler Carruth
0e44a1b235 [x86/SLH] Add a real Clang flag and LLVM IR attribute for Speculative
Load Hardening.

Wires up the existing pass to work with a proper IR attribute rather
than just a hidden/internal flag. The internal flag continues to work
for now, but I'll likely remove it soon.

Most of the churn here is adding the IR attribute. I talked about this
Kristof Beyls and he seemed at least initially OK with this direction.
The idea of using a full attribute here is that we *do* expect at least
some forms of this for other architectures. There isn't anything
*inherently* x86-specific about this technique, just that we only have
an implementation for x86 at the moment.

While we could potentially expose this as a Clang-level attribute as
well, that seems like a good question to defer for the moment as it
isn't 100% clear whether that or some other programmer interface (or
both?) would be best. We'll defer the programmer interface side of this
for now, but at least get to the point where the feature can be enabled
without relying on implementation details.

This also allows us to do something that was really hard before: we can
enable *just* the indirect call retpolines when using SLH. For x86, we
don't have any other way to mitigate indirect calls. Other architectures
may take a different approach of course, and none of this is surfaced to
user-level flags.

Differential Revision: https://reviews.llvm.org/D51157

llvm-svn: 341363
2018-09-04 12:38:00 +00:00
Chandler Carruth
fb4c3562b1 [x86/SLH] Teach SLH to harden against the "ret2spec" attack by
implementing the proposed mitigation technique described in the original
design document.

The idea is to check after calls that the return address used to arrive
at that location is in fact the correct address. In the event of
a mis-predicted return which reaches a *valid* return but not the
*correct* return, this will detect the mismatch much like it would
a mispredicted conditional branch.

This is the last published attack vector that I am aware of in the
Spectre v1 space which is not mitigated by SLH+retpolines. However,
don't read *too* much into that: this is an area of ongoing research
where we expect more issues to be discovered in the future, and it also
makes no attempt to mitigate Spectre v4. Still, this is an important
completeness bar for SLH.

The change here is of course delightfully simple. It was predicated on
cutting support for post-instruction symbols into LLVM which was not at
all simple. Many thanks to Hal Finkel, Reid Kleckner, and Justin Bogner
who helped me figure out how to do a bunch of the complex changes
involved there.

Differential Revision: https://reviews.llvm.org/D50837

llvm-svn: 341358
2018-09-04 10:59:10 +00:00
Matthias Braun
fd5877ed05 Revamp test-suite documentation
- Remove duplication: Both TestingGuide and TestSuiteMakefileGuide
  would give a similar overview over the test-suite.
- Present cmake/lit as the default/normal way of running the test-suite:
- Move information about the cmake/lit testsuite into the new
  TestSuiteGuide.rst file. Mark the remaining information in
  TestSuiteMakefilesGuide.rst as deprecated.
- General simplification and shorting of language.
- Remove paragraphs about tests known to fail as everything should pass
  nowadays.
- Remove paragraph about zlib requirement; it's not required anymore
  since we copied a zlib source snapshot into the test-suite.
- Remove paragraph about comparison with "native compiler". Correctness is
  always checked against reference outputs nowadays.
- Change cmake/lit quickstart section to recommend `pip` for installing
  lit and use `CMAKE_C_COMPILER` and a cache file in the example as that
  is what most people will end up doing anyway. Also a section about
  compare.py to quickstart.
- Document `Bitcode` and `MicroBenchmarks` directories.
- Add section with commonly used cmake configuration options.
- Add section about showing and comparing result files via compare.py.
- Add section about using external benchmark suites.
- Add section about using custom benchmark suites.
- Add section about profile guided optimization.
- Add section about cross-compilation and running on external devices.

Differential Revision: https://reviews.llvm.org/D51465

llvm-svn: 341260
2018-08-31 21:47:01 +00:00
Andrea Di Biagio
7e5d9331c7 [llvm-mca] Report the number of dispatched micro opcodes in the DispatchStatistics view.
This patch introduces the following changes to the DispatchStatistics view:
 * DispatchStatistics now reports the number of dispatched opcodes instead of
   the number of dispatched instructions.
 * The "Dynamic Dispatch Stall Cycles" table now also reports the percentage of
   stall cycles against the total simulated cycles.

This change allows users to easily compare dispatch group sizes with the
processor DispatchWidth.
Before this change, it was difficult to correlate the two numbers, since
DispatchStatistics view reported numbers of instructions (instead of opcodes).
DispatchWidth defines the maximum size of a dispatch group in terms of number of
micro opcodes.

The other change introduced by this patch is related to how DispatchStage
generates "instruction dispatch" events.
In particular:
 * There can be multiple dispatch events associated with a same instruction
 * Each dispatch event now encapsulates the number of dispatched micro opcodes.

The number of micro opcodes declared by an instruction may exceed the processor
DispatchWidth. Therefore, we cannot assume that instructions are always fully
dispatched in a single cycle.
DispatchStage knows already how to handle instructions declaring a number of
opcodes bigger that DispatchWidth. However, DispatchStage always emitted a
single instruction dispatch event (during the first simulated dispatch cycle)
for instructions dispatched.

With this patch, DispatchStage now correctly notifies multiple dispatch events
for instructions that cannot be dispatched in a single cycle.

A few views had to be modified. Views can no longer assume that there can only
be one dispatch event per instruction.

Tests (and docs) have been updated.

Differential Revision: https://reviews.llvm.org/D51430

llvm-svn: 341055
2018-08-30 10:50:20 +00:00
Andrea Di Biagio
80b01d0203 [llvm-mca] Add fields "Total uOps" and "uOps Per Cycle" to the report generated by the SummaryView.
This patch adds two new fields to the perf report generated by the SummaryView.
Fields are now logically organized into two small groups; only the second group
contains throughput indicators.

Example:
```
Iterations:        100
Instructions:      300
Total Cycles:      414
Total uOps:        700

Dispatch Width:    4
uOps Per Cycle:    1.69
IPC:               0.72
Block RThroughput: 4.0
```

This patch also updates the docs for llvm-mca.
Due to the nature of this change, several tests in the tools/llvm-mca directory
were affected, and had to be updated using script `update_mca_test_checks.py`.

llvm-svn: 340946
2018-08-29 17:56:39 +00:00
Kirill Bobyrev
66a3a0778c [benchmark] NFC: Turn benchmark ON on all non-Windows buildbots
The problems with benchmark build should be fixed now, but Windows
buildbots still run into errors seemingly because of the bug in
clang-cl. Because of that, benchmark shouldn't be built on Windows at
this point.

llvm-svn: 340905
2018-08-29 08:59:36 +00:00
Dean Michael Berris
e834193713 [XRay][docs] Chrome Trace Viewer Instructions
This patch adds an example on how to generate a Chrome Trace Viewer
loadable trace from an XRay trace.

llvm-svn: 340847
2018-08-28 17:36:30 +00:00
Dean Michael Berris
28fa23e5d2 [XRay][docs] Update instructions
Add `xray_mode=xray-basic` to the list of options in the "further
exploration" section of the doc.

llvm-svn: 340843
2018-08-28 16:46:27 +00:00
Kirill Bobyrev
d9a29a170f [benchmark] Stop building benchmarks by default
Although the benchmark regex-related build issue seems to be
fixed, it appears that benchmark library triggers some stage 2 clang-cl
bugs:

http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/13495/steps/build%20stage%202/logs/stdio

The only sensible option now is to prevent benchmark library from
building in the default configuration.

llvm-svn: 340836
2018-08-28 15:36:50 +00:00
Kirill Bobyrev
0f55045526 Pull google/benchmark library to the LLVM tree
This patch pulls google/benchmark v1.4.1 into the LLVM tree so that any
project could use it for benchmark generation. A dummy benchmark is
added to `llvm/benchmarks/DummyYAML.cpp` to validate the correctness of
the build process.

The current version does not utilize LLVM LNT and LLVM CMake
infrastructure, but that might be sufficient for most users. Two
introduced CMake variables:

* `LLVM_INCLUDE_BENCHMARKS` (`ON` by default) generates benchmark
  targets
* `LLVM_BUILD_BENCHMARKS` (`OFF` by default) adds generated
  benchmark targets to the list of default LLVM targets (i.e. if `ON`
  benchmarks will be built upon standard build invocation, e.g. `ninja` or
  `make` with no specific targets)

List of modifications:

* `BENCHMARK_ENABLE_TESTING` is disabled
* `BENCHMARK_ENABLE_EXCEPTIONS` is disabled
* `BENCHMARK_ENABLE_INSTALL` is disabled
* `BENCHMARK_ENABLE_GTEST_TESTS` is disabled
* `BENCHMARK_DOWNLOAD_DEPENDENCIES` is disabled

Original discussion can be found here:
http://lists.llvm.org/pipermail/llvm-dev/2018-August/125023.html

Reviewed by: dberris, lebedev.ri

Subscribers: ilya-biryukov, ioeric, EricWF, lebedev.ri, srhines,
dschuff, mgorny, krytarowski, fedor.sergeev, mgrang, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D50894

llvm-svn: 340809
2018-08-28 09:42:41 +00:00
Matt Arsenault
47f84dd5fb LangRef: Clarify expected sNaN behavior for minnum/maxnum
This matches the de-facto behavior based on constant folding
and the default lowering to fmin/fmax.

llvm-svn: 340762
2018-08-27 17:40:07 +00:00
Andrea Di Biagio
f707cd4166 [llvm-mca] Improved report generated by the SchedulerStatistics view.
Before this patch, the SchedulerStatistics only printed the maximum number of
buffer entries consumed in each scheduler's queue at a given point of the
simulation.

This patch restructures the reported table, and adds an extra field named
"Average number of used buffer entries" to it.
This patch also uses different colors to help identifying bottlenecks caused by
high scheduler's buffer pressure.

llvm-svn: 340746
2018-08-27 14:52:52 +00:00
Chandler Carruth
5fa7afa32f [IR] Replace isa<TerminatorInst> with isTerminator().
This is a bit awkward in a handful of places where we didn't even have
an instruction and now we have to see if we can build one. But on the
whole, this seems like a win and at worst a reasonable cost for removing
`TerminatorInst`.

All of this is part of the removal of `TerminatorInst` from the
`Instruction` type hierarchy.

llvm-svn: 340701
2018-08-26 09:51:22 +00:00
Kuba Mracek
66b411671f [llvm] Document "%T" as deprecated in CommandGuide/lit.rst
Differential Revision: https://reviews.llvm.org/D48842

llvm-svn: 340677
2018-08-25 01:27:48 +00:00
Alexander Richardson
ae19e5c0f7 Allow creating llvm::Function in non-zero address spaces
Most users won't have to worry about this as all of the
'getOrInsertFunction' functions on Module will default to the program
address space.

An overload has been added to Function::Create to abstract away the
details for most callers.

This is based on https://reviews.llvm.org/D37054 but without the changes to
make passing a Module to Function::Create() mandatory. I have also added
some more tests and fixed the LLParser to accept call instructions for
types in the program address space.

Reviewed By: bjope

Differential Revision: https://reviews.llvm.org/D47541

llvm-svn: 340519
2018-08-23 09:25:17 +00:00
David Green
61ff754920 [AArch64] Add Tiny Code Model for AArch64
This adds the plumbing for the Tiny code model for the AArch64 backend. This,
instead of loading addresses through the normal ADRP;ADD pair used in the Small
model, uses a single ADR. The 21 bit range of an ADR means that the code and
its statically defined symbols need to be within 1MB of each other.

This makes it mostly interesting for embedded applications where we want to fit
as much as we can in as small a space as possible.

Differential Revision: https://reviews.llvm.org/D49673

llvm-svn: 340397
2018-08-22 11:31:39 +00:00
Fangrui Song
3986243db8 [docs][gold] Fix a typo
llvm-svn: 340335
2018-08-21 21:00:54 +00:00
Alex Langford
9728c810d5 [docs] Fix a small typo in a debug info example
llvm-svn: 340246
2018-08-21 01:43:03 +00:00
Aditya Kumar
dc85840415 Updating MergeFunctions.rst
Improving readability, removing redundant contents.

Reviewers: hiraditya
Differential Revision: https://reviews.llvm.org/D50686

llvm-svn: 340131
2018-08-18 20:17:19 +00:00
Chandler Carruth
1c07e3e377 [x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.

The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.

The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.

The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.

The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.

However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.

Differential Revision: https://reviews.llvm.org/D50833

llvm-svn: 339962
2018-08-16 23:11:05 +00:00
Justin Bogner
5605a0b70a [docs] Try to clarify the FuzzingLLVM docs
Try to improve these docs based on some recent questions that were
sent to llvm-dev:

  http://lists.llvm.org/pipermail/llvm-dev/2018-August/125329.html

llvm-svn: 339949
2018-08-16 21:55:09 +00:00
Aaron Ballman
bf8501e8ad Update the coding standards and developer policy documentation surrounding whitespace.
Clarify that you should not introduce trailing whitespace when making a commit and that you should not remove trailing whitespace that's unrelated to code you are changing or are about to change. Then clarified the developer policy around what is considered an obvious whitespace commit.

llvm-svn: 339455
2018-08-10 17:26:07 +00:00
Michael Trent
85dcf4ad23 Add a CommandGuide for llvm-objdump
Summary:
Add a CommandGuide for llvm-objdump summarizing its usage along with some
general context.

Reviewers: beanz

Reviewed By: beanz

Subscribers: Eugene.Zelenko, llvm-commits

Differential Revision: https://reviews.llvm.org/D50034

llvm-svn: 339250
2018-08-08 14:39:22 +00:00
Chandler Carruth
12bbc0f48a [docs] Continue working around broken Sphinx parsing of LLVM code blocks
by switching to `text` in another place.

llvm-svn: 339001
2018-08-06 10:20:05 +00:00
Chandler Carruth
7401215c43 [docs] Remove the dso_local tag from these functions.
The sphinx build bot is erroring on these examples for some unknown
reason, and really the dso_local doesn't seem to be relevant to the
example in any way so its cleaner to omit it. And now they will look
a bit more like other (successful) IR examples.

llvm-svn: 338998
2018-08-06 10:03:25 +00:00
Chandler Carruth
20fca1a792 [docs] Stop trying to parse the ThinLTO summary IR fragments with the
`llvm` syntax in Sphinx. This appears to just fail and create errors on
the docs buildbot.

llvm-svn: 338997
2018-08-06 09:46:59 +00:00
Chandler Carruth
54514a9035 [docs] Switch debug info metadata blocks to use text instead of llvm
highlighting syntax.

Most of them already were like this, and the Sphinx runs on the docs
build bot seems to be substantially more picky and/or not have support
for a bunch of the syntax here. Hopefully this will let it progress past
this.

My previous attempt to fix the syntax made the `opt` tool happy, but no
idea what the Sphinx stuff is really looking for, and the fact that
other blocks already just use `text` led me to this solution.

llvm-svn: 338983
2018-08-06 03:35:36 +00:00
Chandler Carruth
fd326fd8b3 [docs] Correct the basic syntax structure of the DISubrange example.
Notably, just close two of the debug info metadata nodes early rather
than leaving them open with `...` which won't ever lex correctly. And
add the missing `:` on the count labels.

Slowly progressing through all of the warnings on the documentation
build bot. Sorry to do this one commit at a time, but despite my best
efforts I can't trigger these errors locally.

llvm-svn: 338982
2018-08-06 02:30:01 +00:00
Chandler Carruth
91dc3a9e53 [docs] Remove an example that isn't well formed LLVM IR and trips up the
Sphinx syntax highlighter.

This example also doesn't really make sense. There is no control flow or
clarification of what the `Safe:` block exists to do... If we want
examples here, we should make them much more clear in addition to making
them well formed IR sequences.

llvm-svn: 338981
2018-08-06 02:02:09 +00:00
Chandler Carruth
d64990a158 [docs] Fix an LLVM-syntax code block to actually be valid LLVM synatx.
Hopefully fixes an issue on the docs build bot.

llvm-svn: 338980
2018-08-06 01:41:25 +00:00
Chandler Carruth
0169fbcd8d [docs] Turn of nasm highlighting for a code block.
This appears to produce a warning on the docs build bot. It doesn't
reproduce for me, likely because I have a newer (or more full featured)
pygments install.

llvm-svn: 338978
2018-08-06 01:19:43 +00:00
Chandler Carruth
e124888d9e [docs] Reinstate r337730 - Add support for Markdown documentation in
Sphinx.

We think the bot is updated now, so trying this again. I'm landing it
(with permission) as Michael is at a con at the moment.

Actual patch largely by Michael Spencer.

Differential Revision: https://reviews.llvm.org/D44910

llvm-svn: 338977
2018-08-06 00:38:31 +00:00
Matt Davis
b0535f09cc [llvm-mca][docs] Move the code marker text into its own subsection. NFC.
Also fixed a few undecorated 'llvm-mca' references to be highlighted
with the 'program' emphasis.

llvm-svn: 338900
2018-08-03 15:56:07 +00:00
Andrea Di Biagio
3d390604c7 [llvm-mca] Speed up the computation of the wait/ready/issued sets in the Scheduler.
This patch is a follow-up to r338702.

We don't need to use a map to model the wait/ready/issued sets. It is much more
efficient to use a vector instead.

This patch gives us an average 7.5% speedup (on top of the ~12% speedup obtained
after r338702).

llvm-svn: 338883
2018-08-03 12:55:28 +00:00
Andrea Di Biagio
1aca2c2e82 [llvm-mca][docs] Improve the CommandLine documentation.
This patch replaces all the remaining occurrences of string "MCA" with
":program:`llvm-mca`".  Somehow I missed those strings when I committed r338394.

This patch also improves section "Instruction Dispatch".

llvm-svn: 338881
2018-08-03 12:44:56 +00:00
Hans Wennborg
305048468a Clear release notes and update version
llvm-svn: 338556
2018-08-01 13:58:00 +00:00
Hans Wennborg
6b8cb0376e Bump the trunk version to 8.0.0svn
llvm-svn: 338537
2018-08-01 13:25:30 +00:00
Matt Davis
7b7e97dd13 [llvm-mca][docs] Replace "temporary" with "physical registers". NFC.
llvm-svn: 338415
2018-07-31 18:59:46 +00:00
Andrea Di Biagio
4a150d2528 [llvm-mca][docs] Improve the "How LLVM-MCA works" section.
llvm-svn: 338410
2018-07-31 18:19:15 +00:00