Chris Lattner
b85030373d
wrap long lines
...
llvm-svn: 21804
2005-05-09 04:08:33 +00:00
Chris Lattner
6ffae1a3ec
Print SrcValue nodes correctly
...
llvm-svn: 21803
2005-05-09 04:08:27 +00:00
Chris Lattner
6d85b91b24
Wrap long lines. Fix "warning: conflicting types for built-in function 'memset'"
...
warning from the CBE+GCC.
llvm-svn: 21779
2005-05-08 19:46:29 +00:00
Misha Brukman
1996bf6ea5
* Order #includes alphabetically
...
* Remove commented-out debug printouts
llvm-svn: 21707
2005-05-05 23:45:17 +00:00
Chris Lattner
6e8167d1c2
When hitting an unsupported intrinsic, actually print it
...
Lower debug info to noops.
llvm-svn: 21698
2005-05-05 17:55:17 +00:00
Andrew Lenharth
09c3c4add4
ctpop lowering in legalize
...
llvm-svn: 21697
2005-05-05 15:55:21 +00:00
Andrew Lenharth
9282d00d4f
Make promoteOp work for CT*
...
Proof?
ubyte %bar(ubyte %x) {
entry:
%tmp.1 = call ubyte %llvm.ctlz( ubyte %x )
ret ubyte %tmp.1
}
==>
zapnot $16,1,$0
CTLZ $0,$0
subq $0,56,$0
zapnot $0,1,$0
ret $31,($26),1
llvm-svn: 21691
2005-05-04 19:11:05 +00:00
Andrew Lenharth
8b64bd0fd5
Implement count leading zeros (ctlz), count trailing zeros (cttz), and count
...
population (ctpop). Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.
More coming soon.
llvm-svn: 21676
2005-05-03 17:19:30 +00:00
Alkis Evlogimenos
66f1632de8
Do not use deprecated APIs
...
llvm-svn: 21639
2005-04-30 07:13:31 +00:00
Chris Lattner
fe72cdf838
Codegen and legalize sin/cos/llvm.sqrt as FSIN/FCOS/FSQRT calls. This patch
...
was contributed by Morten Ofstad, with some minor tweaks and bug fixes added
by me.
llvm-svn: 21636
2005-04-30 04:43:14 +00:00
Chris Lattner
0366e4c0d3
Lower llvm.sqrt -> fsqrt/sqrt
...
llvm-svn: 21629
2005-04-30 04:07:50 +00:00
Chris Lattner
6ec8bb9e8d
Legalize FSQRT, FSIN, FCOS nodes, patch contributed by Morten Ofstad
...
llvm-svn: 21606
2005-04-28 21:44:33 +00:00
Chris Lattner
4678a790e6
Add FSQRT, FSIN, FCOS nodes, patch contributed by Morten Ofstad
...
llvm-svn: 21605
2005-04-28 21:44:03 +00:00
Andrew Lenharth
2a00530fa7
Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends.
...
(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*. Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.
llvm-svn: 21599
2005-04-27 20:10:01 +00:00
Chris Lattner
15bcc5273b
Fold (X > -1) | (Y > -1) --> (X&Y > -1)
...
llvm-svn: 21552
2005-04-26 01:18:33 +00:00
Chris Lattner
d8ac4da793
implement some more logical compares with constants, so that:
...
int foo1(int x, int y) {
int t1 = x >= 0;
int t2 = y >= 0;
return t1 & t2;
}
int foo2(int x, int y) {
int t1 = x == -1;
int t2 = y == -1;
return t1 & t2;
}
produces:
_foo1:
or r2, r4, r3
srwi r2, r2, 31
xori r3, r2, 1
blr
_foo2:
and r2, r4, r3
addic r2, r2, 1
li r2, 0
addze r3, r2
blr
instead of:
_foo1:
srwi r2, r4, 31
xori r2, r2, 1
srwi r3, r3, 31
xori r3, r3, 1
and r3, r2, r3
blr
_foo2:
addic r2, r4, 1
li r2, 0
addze r2, r2
addic r3, r3, 1
li r3, 0
addze r3, r3
and r3, r2, r3
blr
llvm-svn: 21547
2005-04-25 21:20:28 +00:00
Chris Lattner
7931b75a81
Codegen x < 0 | y < 0 as (x|y) < 0. This allows us to compile this to:
...
_foo:
or r2, r4, r3
srwi r3, r2, 31
blr
instead of:
_foo:
srwi r2, r4, 31
srwi r3, r3, 31
or r3, r2, r3
blr
llvm-svn: 21544
2005-04-25 21:03:25 +00:00
Misha Brukman
a9a1982a44
Convert tabs to spaces
...
llvm-svn: 21439
2005-04-22 04:01:18 +00:00
Misha Brukman
774e55c446
Remove trailing whitespace
...
llvm-svn: 21420
2005-04-21 22:36:52 +00:00
Chris Lattner
87fbc1c554
Improve and elimination. On PPC, for:
...
bool %test(int %X) {
%Y = and int %X, 8
%Z = setne int %Y, 0
ret bool %Z
}
we now generate this:
rlwinm r2, r3, 0, 28, 28
srwi r3, r2, 3
instead of this:
rlwinm r2, r3, 0, 28, 28
srwi r2, r2, 3
rlwinm r3, r2, 0, 31, 31
I'll leave it to Nate to get it down to one instruction. :)
---------------------------------------------------------------------
llvm-svn: 21391
2005-04-21 06:28:15 +00:00
Chris Lattner
d0a2fda2c6
Fold (x & 8) != 0 and (x & 8) == 8 into (x & 8) >> 3.
...
This turns this PPC code:
rlwinm r2, r3, 0, 28, 28
cmpwi cr7, r2, 8
mfcr r2
rlwinm r3, r2, 31, 31, 31
into this:
rlwinm r2, r3, 0, 28, 28
srwi r2, r2, 3
rlwinm r3, r2, 0, 31, 31
Next up, nuking the extra and.
llvm-svn: 21390
2005-04-21 06:12:41 +00:00
Chris Lattner
188ecaab1d
Fold setcc of MVT::i1 operands into logical operations
...
llvm-svn: 21319
2005-04-18 04:48:12 +00:00
Chris Lattner
72aca1b758
Another minor simplification: handle setcc (zero_extend x), c -> setcc(x, c')
...
llvm-svn: 21318
2005-04-18 04:30:45 +00:00
Chris Lattner
e6117e5d4f
Another simple xform
...
llvm-svn: 21317
2005-04-18 04:11:19 +00:00
Chris Lattner
f6f5b23a00
Fold:
...
// (X != 0) | (Y != 0) -> (X|Y != 0)
// (X == 0) & (Y == 0) -> (X|Y == 0)
Compiling this:
int %bar(int %a, int %b) {
entry:
%tmp.1 = setne int %a, 0
%tmp.2 = setne int %b, 0
%tmp.3 = or bool %tmp.1, %tmp.2
%retval = cast bool %tmp.3 to int
ret int %retval
}
to this:
_bar:
or r2, r3, r4
addic r3, r2, -1
subfe r3, r3, r2
blr
instead of:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r3, r2, r3
blr
llvm-svn: 21316
2005-04-18 03:59:53 +00:00
Chris Lattner
a32c50520c
Make the AND elimination operation recursive and significantly more powerful,
...
eliminating an and for Nate's testcase:
int %bar(int %a, int %b) {
entry:
%tmp.1 = setne int %a, 0
%tmp.2 = setne int %b, 0
%tmp.3 = or bool %tmp.1, %tmp.2
%retval = cast bool %tmp.3 to int
ret int %retval
}
generating:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r3, r2, r3
blr
instead of:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r2, r2, r3
rlwinm r3, r2, 0, 31, 31
blr
llvm-svn: 21315
2005-04-18 03:48:41 +00:00
Nate Begeman
ce63e383b8
Add a couple missing transforms in getSetCC that were triggering assertions
...
in the PPC Pattern ISel
llvm-svn: 21297
2005-04-14 08:56:52 +00:00
Nate Begeman
20b3399465
Disbale the broken fold of shift + sz[ext] for now
...
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel
Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc
always produces zero or one.
llvm-svn: 21291
2005-04-13 21:23:31 +00:00
Chris Lattner
89f7e115a4
fix an infinite loop
...
llvm-svn: 21289
2005-04-13 20:06:29 +00:00
Chris Lattner
475fe85ddf
fix some serious miscompiles on ia64, alpha, and ppc
...
llvm-svn: 21288
2005-04-13 19:53:40 +00:00
Chris Lattner
03d675414e
avoid work when possible, perhaps fix the problem nate and andrew are seeing
...
with != 0 comparisons vanishing.
llvm-svn: 21287
2005-04-13 19:41:05 +00:00
Chris Lattner
9540cf8c7e
Implement expansion of unsigned i64 -> FP.
...
Note that this probably only works for little endian targets, but is enough
to get siod working :)
llvm-svn: 21280
2005-04-13 05:09:42 +00:00
Chris Lattner
1a6247ff51
Make expansion of uint->fp cast assert out instead of infinitely recurse.
...
llvm-svn: 21275
2005-04-13 03:42:14 +00:00
Chris Lattner
63450e87d9
add back the optimization that Nate added for shl X, (zext_inreg y)
...
llvm-svn: 21273
2005-04-13 02:58:13 +00:00
Chris Lattner
759afe07d7
Oops, remove these too.
...
llvm-svn: 21272
2005-04-13 02:47:57 +00:00
Chris Lattner
4f188f949c
Instead of making ZERO_EXTEND_INREG nodes, use the helper method in
...
SelectionDAG to do the job with AND. Don't legalize Z_E_I anymore as
it is gone
llvm-svn: 21266
2005-04-13 02:38:47 +00:00
Chris Lattner
bce0030a88
Remove all foldings of ZERO_EXTEND_INREG, moving them to work for AND nodes
...
instead. OVerall, this increases the amount of folding we can do.
llvm-svn: 21265
2005-04-13 02:38:18 +00:00
Nate Begeman
38d8248a9e
Fold shift x, [sz]ext(y) -> shift x, y
...
llvm-svn: 21262
2005-04-12 23:32:28 +00:00
Nate Begeman
a56527ea5f
Fold shift by size larger than type size to undef
...
Make llvm undef values generate ISD::UNDEF nodes
llvm-svn: 21261
2005-04-12 23:12:17 +00:00
Chris Lattner
58f72ab722
promote extload i1 -> extload i8
...
llvm-svn: 21258
2005-04-12 20:30:10 +00:00
Chris Lattner
cfc7093ca6
Remove some redundant checks, add a couple of new ones. This allows us to
...
compile this:
int foo (unsigned long a, unsigned long long g) {
return a >= g;
}
To:
foo:
movl 8(%esp), %eax
cmpl %eax, 4(%esp)
setae %al
cmpl $0, 12(%esp)
sete %cl
andb %al, %cl
movzbl %cl, %eax
ret
instead of:
foo:
movl 8(%esp), %eax
cmpl %eax, 4(%esp)
setae %al
movzbw %al, %cx
movl 12(%esp), %edx
cmpl $0, %edx
sete %al
movzbw %al, %ax
cmpl $0, %edx
cmove %cx, %ax
movzbl %al, %eax
ret
llvm-svn: 21244
2005-04-12 02:54:39 +00:00
Chris Lattner
61f353dbdc
Emit comparisons against the sign bit better. Codegen this:
...
bool %test1(long %X) {
%A = setlt long %X, 0
ret bool %A
}
like this:
test1:
cmpl $0, 8(%esp)
setl %al
movzbl %al, %eax
ret
instead of:
test1:
movl 8(%esp), %ecx
cmpl $0, %ecx
setl %al
movzbw %al, %ax
cmpl $0, 4(%esp)
setb %dl
movzbw %dl, %dx
cmpl $0, %ecx
cmove %dx, %ax
movzbl %al, %eax
ret
llvm-svn: 21243
2005-04-12 02:19:10 +00:00
Chris Lattner
6cbbb55967
Emit long comparison against -1 better. Instead of this (x86):
...
test2:
movl 8(%esp), %eax
notl %eax
movl 4(%esp), %ecx
notl %ecx
orl %eax, %ecx
cmpl $0, %ecx
sete %al
movzbl %al, %eax
ret
or this (PPC):
_test2:
nor r2, r4, r4
nor r3, r3, r3
or r2, r2, r3
cntlzw r2, r2
srwi r3, r2, 5
blr
Emit this:
test2:
movl 8(%esp), %eax
andl 4(%esp), %eax
cmpl $-1, %eax
sete %al
movzbl %al, %eax
ret
or this:
_test2:
.LBB_test2_0: ;
and r2, r4, r3
cmpwi cr0, r2, -1
li r3, 1
li r2, 0
beq .LBB_test2_2 ;
.LBB_test2_1: ;
or r3, r2, r2
.LBB_test2_2: ;
blr
it seems like the PPC isel could do better for R32 == -1 case.
llvm-svn: 21242
2005-04-12 01:46:05 +00:00
Chris Lattner
37534d43d0
canonicalize x <u 1 -> x == 0. On this testcase:
...
unsigned long long g;
unsigned long foo (unsigned long a) {
return (a >= g) ? 1 : 0;
}
It changes the ppc code from:
_foo:
.LBB_foo_0: ; entry
mflr r11
stw r11, 8(r1)
bl "L00000$pb"
"L00000$pb":
mflr r2
addis r2, r2, ha16(L_g$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_g$non_lazy_ptr-"L00000$pb")(r2)
lwz r4, 0(r2)
lwz r2, 4(r2)
cmplw cr0, r3, r2
li r2, 1
li r3, 0
bge .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
or r2, r3, r3
.LBB_foo_2: ; entry
cmplwi cr0, r4, 1
li r3, 1
li r5, 0
blt .LBB_foo_4 ; entry
.LBB_foo_3: ; entry
or r3, r5, r5
.LBB_foo_4: ; entry
cmpwi cr0, r4, 0
beq .LBB_foo_6 ; entry
.LBB_foo_5: ; entry
or r2, r3, r3
.LBB_foo_6: ; entry
rlwinm r3, r2, 0, 31, 31
lwz r11, 8(r1)
mtlr r11
blr
to:
_foo:
.LBB_foo_0: ; entry
mflr r11
stw r11, 8(r1)
bl "L00000$pb"
"L00000$pb":
mflr r2
addis r2, r2, ha16(L_g$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_g$non_lazy_ptr-"L00000$pb")(r2)
lwz r4, 0(r2)
lwz r2, 4(r2)
cmplw cr0, r3, r2
li r2, 1
li r3, 0
bge .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
or r2, r3, r3
.LBB_foo_2: ; entry
cntlzw r3, r4
srwi r3, r3, 5
cmpwi cr0, r4, 0
beq .LBB_foo_4 ; entry
.LBB_foo_3: ; entry
or r2, r3, r3
.LBB_foo_4: ; entry
rlwinm r3, r2, 0, 31, 31
lwz r11, 8(r1)
mtlr r11
blr
llvm-svn: 21241
2005-04-12 00:28:49 +00:00
Chris Lattner
7f0f0854fa
Teach the dag mechanism that this:
...
long long test2(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) + B;
}
is equivalent to this:
long long test1(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) | B;
}
Now they are both codegen'd to this on ppc:
_test2:
blr
or this on x86:
test2:
movl 4(%esp), %edx
movl 8(%esp), %eax
ret
llvm-svn: 21231
2005-04-11 20:29:59 +00:00
Chris Lattner
71f3d4ce57
Fix expansion of shifts by exactly NVT bits on arch's (like X86) that have
...
masking shifts.
This fixes the miscompilation of this:
long long test1(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) | B;
}
into this:
test1:
movl 4(%esp), %edx
movl %edx, %eax
orl 8(%esp), %eax
ret
allowing us to generate this instead:
test1:
movl 4(%esp), %edx
movl 8(%esp), %eax
ret
llvm-svn: 21230
2005-04-11 20:08:52 +00:00
Nate Begeman
32163963cb
Fix libcall code to not pass a NULL Chain to LowerCallTo
...
Fix libcall code to not crash or assert looking for an ADJCALLSTACKUP node
when it is known that there is no ADJCALLSTACKDOWN to match.
Expand i64 multiply when ISD::MULHU is legal for the target.
llvm-svn: 21214
2005-04-11 03:01:51 +00:00
Chris Lattner
4f26677dc9
Don't bother sign/zext_inreg'ing the result of an and operation if we know
...
the result does change as a result of the extend.
This improves codegen for Alpha on this testcase:
int %a(ushort* %i) {
%tmp.1 = load ushort* %i
%tmp.2 = cast ushort %tmp.1 to int
%tmp.4 = and int %tmp.2, 1
ret int %tmp.4
}
Generating:
a:
ldgp $29, 0($27)
ldwu $0,0($16)
and $0,1,$0
ret $31,($26),1
instead of:
a:
ldgp $29, 0($27)
ldwu $0,0($16)
and $0,1,$0
addl $0,0,$0
ret $31,($26),1
btw, alpha really should switch to livein/outs for args :)
llvm-svn: 21213
2005-04-10 23:37:16 +00:00
Chris Lattner
c730ea00e2
Teach legalize to deal with targets that don't support some SEXTLOAD/ZEXTLOADs
...
llvm-svn: 21212
2005-04-10 22:54:25 +00:00
Chris Lattner
1b9e1e26cb
don't zextload fp values!
...
llvm-svn: 21209
2005-04-10 17:40:35 +00:00
Chris Lattner
0c089eae41
Until we have a dag combiner, promote using zextload's instead of extloads.
...
This gives the optimizer a bit of information about the top-part of the
value.
llvm-svn: 21205
2005-04-10 04:33:47 +00:00
Chris Lattner
9d13d0b958
Fold zext_inreg(zextload), likewise for sext's
...
llvm-svn: 21204
2005-04-10 04:33:08 +00:00
Chris Lattner
9c8fe594e5
add a simple xform
...
llvm-svn: 21203
2005-04-10 04:04:49 +00:00
Chris Lattner
b3518a838c
Fix a thinko. If the operand is promoted, pass the promoted value into
...
the new zero extend, not the original operand. This fixes cast bool -> long
on ppc.
Add an unrelated fixme
llvm-svn: 21196
2005-04-10 01:13:15 +00:00
Chris Lattner
034716de24
add a little peephole optimization. This allows us to codegen:
...
int a(short i) {
return i & 1;
}
as
_a:
andi. r3, r3, 1
blr
instead of:
_a:
rlwinm r2, r3, 0, 16, 31
andi. r3, r2, 1
blr
on ppc. It should also help the other risc targets.
llvm-svn: 21189
2005-04-09 21:43:54 +00:00
Chris Lattner
77ab286605
there is no need to remove this instruction, linscan does it already as it
...
removes noop moves.
llvm-svn: 21183
2005-04-09 16:24:20 +00:00
Chris Lattner
f408e9a07b
Adjust live intervals to support a livein set
...
llvm-svn: 21182
2005-04-09 16:17:50 +00:00
Chris Lattner
1a9c8fc64a
Consider the livein/out set for a function, allowing targets to not have to
...
use ugly imp_def/imp_uses for arguments and return values.
llvm-svn: 21180
2005-04-09 15:23:25 +00:00
Chris Lattner
afa0001d54
recognize some patterns as fabs operations, so that fabs at the source level
...
is deconstructed then reconstructed here. This catches 19 fabs's in 177.mesa
9 in 168.wupwise, 5 in 171.swim, 3 in 172.mgrid, and 14 in 173.applu out of
specfp2000.
This allows the X86 code generator to make MUCH better code than before for
each of these and saves one instr on ppc.
This depends on the previous CFE patch to expose these correctly.
llvm-svn: 21171
2005-04-09 05:15:53 +00:00
Chris Lattner
8e6eafa8e1
Emit BRCONDTWOWAY when possible.
...
llvm-svn: 21167
2005-04-09 03:30:29 +00:00
Chris Lattner
55b73bda6c
Legalize BRCONDTWOWAY into a BRCOND/BR pair if a target doesn't support it.
...
llvm-svn: 21166
2005-04-09 03:30:19 +00:00
Chris Lattner
da902bdf1b
print and fold BRCONDTWOWAY correctly
...
llvm-svn: 21165
2005-04-09 03:27:28 +00:00
Chris Lattner
31170cd2ec
canonicalize a bunch of operations involving fneg
...
llvm-svn: 21160
2005-04-09 03:02:46 +00:00
Chris Lattner
9a56ef5693
If a target zero or sign extends the result of its setcc, allow folding of
...
this into sign/zero extension instructions later.
On PPC, for example, this testcase:
%G = external global sbyte
implementation
void %test(int %X, int %Y) {
%C = setlt int %X, %Y
%D = cast bool %C to sbyte
store sbyte %D, sbyte* %G
ret void
}
Now codegens to:
cmpw cr0, r3, r4
li r3, 1
li r4, 0
blt .LBB_test_2 ;
.LBB_test_1: ;
or r3, r4, r4
.LBB_test_2: ;
addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2)
stb r3, 0(r2)
instead of:
cmpw cr0, r3, r4
li r3, 1
li r4, 0
blt .LBB_test_2 ;
.LBB_test_1: ;
or r3, r4, r4
.LBB_test_2: ;
*** rlwinm r3, r3, 0, 31, 31
addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2)
stb r3, 0(r2)
llvm-svn: 21148
2005-04-07 19:43:53 +00:00
Chris Lattner
bbe0e9e9db
Remove somethign I had for testing
...
llvm-svn: 21144
2005-04-07 18:58:54 +00:00
Chris Lattner
ee836c7b32
This patch does two things. First, it canonicalizes 'X >= C' -> 'X > C-1'
...
(likewise for <= >=u >=u).
Second, it implements a special case hack to turn 'X gtu SINTMAX' -> 'X lt 0'
On powerpc, for example, this changes this:
lis r2, 32767
ori r2, r2, 65535
cmplw cr0, r3, r2
bgt .LBB_test_2
into:
cmpwi cr0, r3, 0
blt .LBB_test_2
llvm-svn: 21142
2005-04-07 18:14:58 +00:00
Chris Lattner
22bbc2351e
Fix a really scary bug that Nate found where we weren't deleting the right
...
elements auto of the autoCSE maps.
llvm-svn: 21128
2005-04-07 00:30:13 +00:00
Nate Begeman
7898fc8cc8
Teach ExpandShift how to handle shifts by a constant. This allows targets
...
like PowerPC to codegen long shifts in many fewer instructions.
llvm-svn: 21122
2005-04-06 21:13:14 +00:00
Nate Begeman
4457b4994c
Expand SREM and UREM for targets that claim not to have them, like PowerPC
...
llvm-svn: 21103
2005-04-06 00:23:54 +00:00
Nate Begeman
12af81407b
Add MULHU and MULHS nodes for the high part of an (un)signed 32x32=64b
...
multiply.
llvm-svn: 21102
2005-04-05 22:36:56 +00:00
Chris Lattner
f81edb57b6
Make sure to notice that explicit physregs are used in the function
...
llvm-svn: 21084
2005-04-04 21:35:34 +00:00
Nate Begeman
a8be5b976f
Handle expanding arguments to ISD::TRUNCATE. This happens on PowerPC when
...
you have something like i16 = truncate i64. This fixes Regression/C/casts
llvm-svn: 21073
2005-04-04 00:57:08 +00:00
Chris Lattner
a8bccb73cd
Fix sign_extend and zero_extend of promoted value types to expanded value
...
types. This occurs when casting short to long on PPC for example.
llvm-svn: 21072
2005-04-03 23:41:52 +00:00
Duraid Madina
3a10f491f0
add support for prefix/suffix strings to go around GlobalValue(s)
...
(which may or be function pointers) in the asmprinter. For the moment,
this changes nothing, except the IA64 backend which can use this to write:
data8.ua @fptr(blah__blah__mangled_function_name)
(by setting FunctionAddrPrefix/Suffix to "@fptr(" / ")")
llvm-svn: 21024
2005-04-02 12:21:51 +00:00
Chris Lattner
1a15f58a92
transform fabs/fabsf calls into FABS nodes.
...
llvm-svn: 21014
2005-04-02 05:26:53 +00:00
Chris Lattner
206a694a7b
Expand fabs into fneg
...
llvm-svn: 21013
2005-04-02 05:26:37 +00:00
Chris Lattner
fcf6ee0a8b
Turn -0.0 - X -> fneg
...
llvm-svn: 21011
2005-04-02 05:04:50 +00:00
Chris Lattner
8644181cd6
Several changes mixed up here. First when legalizing a DAG with pcmarker,
...
dont' regen the whole dag if unneccesary. Second, fix and ugly bug with
the _PARTS nodes that caused legalize to produce multiples of them.
Finally, implement initial support for FABS and FNEG. Currently FNEG is
the only one to be trusted though.
llvm-svn: 21009
2005-04-02 05:00:07 +00:00
Chris Lattner
c8f36868e6
print fneg/fabs
...
llvm-svn: 21008
2005-04-02 04:58:41 +00:00
Chris Lattner
8be5696874
fix some bugs in the implementation of SHL_PARTS and friends.
...
llvm-svn: 21004
2005-04-02 04:00:59 +00:00
Chris Lattner
964ab5d408
Turn expanded shift operations into (e.g.) SHL_PARTS if the target supports it.
...
llvm-svn: 21002
2005-04-02 03:38:53 +00:00
Chris Lattner
33ca1ce8e0
Print some new nodes
...
llvm-svn: 21001
2005-04-02 03:30:42 +00:00
Chris Lattner
20027c6b30
Fix a bug when inserting a libcall into a function with no other calls.
...
llvm-svn: 20999
2005-04-02 03:22:40 +00:00
Nate Begeman
893f5729ce
Fix a warning about an unhandled switch case
...
llvm-svn: 20994
2005-04-02 00:41:14 +00:00
Nate Begeman
4034852ba9
Add ISD::UNDEF node
...
Teach the SelectionDAG code how to expand and promote it
Have PPC32 LowerCallTo generate ISD::UNDEF for int arg regs used up by fp
arguments, but not shadowing their value. This allows us to do the right
thing with both fixed and vararg floating point arguments.
llvm-svn: 20988
2005-04-01 22:34:39 +00:00
Chris Lattner
c81870e4e6
print the machine CFG in the -print-machineinstrs dump
...
llvm-svn: 20976
2005-04-01 06:48:38 +00:00
Andrew Lenharth
7db3834ecf
PCMarker support for DAG and Alpha
...
llvm-svn: 20965
2005-03-31 21:24:06 +00:00
Chris Lattner
abb59a3c21
Instead of setting up the CFG edges at selectiondag construction time, set
...
them up after the code has been emitted. This allows targets to select one
mbb as multiple mbb's as needed.
llvm-svn: 20937
2005-03-30 01:10:47 +00:00
Chris Lattner
02a4d3bd9b
Fix a bug that andrew noticed where we do not correctly sign/zero extend
...
returned integer values all of the way to 64-bits (we only did it to 32-bits
leaving the top bits undefined). This causes problems for targets like alpha
whose ABI's define the top bits too.
llvm-svn: 20926
2005-03-29 19:09:56 +00:00
Chris Lattner
185e7e2c22
implement legalization of build_pair for nate
...
llvm-svn: 20901
2005-03-28 22:03:13 +00:00
Andrew Lenharth
c287cd1e4e
First step in adding pcmarker intrinsic. Second step (soon) is adding backend support.
...
llvm-svn: 20900
2005-03-28 20:05:49 +00:00
Nate Begeman
f821401825
Change interface to LowerCallTo to take a boolean isVarArg argument.
...
llvm-svn: 20842
2005-03-26 01:29:23 +00:00
Chris Lattner
c9a3ea81bf
Fix the missing symbols problem Bill was hitting. Patch contributed by
...
Bill Wendling!!
llvm-svn: 20649
2005-03-17 15:38:16 +00:00
Chris Lattner
4b688a1c70
This mega patch converts us from using Function::a{iterator|begin|end} to
...
using Function::arg_{iterator|begin|end}. Likewise Module::g* -> Module::global_*.
This patch is contributed by Gabor Greif, thanks!
llvm-svn: 20597
2005-03-15 04:54:21 +00:00
Chris Lattner
4422ffd421
I didn't mean to check this in. :(
...
llvm-svn: 20555
2005-03-10 20:59:51 +00:00
Chris Lattner
fa9e43b38c
Fix a bug where we would incorrectly do a sign ext instead of a zero ext
...
because we were checking the wrong thing. Thanks to andrew for pointing
this out!
llvm-svn: 20554
2005-03-10 20:55:51 +00:00
Chris Lattner
ea2e61b83a
Allow the live interval analysis pass to be a bit more aggressive about
...
numbering values in live ranges for physical registers.
The alpha backend currently generates code that looks like this:
vreg = preg
...
preg = vreg
use preg
...
preg = vreg
use preg
etc. Because vreg contains the value of preg coming in, each of the
copies back into preg contain that initial value as well.
In the case of the Alpha, this allows this testcase:
void "foo"(int %blah) {
store int 5, int *%MyVar
store int 12, int* %MyVar2
ret void
}
to compile to:
foo:
ldgp $29, 0($27)
ldiq $0,5
stl $0,MyVar
ldiq $0,12
stl $0,MyVar2
ret $31,($26),1
instead of:
foo:
ldgp $29, 0($27)
bis $29,$29,$0
ldiq $1,5
bis $0,$0,$29
stl $1,MyVar
ldiq $1,12
bis $0,$0,$29
stl $1,MyVar2
ret $31,($26),1
This does not seem to have any noticable effect on X86 code.
This fixes PR535.
llvm-svn: 20536
2005-03-09 23:05:19 +00:00
Chris Lattner
e0d0c64c8a
constant fold FP_ROUND_INREG, ZERO_EXTEND_INREG, and SIGN_EXTEND_INREG
...
This allows the alpha backend to compile:
bool %test(uint %P) {
%c = seteq uint %P, 0
ret bool %c
}
into:
test:
ldgp $29, 0($27)
ZAP $16,240,$0
CMPEQ $0,0,$0
AND $0,1,$0
ret $31,($26),1
instead of:
test:
ldgp $29, 0($27)
ZAP $16,240,$0
ldiq $1,0
ZAP $1,240,$1
CMPEQ $0,$1,$0
AND $0,1,$0
ret $31,($26),1
... and fixes PR534.
llvm-svn: 20534
2005-03-09 18:37:12 +00:00
Alkis Evlogimenos
422af394b6
Lower llvm.isunordered(a, b) into a != a | b != b.
...
llvm-svn: 20382
2005-03-01 02:07:58 +00:00
Chris Lattner
9ccfcab3db
Lower prefetch to a noop, patch contributed by Justin Wick!
...
llvm-svn: 20375
2005-02-28 19:27:23 +00:00
Chris Lattner
4ba91f5168
Fix a bug in the 'store fpimm, ptr' -> 'store intimm, ptr' handling code.
...
Changing 'op' here caused us to not enter the store into a map, causing
reemission of the code!! In practice, a simple loop like this:
no_exit: ; preds = %no_exit, %entry
%indvar = phi uint [ %indvar.next, %no_exit ], [ 0, %entry ] ; <uint> [#uses=3]
%tmp.4 = getelementptr "complex long double"* %P, uint %indvar, uint 0 ; <double*> [#uses=1]
store double 0.000000e+00, double* %tmp.4
%indvar.next = add uint %indvar, 1 ; <uint> [#uses=2]
%exitcond = seteq uint %indvar.next, %N ; <bool> [#uses=1]
br bool %exitcond, label %return, label %no_exit
was being code gen'd to:
.LBBtest_1: # no_exit
movl %edx, %esi
shll $4, %esi
movl $0, 4(%eax,%esi)
movl $0, (%eax,%esi)
incl %edx
movl $0, (%eax,%esi)
movl $0, 4(%eax,%esi)
cmpl %ecx, %edx
jne .LBBtest_1 # no_exit
Note that we are doing 4 32-bit stores instead of 2. Now we generate:
.LBBtest_1: # no_exit
movl %edx, %esi
incl %esi
shll $4, %edx
movl $0, (%eax,%edx)
movl $0, 4(%eax,%edx)
cmpl %ecx, %esi
movl %esi, %edx
jne .LBBtest_1 # no_exit
This is much happier, though it would be even better if the increment of ESI
was scheduled after the compare :-/
llvm-svn: 20265
2005-02-22 07:23:39 +00:00
Misha Brukman
381d248dc6
Fix compilation errors with VS 2005, patch by Aaron Gray.
...
llvm-svn: 20231
2005-02-17 21:39:27 +00:00
Chris Lattner
89105cec43
Don't rely on doubles comparing identical to each other, which doesn't work
...
for 0.0 and -0.0.
llvm-svn: 20230
2005-02-17 20:17:32 +00:00
Chris Lattner
0de03b45ab
Don't sink argument loads into loops or other bad places. This disables folding of argument loads with instructions that are not in the entry block.
...
llvm-svn: 20228
2005-02-17 19:40:32 +00:00
Chris Lattner
43b14db4d9
Print GEP offsets as signed values instead of unsigned values. On X86, this
...
prints:
getelementptr (int* %A, int -1)
as: "(A) - 4" instead of "(A) + 18446744073709551612", which makes the
assembler much happier.
This fixes test/Regression/CodeGen/X86/2005-02-14-IllegalAssembler.ll,
and Benchmarks/Prolangs-C/cdecl with LLC on X86.
llvm-svn: 20183
2005-02-14 21:40:26 +00:00
Chris Lattner
c808a143af
Fix a case where were incorrectly compiled cast from short to int on 64-bit
...
targets.
llvm-svn: 20030
2005-02-04 18:39:19 +00:00
Andrew Lenharth
d2d24eee40
fix constant pointer outputing on 64 bit machines
...
llvm-svn: 20026
2005-02-04 13:47:16 +00:00
Chris Lattner
c3f476e9c2
Fix yet another memset issue.
...
llvm-svn: 19986
2005-02-02 03:44:41 +00:00
Chris Lattner
9cf60e3459
Fix some bugs andrew noticed legalizing memset for alpha
...
llvm-svn: 19969
2005-02-01 18:38:28 +00:00
Chris Lattner
382abe80a0
Improve conformance with the Misha spelling benchmark suite
...
llvm-svn: 19930
2005-01-30 00:09:23 +00:00
Chris Lattner
8200976176
adjust to ilist changes.
...
llvm-svn: 19924
2005-01-29 18:41:25 +00:00
Chris Lattner
2755fb4171
Alpha doesn't have a native f32 extload instruction.
...
llvm-svn: 19880
2005-01-28 22:58:25 +00:00
Chris Lattner
da7b5277c1
implement legalization of truncates whose results and sources need to be
...
truncated, e.g. (truncate:i8 something:i16) on a 32 or 64-bit RISC.
llvm-svn: 19879
2005-01-28 22:52:50 +00:00
Chris Lattner
89cac82479
Get alpha working with memset/memcpy/memmove
...
llvm-svn: 19878
2005-01-28 22:29:18 +00:00
Chris Lattner
4134789c8f
CopyFromReg produces two values. Make sure that we remember that both are
...
legalized, and actually return the correct result when we legalize the chain first.
llvm-svn: 19866
2005-01-28 06:27:38 +00:00
Chris Lattner
849899e193
Silence optimized warnings.
...
llvm-svn: 19797
2005-01-23 23:19:44 +00:00
Chris Lattner
65fc8007cd
Simplify/speedup the PEI by not having to scan for uses of the callee saved
...
registers. This information is computed directly by the register allocator
now.
llvm-svn: 19795
2005-01-23 23:13:12 +00:00
Chris Lattner
556679b89d
Update physregsused info.
...
llvm-svn: 19793
2005-01-23 22:55:45 +00:00
Chris Lattner
cc22be2981
Update this pass to set PhysRegsUsed info in MachineFunction.
...
llvm-svn: 19792
2005-01-23 22:51:56 +00:00
Chris Lattner
964297fc32
Update these register allocators to set the PhysRegUsed info in MachineFunction.
...
llvm-svn: 19791
2005-01-23 22:45:13 +00:00
Chris Lattner
6a6d5cf9eb
Add support for the PhysRegsUsed array.
...
llvm-svn: 19789
2005-01-23 22:13:58 +00:00
Chris Lattner
c187b917f2
Speed this up a bit by making ModifiedRegs a vector<char> not vector<bool>
...
llvm-svn: 19787
2005-01-23 21:45:01 +00:00
Chris Lattner
b3a5fc3ec0
Adjust to changes in SelectionDAG interfaces
...
The first half of correct chain insertion for libcalls. This is not enough
to fix Fhourstones yet though.
llvm-svn: 19781
2005-01-23 04:42:50 +00:00
Chris Lattner
3165569ba9
Remove the 3 HACK HACK HACKs I put in before, fixing them properly with
...
the new TLI that is available.
Implement support for handling out of range shifts. This allows us to
compile this code (a 64-bit rotate):
unsigned long long f3(unsigned long long x) {
return (x << 32) | (x >> (64-32));
}
into this:
f3:
mov %EDX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%ESP + 8]
ret
GCC produces this:
$ gcc t.c -masm=intel -O3 -S -o - -fomit-frame-pointer
..
f3:
push %ebx
mov %ebx, DWORD PTR [%esp+12]
mov %ecx, DWORD PTR [%esp+8]
mov %eax, %ebx
mov %edx, %ecx
pop %ebx
ret
The Simple ISEL produces (eww gross):
f3:
sub %ESP, 4
mov DWORD PTR [%ESP], %ESI
mov %EDX, DWORD PTR [%ESP + 8]
mov %ECX, DWORD PTR [%ESP + 12]
mov %EAX, 0
mov %ESI, 0
or %EAX, %ECX
or %EDX, %ESI
mov %ESI, DWORD PTR [%ESP]
add %ESP, 4
ret
llvm-svn: 19780
2005-01-23 04:39:44 +00:00
Chris Lattner
4c997d281c
Adjust to changes in SelectionDAG interface.
...
llvm-svn: 19779
2005-01-23 04:36:26 +00:00
Chris Lattner
63ec3c402b
Get this to work for 64-bit systems.
...
llvm-svn: 19763
2005-01-22 23:04:37 +00:00
Chris Lattner
29d6389d78
Implicitly defined registers can clobber callee saved registers too!
...
This fixes the return-address-not-being-saved problem in the Alpha backend.
llvm-svn: 19741
2005-01-22 00:49:16 +00:00
Chris Lattner
97f35a7a07
More bugfixes for IA64 shifts.
...
llvm-svn: 19739
2005-01-22 00:33:03 +00:00
Chris Lattner
67deea9d05
Fix problems with non-x86 targets.
...
llvm-svn: 19738
2005-01-22 00:31:52 +00:00
Chris Lattner
42e239ed58
Add a nasty hack to fix Alpha/IA64 multiplies by a power of two.
...
llvm-svn: 19737
2005-01-22 00:20:42 +00:00
Chris Lattner
e724100870
Remove unneeded line.
...
llvm-svn: 19736
2005-01-21 23:43:12 +00:00
Chris Lattner
a974e215a5
test commit
...
llvm-svn: 19735
2005-01-21 23:38:56 +00:00
Chris Lattner
392ddf430b
Unary token factor nodes are unneeded.
...
llvm-svn: 19727
2005-01-21 18:01:22 +00:00
Chris Lattner
07c35617d5
Refactor libcall code a bit. Initial implementation of expanding int -> FP
...
operations for 64-bit integers.
llvm-svn: 19724
2005-01-21 06:05:23 +00:00
Chris Lattner
6258ec2e1d
Simplify the shift-expansion code.
...
llvm-svn: 19721
2005-01-20 20:29:23 +00:00
Chris Lattner
c95c7c90c9
Expand add/sub into ADD_PARTS/SUB_PARTS instead of a non-existant libcall.
...
llvm-svn: 19715
2005-01-20 18:52:28 +00:00
Chris Lattner
4086a7a803
implement add_parts/sub_parts.
...
llvm-svn: 19714
2005-01-20 18:50:55 +00:00
Chris Lattner
e7ce5d0e4c
Add missing entry.
...
llvm-svn: 19712
2005-01-20 17:32:28 +00:00
Chris Lattner
e5212a16a2
Support targets that do not use i8 shift amounts.
...
llvm-svn: 19707
2005-01-19 22:31:21 +00:00
Chris Lattner
0e7435bc5b
Add an assertion that would have made more sense to duraid
...
llvm-svn: 19704
2005-01-19 21:32:07 +00:00
Chris Lattner
c662697319
Add support for targets that pass args in registers to calls.
...
llvm-svn: 19703
2005-01-19 20:24:35 +00:00
Chris Lattner
277ac2be70
Fold single use token factor nodes into other token factor nodes.
...
llvm-svn: 19701
2005-01-19 19:10:54 +00:00
Chris Lattner
85e0771f79
Realize the individual pieces of an expanded copytoreg/store/load are
...
independent of each other.
llvm-svn: 19700
2005-01-19 18:02:17 +00:00
Chris Lattner
027c97e93e
Know some identities about tokenfactor nodes.
...
llvm-svn: 19699
2005-01-19 18:01:40 +00:00
Chris Lattner
7114e8a527
Know some simple identities. This improves codegen for (1LL << N).
...
llvm-svn: 19698
2005-01-19 17:29:49 +00:00
Chris Lattner
e97ed92617
Just in case, handle something that is both a use and a def.
...
llvm-svn: 19696
2005-01-19 17:11:51 +00:00
Chris Lattner
2cb11bd2b9
When an instruction moves, make sure to update the VarInfo::Kills list as
...
well as all of teh other stuff in livevar. This fixes the compiler crash
on fourinarow last night.
llvm-svn: 19695
2005-01-19 17:09:15 +00:00
Chris Lattner
408325ffdf
Use the TargetInstrInfo::commuteInstruction method to commute instructions
...
instead of doing it manually.
llvm-svn: 19685
2005-01-19 07:08:42 +00:00
Chris Lattner
743a36c818
Implement a way of expanding shifts. This applies to targets that offer
...
select operations or to shifts that are by a constant. This automatically
implements (with no special code) all of the special cases for shift by 32,
shift by < 32 and shift by > 32.
llvm-svn: 19679
2005-01-19 04:19:40 +00:00
Chris Lattner
0df1935505
Zero is cheaper than sign extend.
...
llvm-svn: 19675
2005-01-18 21:57:59 +00:00