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Commit Graph

8136 Commits

Author SHA1 Message Date
Jeffrey Yasskin
23ac706aab Fix DenseMap iterator constness.
This patch forbids implicit conversion of DenseMap::const_iterator to
DenseMap::iterator which was possible because DenseMapIterator inherited
(publicly) from DenseMapConstIterator. Conversion the other way around is now
allowed as one may expect.

The template DenseMapConstIterator is removed and the template parameter
IsConst which specifies whether the iterator is constant is added to
DenseMapIterator.

Actually IsConst parameter is not necessary since the constness can be
determined from KeyT but this is not relevant to the fix and can be addressed
later.

Patch by Victor Zverovich!

llvm-svn: 86636
2009-11-10 01:02:17 +00:00
David Goodwin
93a4f29c67 Fixed to address code review. No functional changes.
llvm-svn: 86634
2009-11-10 00:48:55 +00:00
David Goodwin
538f9c25f8 Allow targets to specify register classes whose member registers should not be renamed to break anti-dependencies.
llvm-svn: 86628
2009-11-10 00:15:47 +00:00
Dan Gohman
9885f20a6d Remove an unneeded #include.
llvm-svn: 86601
2009-11-09 22:28:30 +00:00
Mike Stump
c2b669b3b2 Fix for 64-bit builds.
llvm-svn: 86600
2009-11-09 22:28:21 +00:00
Dan Gohman
c64e578e5a Print "..." instead of all the uninteresting register clobbers on call
instructions. This makes CodeGen dumps significantly less noisy.

Example before:
  BL <ga:@bar>, %R0<imp-def>, %R1<imp-def,dead>, %R2<imp-def,dead>, %R3<imp-def,dead>, %R12<imp-def,dead>, %LR<imp-def,dead>, %D0<imp-def,dead>, %D1<imp-def,dead>, %D2<imp-def,dead>, %D3<imp-def,dead>, %D4<imp-def,dead>, %D5<imp-def,dead>, %D6<imp-def,dead>, %D7<imp-def,dead>, %D16<imp-def,dead>, %D17<imp-def,dead>, %D18<imp-def,dead>, %D19<imp-def,dead>, %D20<imp-def,dead>, %D21<imp-def,dead>, %D22<imp-def,dead>, %D23<imp-def,dead>, %D24<imp-def,dead>, %D25<imp-def,dead>, %D26<imp-def,dead>, %D27<imp-def,dead>, %D28<imp-def,dead>, %D29<imp-def,dead>, %D30<imp-def,dead>, %D31<imp-def,dead>, %CPSR<imp-def,dead>, %FPSCR<imp-def,dead>

Same example after:
  BL <ga:@bar>, %R0<imp-def>, %R1<imp-def,dead>, %LR<imp-def,dead>, %CPSR<imp-def,dead>, ...

llvm-svn: 86583
2009-11-09 19:38:45 +00:00
David Goodwin
2c17fdab6d Fix dependencies added to model memory aliasing for post-RA scheduling. The dependencies were overly conservative for memory access that are known not to alias.
llvm-svn: 86580
2009-11-09 19:22:17 +00:00
Dan Gohman
8ef26198d2 Constify MachineFunctionAnalysis' TargetMachine reference.
llvm-svn: 86564
2009-11-09 18:18:49 +00:00
Evan Cheng
e3acd9adb5 Hide a couple of options.
llvm-svn: 86522
2009-11-09 06:49:37 +00:00
Evan Cheng
4cd6cb4137 80 col.
llvm-svn: 86521
2009-11-09 06:49:22 +00:00
Lang Hames
3126c532b2 Moved some ManagedStatics out of the SlotIndexes header.
llvm-svn: 86446
2009-11-08 08:49:59 +00:00
Anton Korobeynikov
0a13189111 Add 8 bit libcalls and make use of them for msp430
llvm-svn: 86384
2009-11-07 17:14:39 +00:00
Chris Lattner
d5eaa6d39b Fix PR5421 by APInt'izing switch lowering.
llvm-svn: 86354
2009-11-07 07:50:34 +00:00
Lang Hames
b5bff25ba7 Update some globals to use ManagedStatic.
llvm-svn: 86342
2009-11-07 05:50:28 +00:00
Mon P Wang
ea09038f22 Fix memoizing of CvtRndSatSDNode
llvm-svn: 86340
2009-11-07 04:46:25 +00:00
Evan Cheng
8eaaffb9da - Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdentical
except it doesn't care if the definitions' virtual registers differ. This is
  used by machine LICM and other MI passes to perform CSE.
- Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical.
  Since pc relative constantpool entries are always different, this requires it
  it check if the values can actually the same.

llvm-svn: 86328
2009-11-07 03:52:02 +00:00
Kenneth Uildriks
91ceaa85a2 Add code to check at SelectionDAGISel::LowerArguments time to see if return values can be lowered to registers. Coming soon, code to perform sret-demotion if return values cannot be lowered to registers
llvm-svn: 86324
2009-11-07 02:11:54 +00:00
Jakob Stoklund Olesen
df21edc554 Fix inverted conflict test in -early-coalesce.
A non-identity copy cannot be coalesced when the phi join destination register
is live at the copy site.

Also verify the condition that the PHI join source register is only used in
the PHI join. Otherwise the coalescing is invalid.

llvm-svn: 86322
2009-11-07 01:58:40 +00:00
Bob Wilson
d87afbc6e5 Fix comment typos.
llvm-svn: 86295
2009-11-06 22:38:38 +00:00
Dan Gohman
aadf548295 Use WriteAsOperand to print GlobalAddress MachineOperands. This
prints them with the leading '@'.

llvm-svn: 86261
2009-11-06 18:03:10 +00:00
Devang Patel
0d1f6a9d0e Do not bother to emit debug info for nameless global variable.
llvm-svn: 86259
2009-11-06 17:58:12 +00:00
Devang Patel
5035033346 Do not try to emit debug info entry for dead global variable.
llvm-svn: 86212
2009-11-06 01:30:04 +00:00
Dan Gohman
ada358e6a2 Factor out the printing of the leading tab into printInlineAsm.
llvm-svn: 86199
2009-11-06 00:04:54 +00:00
Dan Gohman
d159b46665 Fix the label name generation for address-taken labels to avoid potential
problems with name collisions.

llvm-svn: 86189
2009-11-05 23:14:35 +00:00
Lang Hames
3af601069a Added support for renumbering existing index list elements. Removed some junk from the initial numbering code in runOnMachineFunction.
llvm-svn: 86184
2009-11-05 22:20:57 +00:00
David Goodwin
8a18560a67 Fix bug in aggressive antidep breaking; liveness was not updated correctly for regions that do not have antidep candidates.
llvm-svn: 86172
2009-11-05 21:06:09 +00:00
Dan Gohman
e564d875c8 Avoid printing a redundant space in SDNode->dump().
llvm-svn: 86151
2009-11-05 18:49:11 +00:00
David Goodwin
66b5886123 Replace std::map.at() with std::map[].
llvm-svn: 86102
2009-11-05 01:45:50 +00:00
David Goodwin
5ddf009b51 Break anti-dependencies using free registers in a round-robin manner to avoid introducing new anti-dependencies.
llvm-svn: 86098
2009-11-05 01:19:35 +00:00
Evan Cheng
52dedf7dfe Now that code placement optimization pass is run for JIT, make sure it's before pre-emit passes.
llvm-svn: 86092
2009-11-05 01:16:59 +00:00
Evan Cheng
3a05d1d9bb Code refactoring.
llvm-svn: 86085
2009-11-05 00:51:13 +00:00
David Goodwin
442fe1bbf8 Correctly add chain dependencies around calls and unknown-side-effect instructions.
llvm-svn: 86080
2009-11-05 00:16:44 +00:00
Devang Patel
c69c29bc4b While calculating original type size for a derived type, handle type variants encoded as DIDerivedType appropriately.
This improves bitfield support.

llvm-svn: 86073
2009-11-04 23:48:00 +00:00
Devang Patel
799b8cc191 Fix DW_AT_data_member_location for bit-fields. It points to the location of annonymous field that covers respective field.
llvm-svn: 86054
2009-11-04 22:06:12 +00:00
Lang Hames
2b16464904 Handle empty/tombstone keys for LiveIndex more cleanly. Check for index sanity when constructing index list entries.
llvm-svn: 86049
2009-11-04 21:24:15 +00:00
Eric Christopher
f20f6980cb Add some options to disable various code gen optimizations.
llvm-svn: 86044
2009-11-04 19:57:50 +00:00
Devang Patel
773993746e Array element size does not match array size but array is not a bitfield.
llvm-svn: 86043
2009-11-04 19:37:40 +00:00
Jakob Stoklund Olesen
f775e222e0 Print out an informative comment for KILL instructions.
The KILL pseudo-instruction may survive to the asm printer pass, just like the IMPLICIT_DEF. Print the KILL as a comment instead of just leaving a blank line in the output.

With -asm-verbose=0, a blank line is printed, like IMPLICIT?DEF.

llvm-svn: 86041
2009-11-04 19:24:37 +00:00
Evan Cheng
801415706c RangeIsDefinedByCopyFromReg() should check for subreg_to_reg, insert_subreg,
and extract_subreg as a "copy" that defines a valno.
Also fixes a typo. These two issues prevent a simple subreg coalescing from
happening before.

llvm-svn: 86022
2009-11-04 08:33:14 +00:00
Douglas Gregor
4cd9c97c74 Fix CMake makefiles
llvm-svn: 85994
2009-11-04 01:32:06 +00:00
Lang Hames
deed780bc6 The Indexes Patch.
This introduces a new pass, SlotIndexes, which is responsible for numbering
instructions for register allocation (and other clients). SlotIndexes numbering
is designed to match the existing scheme, so this patch should not cause any
changes in the generated code.

For consistency, and to avoid naming confusion, LiveIndex has been renamed
SlotIndex.

The processImplicitDefs method of the LiveIntervals analysis has been moved
into its own pass so that it can be run prior to SlotIndexes. This was
necessary to match the existing numbering scheme.

llvm-svn: 85979
2009-11-03 23:52:08 +00:00
Bob Wilson
8209e942a6 Fix branch folding bug for indirect branches: for a block containing only
an unconditional branch (possibly from tail merging), this code is
trying to redirect all of its predecessors to go directly to the branch
target, but that isn't feasible for indirect branches.  The other
predecessors (that don't end with indirect branches) could theoretically
still be handled, but that is not easily done right now.

The AnalyzeBranch interface doesn't currently let us distinguish jump table
branches from indirect branches, and this code is currently handling
jump tables.  To avoid punting on address-taken blocks, we would have to give
up handling jump tables.  That seems like a bad tradeoff.

llvm-svn: 85975
2009-11-03 23:44:31 +00:00
Evan Cheng
d783406059 Re-apply 85799. It turns out my code isn't buggy.
llvm-svn: 85947
2009-11-03 21:40:02 +00:00
David Goodwin
629a685f05 Do a scheduling pass ignoring anti-dependencies to identify candidate registers that should be renamed.
llvm-svn: 85939
2009-11-03 20:57:50 +00:00
David Goodwin
9f1cf41932 <rdar://problem/7352605>. When building schedule graph use mayAlias information to avoid chaining loads/stores of spill slots with non-aliased memory ops.
llvm-svn: 85934
2009-11-03 20:15:00 +00:00
Devang Patel
7cb7017106 Ignore unnamed variables.
llvm-svn: 85909
2009-11-03 18:30:27 +00:00
Jeffrey Yasskin
bc6f9d7e70 Fix a funky "declared with greater visibility than the type of its field"
warning from gcc by removing VISIBILITY_HIDDEN attributes.  

llvm-svn: 85873
2009-11-03 06:29:36 +00:00
Evan Cheng
ca5847665b Revert 85799 for now. It might be breaking llvm-gcc driver.
llvm-svn: 85827
2009-11-02 21:49:14 +00:00
David Goodwin
0668ac893d Chain dependencies used to enforce memory order should have latency of 0 (except for true dependency of Store followed by aliased Load... we estimate that case with a single cycle of latency assuming the hardware will bypass)
llvm-svn: 85807
2009-11-02 17:06:28 +00:00
Evan Cheng
ec5cb0cdbd Initilize the machine LICM CSE map upon the first time an instruction is hoisted to
the loop preheader. Add instructions which are already in the preheader block that
may be common expressions of those that are hoisted out. These does get a few more
instructions CSE'ed.

llvm-svn: 85799
2009-11-02 08:09:49 +00:00