Jim Grosbach
267610ed2a
Thumb2 assembly parsing and encoding for RRX.
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llvm-svn: 139831
2011-09-15 19:52:43 +00:00
Jim Grosbach
ee202d43fe
Thumb2 assembly parsing and encoding for ROR.
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llvm-svn: 139830
2011-09-15 19:50:04 +00:00
Jim Grosbach
50ee930e9a
Thumb2 assembly parsing and encoding for REV16/REVSH.
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llvm-svn: 139828
2011-09-15 19:46:13 +00:00
Jim Grosbach
9d7aa9bcbc
Thumb2 assembly parsing and encoding for REV.
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llvm-svn: 139813
2011-09-15 18:13:30 +00:00
Jim Grosbach
7c1422b068
Thumb2 assembly parsing and encoding for RBIT.
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llvm-svn: 139811
2011-09-15 18:07:14 +00:00
Jim Grosbach
d6993cb54c
Thumb2 assembly parsing and encoding for signed saturating arithmetic insns.
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llvm-svn: 139810
2011-09-15 18:06:15 +00:00
Jim Grosbach
5742cbd63f
Re-order test.
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llvm-svn: 139795
2011-09-15 16:04:13 +00:00
Jim Grosbach
68de69f1c9
Thumb2 assembly parsing and encoding for PLI.
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llvm-svn: 139757
2011-09-14 23:29:05 +00:00
Jim Grosbach
4d7b859fab
Thumb2 assembly parsing and encoding for PLD.
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llvm-svn: 139756
2011-09-14 23:26:12 +00:00
Jim Grosbach
669e269758
Thumb2 assembly parsing and encoding for PKH.
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llvm-svn: 139754
2011-09-14 23:16:41 +00:00
Owen Anderson
86f1fb2955
Fix a crasher in Thumb2 MOV-immediate encoding for certain inputs.
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llvm-svn: 139747
2011-09-14 22:46:14 +00:00
Jim Grosbach
3908f7f2b7
Thumb2 assembly parsing and encoding for ORR.
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llvm-svn: 139742
2011-09-14 21:43:57 +00:00
Jim Grosbach
4d891badcb
Thumb2 assembly parsing and encoding for ORN.
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llvm-svn: 139741
2011-09-14 21:29:54 +00:00
Jim Grosbach
528142a13d
Thumb2 assembly parsing and encoding for NOP.W.
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llvm-svn: 139740
2011-09-14 21:26:25 +00:00
Jim Grosbach
e841adae12
Thumb2 assembly parsing and encoding for MVN.
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llvm-svn: 139739
2011-09-14 21:24:41 +00:00
Jim Grosbach
585e3c779f
Thumb2 assembly parsing and encoding for MUL.
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llvm-svn: 139735
2011-09-14 21:00:40 +00:00
Jim Grosbach
b1c70aab3e
Thumb2 assembly parsing and encoding for MSR/MRS.
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Fix a bug in handling default flags for both ARM and Thumb encodings.
llvm-svn: 139721
2011-09-14 20:03:46 +00:00
Jim Grosbach
e260140b99
Thumb2 assembly parsing and encoding for MRC/MRC2/MRRC/MRRC2.
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llvm-svn: 139717
2011-09-14 19:28:49 +00:00
Jim Grosbach
807e68b8db
Thumb2 assembly parsing and encoding for MOVT.
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llvm-svn: 139715
2011-09-14 19:15:15 +00:00
Jim Grosbach
932d409524
Thumb2 assembly parsing for MOV in IT block.
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Select the right 16 vs. 32 bit encoding in an IT block.
llvm-svn: 139714
2011-09-14 19:12:11 +00:00
Jim Grosbach
41c8bdfdd9
ARM fix assembly parser handling of ranges in register lists.
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Clean up register list handling in general a bit to explicitly check things
like all the registers being from the same register class.
rdar://8883573
llvm-svn: 139707
2011-09-14 18:08:35 +00:00
Craig Topper
60719c7bfb
Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND from being recognized by disassembler.
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llvm-svn: 139691
2011-09-14 06:41:26 +00:00
Craig Topper
25e81ae604
Make disassembling of VBLEND* print immediate as a XMM/YMM register name. Fixes PR10917.
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llvm-svn: 139690
2011-09-14 05:55:28 +00:00
Craig Topper
d707457c41
Add test case for PR10851.
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llvm-svn: 139689
2011-09-14 04:36:54 +00:00
Owen Anderson
1037a3e60b
Make use of Eli's FileCheck sorcery to improve this test.
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llvm-svn: 139645
2011-09-13 21:37:50 +00:00
Owen Anderson
d0121fe635
Correct disassembly printing of Thumb2 post-incremented LDRD and STRD.
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llvm-svn: 139639
2011-09-13 20:46:26 +00:00
Owen Anderson
b4ed08c465
Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is always executed unconditionally.
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llvm-svn: 139610
2011-09-13 17:59:19 +00:00
Owen Anderson
5982d4d51b
Fix encoding of Thumb2 shifted register operands with RRX shifts.
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llvm-svn: 139606
2011-09-13 17:34:32 +00:00
Craig Topper
03c833ff84
Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from being disassembled. Also added encodings for the other register/register form of these instructions. Fixes PR10848.
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llvm-svn: 139588
2011-09-13 06:54:58 +00:00
Owen Anderson
ebcf543265
Fix a failing ELF Thumb test. I _think_ this is right, but it's not totally clear to me what this test is doing. Could someone on an ELF platform check?
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llvm-svn: 139549
2011-09-12 22:40:31 +00:00
Owen Anderson
a1a10ed5c6
Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP either.
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llvm-svn: 139542
2011-09-12 21:28:46 +00:00
Owen Anderson
0081444d87
Fix encoding of PC-relative LDRSHW with an immediate offset.
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llvm-svn: 139537
2011-09-12 20:36:51 +00:00
Owen Anderson
05ef2c122d
Port more encoding tests to decoding tests, and correct an improper Thumb2 pre-indexed load decoding this uncovered.
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llvm-svn: 139522
2011-09-12 18:56:30 +00:00
Craig Topper
5ffd0cb080
Fix disassembling of one of the register/register forms of MOVUPS/MOVUPD/MOVAPS/MOVAPD/MOVSS/MOVSD and their VEX equivalents. Fixes PR10877.
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llvm-svn: 139486
2011-09-11 23:19:54 +00:00
Craig Topper
a9b27eecc9
Fix disassembling of reverse register/register forms of ADD/SUB/XOR/OR/AND/SBB/ADC/CMP/MOV.
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llvm-svn: 139485
2011-09-11 21:41:45 +00:00
Craig Topper
8361de67b5
Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP disassembling to ignore OpSize and REX.W.
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llvm-svn: 139484
2011-09-11 20:23:20 +00:00
Jim Grosbach
52492b1cf3
Thumb2 parsing and encoding for MOV(immediate).
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Some aliases for MOV(register) also to keep existing T1 tests happy when
run in thumbv7 mode.
llvm-svn: 139440
2011-09-10 00:15:36 +00:00
Owen Anderson
9cd21ce8c9
LDM writeback is not allowed if Rn is in the target register list.
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llvm-svn: 139432
2011-09-09 23:13:33 +00:00
Owen Anderson
dbe77fc5a1
Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands.
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llvm-svn: 139422
2011-09-09 22:24:36 +00:00
Owen Anderson
a7838cb723
Thumb unconditional branches are allowed in IT blocks, and therefore should have a predicate operand, unlike conditional branches.
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llvm-svn: 139415
2011-09-09 21:48:23 +00:00
Jim Grosbach
6225a96bf5
Thumb2 assembly parsing and encoding for MLA and MLS.
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llvm-svn: 139399
2011-09-09 20:24:45 +00:00
Jim Grosbach
5f87c06a64
Thumb2 assembly parsing and encoding for MCR, MCR2, MCRR, MCRR2.
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llvm-svn: 139397
2011-09-09 20:19:28 +00:00
Jim Grosbach
f310295150
Tidy up formatting a bit.
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llvm-svn: 139396
2011-09-09 20:17:49 +00:00
Jim Grosbach
f7d8e569b3
Thumb2 assembly parsing and encoding for LSL.
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llvm-svn: 139395
2011-09-09 20:05:38 +00:00
Jim Grosbach
69e67f206d
Thumb2 assembly parsing and encoding for LDRT.
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llvm-svn: 139393
2011-09-09 20:02:15 +00:00
Jim Grosbach
abd54fb32c
Thumb2 assembly parsing and encoding for LDRSHT.
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llvm-svn: 139392
2011-09-09 20:01:18 +00:00
Jim Grosbach
c6aa5be010
Thumb2 assembly parsing and encoding for LDRSH.
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llvm-svn: 139391
2011-09-09 19:54:30 +00:00
Jim Grosbach
022da868a5
Thumb2 assembly parsing and encoding for LDRSBT.
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llvm-svn: 139390
2011-09-09 19:49:06 +00:00
Jim Grosbach
915ba5189e
Thumb2 assembly parsing and encoding for LDRSB.
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llvm-svn: 139389
2011-09-09 19:42:40 +00:00
Jim Grosbach
6faf547463
Thumb2 assembly parsing and encoding for LDRH.
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llvm-svn: 139386
2011-09-09 19:13:53 +00:00