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Commit Graph

6 Commits

Author SHA1 Message Date
Chris Lattner
92e5f0a118 remove a dead proto
llvm-svn: 29505
2006-08-03 18:51:04 +00:00
Evan Cheng
7ec94f2ff7 Added getTargetLowering() to TargetMachine. Refactored targets to support this.
llvm-svn: 26742
2006-03-13 23:20:37 +00:00
Duraid Madina
7d51a9b8e3 add bundling! well not really, for now it's just stop-insertion.
llvm-svn: 25593
2006-01-25 02:23:38 +00:00
Duraid Madina
251185e626 DAG->DAG instruction selection for ia64! "hello world" works, not much else.
use -enable-ia64-dag-isel to turn this on

TODO: delete lowering stuff from the pattern isel
    : get operations on predicate bits working
    : get other bits of pseudocode going
    : use sampo's mulh/mull-using divide-by-constant magic
    : *so* many patterns ("extr", "tbit" and "dep" will be fun :)
    : add FP
    : add a JIT!
    : get it working 100%

in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.

OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.

llvm-svn: 24058
2005-10-28 17:46:35 +00:00
Misha Brukman
1fdf39f2ea Remove trailing whitespace
llvm-svn: 21424
2005-04-21 23:13:11 +00:00
Duraid Madina
79022e1b87 and so it begins...
PHASE 1: write instruction selector
PHASE 2: ???
PHASE 3: profit!

llvm-svn: 20652
2005-03-17 18:17:03 +00:00