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Commit Graph

16236 Commits

Author SHA1 Message Date
Dan Gohman
a487e2b57e Fix replacing all the users of objc weak runtime routines
when deleting them. rdar://11434915.

llvm-svn: 157080
2012-05-18 22:17:29 +00:00
Nuno Lopes
4b9a5ae769 allow LazyValueInfo::getEdgeValue() to reason about multiple edges from the same switch instruction by doing union of ranges (which may still be conservative, but it's more aggressive than before)
llvm-svn: 157071
2012-05-18 21:02:10 +00:00
Jim Grosbach
343a996ca5 Refactor data-in-code annotations.
Use a dedicated MachO load command to annotate data-in-code regions.
This is the same format the linker produces for final executable images,
allowing consistency of representation and use of introspection tools
for both object and executable files.

Data-in-code regions are annotated via ".data_region"/".end_data_region"
directive pairs, with an optional region type.

data_region_directive := ".data_region" { region_type }
region_type := "jt8" | "jt16" | "jt32" | "jta32"
end_data_region_directive := ".end_data_region"

The previous handling of ARM-style "$d.*" labels was broken and has
been removed. Specifically, it didn't handle ARM vs. Thumb mode when
marking the end of the section.

rdar://11459456

llvm-svn: 157062
2012-05-18 19:12:01 +00:00
Nuno Lopes
4af12ec75d add test case for bugfix in r157032
llvm-svn: 157058
2012-05-18 17:44:58 +00:00
Eric Christopher
9308072a49 Add support for the mips 'x' inline asm modifier.
Patch by Jack Carter.

llvm-svn: 157057
2012-05-18 17:39:35 +00:00
Joel Jones
f99b58276c FileCheck-ify, apropos of nothing
llvm-svn: 157051
2012-05-18 16:24:01 +00:00
Craig Topper
d86e4c0088 Simplify handling of v16i8 shuffles and fix a missed optimization.
llvm-svn: 157043
2012-05-18 06:42:06 +00:00
Evan Cheng
6ffd037105 Teach two-address pass to update the "source" map so it doesn't perform a
non-profitable commute using outdated info. The test case would still fail
because of poor pre-RA schedule. That will be fixed by MI scheduler.

rdar://11472010

llvm-svn: 157038
2012-05-18 01:33:51 +00:00
Danil Malyshev
0d982140e7 Temporarily disabled the MCJIT tests for Darwin, because the RuntimeDyldMachO has a problems with relocations for 32bit x86.
llvm-svn: 157035
2012-05-18 00:30:58 +00:00
Kevin Enderby
ef39671f98 Fixed a bug in llvm-objdump when disassembling using -macho option for a binary
containing no symbols.  Fixed the crash and fixed it not disassembling anything.

llvm-svn: 157031
2012-05-18 00:13:56 +00:00
Jakob Stoklund Olesen
f6cadaaf06 Remove a test that was only testing for physreg joining.
This is the same as the other tests: Clever tricks are required to make
the arguments and return value line up in a single-instruction function.
It rarely happens in real life.

We have plenty other examples of this behavior.

llvm-svn: 157030
2012-05-18 00:07:14 +00:00
Jakob Stoklund Olesen
b3487aa334 Remove -join-physregs from the test suite.
This option has been disabled for a while, and it is going away so I can
clean up the coalescer code.

The tests that required physreg joining to be enabled were almost all of
the form "tiny function with interference between arguments and return
value". Such functions are usually inlined in the real world.

The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly
rare.

llvm-svn: 157027
2012-05-17 23:44:19 +00:00
Kevin Enderby
9747fd81e3 Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missing
the 0b10 mask encoding bits.  Make MSR APSR writes without a _<bits> qualifier
an alias for MSR APSR_nzcvq even though ARM as deprecated it use.  Also add
support for suffixes (_nzcvq, _g, _nzcvqg) for APSR versions.  Some FIXMEs in
the code for better error checking when versions shouldn't be used.
rdar://11457025

llvm-svn: 157019
2012-05-17 22:18:01 +00:00
Danil Malyshev
dade6759c4 - Added ExecutionEngine/MCJIT tests
- Added HOST_ARCH to Makefile.config.in
The HOST_ARCH will be used by MCJIT tests filter, because MCJIT supported only x86 and ARM architectures now.

llvm-svn: 157015
2012-05-17 21:07:47 +00:00
Tim Northover
fc7737e7dc Remove incorrect pattern for ARM SMML instruction.
Patch by Meador Inge.

llvm-svn: 156989
2012-05-17 13:12:13 +00:00
Chandler Carruth
6bc19df503 Teach the 'opt' tool about '-Os' and '-Oz', corresponding to the Clang
options, to enable easier testing of the innards of LLVM that are
enabled by such optimization strategies.

Note that this doesn't provide the (much needed) function attribute
support for -Oz (as opposed to -Os), but still seems like a positive
step to better test the logic that Clang currently relies on.

Patch by Patrik Hägglund.

llvm-svn: 156913
2012-05-16 08:32:49 +00:00
Evan Cheng
9a33fc17be Avoid creating a cycle when folding load / op with flag / store. PR11451474. rdar://11451474
llvm-svn: 156896
2012-05-16 01:54:27 +00:00
Jakob Stoklund Olesen
1da786c936 Enable sub-sub-register copy coalescing.
It is now possible to coalesce weird skewed sub-register copies by
picking a super-register class larger than both original registers. The
included test case produces code like this:

  vld2.32 {d16, d17, d18, d19}, [r0]!
  vst2.32 {d18, d19, d20, d21}, [r0]

We still perform interference checking as if it were a normal full copy
join, so this is still quite conservative. In particular, the f1 and f2
functions in the included test case still have remaining copies because
of false interference.

llvm-svn: 156878
2012-05-15 23:31:35 +00:00
Kevin Enderby
8feefef6ff Add a test case for r156840, a fix to llvm-objdump when disassembling using
-macho to disassemble the last symbol to the end of the section.

llvm-svn: 156850
2012-05-15 20:20:50 +00:00
Sirish Pande
7081e43d5c Enable all Hexagon tests.
llvm-svn: 156824
2012-05-15 16:13:12 +00:00
David Majnemer
ea3e1ea334 Teach SimplifyLibCalls about stpcpy.
llvm-svn: 156815
2012-05-15 11:46:21 +00:00
Jakob Stoklund Olesen
a3e3afc746 Fix PR12821.
RAFast must add an <imp-def> operand when it is rewriting a sub-register
def that isn't a read-modify-write.

llvm-svn: 156777
2012-05-14 21:10:25 +00:00
Chad Rosier
c3a90c47b9 Move the capture analysis from MemoryDependencyAnalysis to a more general place
so that it can be reused in MemCpyOptimizer.  This analysis is needed to remove
an unnecessary memcpy when returning a struct into a local variable.
rdar://11341081
PR12686

llvm-svn: 156776
2012-05-14 20:35:04 +00:00
Brendon Cahoon
8b14ad918f Revert 156634 upon request until code improvement changes are made.
llvm-svn: 156775
2012-05-14 19:35:42 +00:00
Dan Gohman
cc1f60a86c Rename @llvm.debugger to @llvm.debugtrap.
llvm-svn: 156774
2012-05-14 18:58:10 +00:00
Rafael Espindola
b6ca820fbb Add support for the .rept directive. Patch by Vladmir Sorokin. I added support
for nesting.

llvm-svn: 156714
2012-05-12 16:31:10 +00:00
Benjamin Kramer
b778bbd91b ELF: Add support for the asm .version directive.
llvm-svn: 156712
2012-05-12 14:30:47 +00:00
Benjamin Kramer
549c257415 AsmParser: Add support for the .purgem directive.
Based on a patch by Team PaX.

llvm-svn: 156709
2012-05-12 11:21:46 +00:00
Benjamin Kramer
3cf84357e0 AsmParser: ignore the .extern directive.
llvm-svn: 156707
2012-05-12 11:18:59 +00:00
Benjamin Kramer
09b38e9f61 AsmParser: Add support for .ifc and .ifnc directives.
Based on a patch from PaX Team.

llvm-svn: 156706
2012-05-12 11:18:51 +00:00
Benjamin Kramer
dc54b252bb AsmParser: Add support for .ifb and .ifnb directives.
Based on a patch from PaX Team.

llvm-svn: 156705
2012-05-12 11:18:42 +00:00
Stepan Dyatkovskiy
fa0cf8dc2e Recommited r156374 with critical fixes in BitcodeReader/Writer:
Ordinary patch for PR1255.
Added new case-ranges orientated methods for adding/removing cases in SwitchInst. After this patch cases will internally representated as ConstantArray-s instead of ConstantInt, externally cases wrapped within the ConstantRangesSet object.
Old methods of SwitchInst are also works well, but marked as deprecated. So on this stage we have no side effects except that I added support for case ranges in BitcodeReader/Writer, of course test for Bitcode is also added. Old "switch" format is also supported.

llvm-svn: 156704
2012-05-12 10:48:17 +00:00
Jay Foad
65d25fa204 Teach Function::hasAddressTaken that BlockAddress doesn't really take
the address of a function.

llvm-svn: 156703
2012-05-12 08:30:16 +00:00
Sirish Pande
2eadb696a5 Support for Hexagon feature, New Value Jump.
llvm-svn: 156698
2012-05-12 05:10:30 +00:00
Akira Hatanaka
a80ec224bf Fix test cases.
llvm-svn: 156697
2012-05-12 03:25:16 +00:00
Akira Hatanaka
431ee824c6 Make the following changes in MipsAsmPrinter.cpp:
- Remove code which lowers pseudo SETGP01.
- Fix LowerSETGP01. The first two of the three instructions that are emitted to
  initialize the global pointer register now use register $2.
- Stop emitting .cpload directive.

llvm-svn: 156689
2012-05-12 00:48:43 +00:00
Akira Hatanaka
bc52a1662b Insert instructions to the entry basic block which initializes the global
pointer register. 


This is the first of the series of patches which clean up the way global pointer
register is used. The patches will make the following improvements:

- Make $gp an allocatable temporary register rather than reserving it.
- Use a virtual register as the global pointer register and let the register
  allocator decide which register to assign to it or whether spill/reloads are
  needed.
- Make sure $gp is valid at the entry of a called function, which is necessary
  for functions using lazy binding.
- Remove the need for emitting .cprestore and .cpload directives.

llvm-svn: 156671
2012-05-12 00:17:17 +00:00
Akira Hatanaka
3e39081c4a Do not replace operands of pseudo instructions with register $zero.
llvm-svn: 156663
2012-05-11 23:22:18 +00:00
Akira Hatanaka
d81273be58 Use regular expression to match register names.
llvm-svn: 156656
2012-05-11 23:00:40 +00:00
Chad Rosier
4a65a2a197 [fast-isel] Add support for selecting @llvm.trap().
llvm-svn: 156646
2012-05-11 21:33:49 +00:00
Brendon Cahoon
90dddafa44 Hexagon constant extender support.
Patch by Jyotsna Verma.

llvm-svn: 156634
2012-05-11 19:56:59 +00:00
Chad Rosier
72bd34ca71 [fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. Minor cleanup.
llvm-svn: 156632
2012-05-11 19:40:25 +00:00
Chad Rosier
c20de37076 [fast-isel] Cleaner fix for when we're unable to handle a non-double multi-reg
retval.  Hoists check before emitting the call to avoid unnecessary work.
rdar://11430407
PR12796

llvm-svn: 156628
2012-05-11 18:51:55 +00:00
Nuno Lopes
11d6ecb6db objectsize: add a few more tests and fix a bug
llvm-svn: 156625
2012-05-11 18:25:29 +00:00
Hans Wennborg
ea694231ad Fix test/CodeGen/X86/tls-pie.ll.
llvm-svn: 156612
2012-05-11 10:19:54 +00:00
Hans Wennborg
a5a417fcd3 Implement initial-exec TLS model for 32-bit PIC x86
This fixes a TODO from 2007 :) Previously, LLVM would emit the wrong
code here (see the update to test/CodeGen/X86/tls-pie.ll).

llvm-svn: 156611
2012-05-11 10:11:01 +00:00
Silviu Baranga
5138c169b1 Added the missing bit definition for the 4th bit of the STR (post reg) instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions.
llvm-svn: 156609
2012-05-11 09:28:27 +00:00
Silviu Baranga
dad5ffc779 Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate offset addressing. The assembler and instruction printer were not properly handeling the #-0 immediate.
llvm-svn: 156608
2012-05-11 09:10:54 +00:00
Eli Friedman
1746bfc50e Fix a minor logic mistake transforming compares in instcombine. PR12514.
llvm-svn: 156600
2012-05-11 01:32:59 +00:00
Manman Ren
c82d0e71b9 ARM: peephole optimization to remove cmp instruction
This patch will optimize the following cases:
  sub r1, r3 | sub r1, imm
  cmp r3, r1 or cmp r1, r3 | cmp r1, imm
  bge L1

TO
  subs r1, r3
  bge  L1 or ble L1

If the branch instruction can use flag from "sub", then we can replace
"sub" with "subs" and eliminate the "cmp" instruction.

rdar: 10734411
llvm-svn: 156599
2012-05-11 01:30:47 +00:00