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Commit Graph

43280 Commits

Author SHA1 Message Date
Dan Gohman
a585073323 Fix ScalarEvolution's range memoization to avoid using a
default ctor with ConstantRange.

llvm-svn: 119550
2010-11-17 20:23:08 +00:00
Evan Cheng
ce610bd6b3 Remove ARM isel hacks that fold large immediates into a pair of add, sub, and,
and xor. The 32-bit move immediates can be hoisted out of loops by machine
LICM but the isel hacks were preventing them.

Instead, let peephole optimization pass recognize registers that are defined by
immediates and the ARM target hook will fold the immediates in.

Other changes include 1) do not fold and / xor into cmp to isel TST / TEQ
instructions if there are multiple uses. This happens when the 'and' is live
out, machine sink would have sinked the computation and that ends up pessimizing
code. The peephole pass would recognize situations where the 'and' can be
toggled to define CPSR and eliminate the comparison anyway.

2) Move peephole pass to after machine LICM, sink, and CSE to avoid blocking
important optimizations.

rdar://8663787, rdar://8241368

llvm-svn: 119548
2010-11-17 20:13:28 +00:00
Rafael Espindola
7fc5cd0a58 make isVirtualSection a virtual method on MCSection. Chris' suggestion.
llvm-svn: 119547
2010-11-17 20:03:54 +00:00
Owen Anderson
d88cfe5453 More miscellaneous Thumb2 encodings.
llvm-svn: 119546
2010-11-17 19:57:38 +00:00
Jim Grosbach
122ce7f051 Fix typo.
llvm-svn: 119542
2010-11-17 19:30:11 +00:00
Bill Wendling
5c4f5ecff0 Add missing opcodes now that this function's used in more than one place.
llvm-svn: 119539
2010-11-17 19:16:20 +00:00
Benjamin Kramer
1b330efb46 InstCombine: Add a missing irem identity (X % X -> 0).
llvm-svn: 119538
2010-11-17 19:11:46 +00:00
Duncan Sands
2bd7e7c274 Move some those Xor simplifications which don't require creating new
instructions out of InstCombine and into InstructionSimplify.  While
there, introduce an m_AllOnes pattern to simplify matching with integers
and vectors with all bits equal to one.

llvm-svn: 119536
2010-11-17 18:52:15 +00:00
Jim Grosbach
b640b6a7b4 More ARM encoding bits. LDRH now encodes properly.
llvm-svn: 119529
2010-11-17 18:11:11 +00:00
Rafael Espindola
b6fcca35a2 Add support for .int.
llvm-svn: 119512
2010-11-17 16:24:40 +00:00
Rafael Espindola
9186952072 Add support for .2byte, .4byte and .8byte.
Fixes PR8631.

llvm-svn: 119511
2010-11-17 16:15:42 +00:00
Daniel Dunbar
1890e9a6b7 MC-JIT: Stub out "pure" streamer.
- No immediate use, but maybe someone feels like hacking on it.

llvm-svn: 119510
2010-11-17 16:06:47 +00:00
Daniel Dunbar
aff668a681 MCJIT: Stub out MCJIT implementation, still doesn't do anything useful.
llvm-svn: 119509
2010-11-17 16:06:43 +00:00
Daniel Dunbar
7817c0b45f lli: Add stub -use-mcjit option, which doesn't currently do anything.
llvm-svn: 119508
2010-11-17 16:06:37 +00:00
Duncan Sands
c84443a206 Have InlineFunction use SimplifyInstruction rather than
hasConstantValue.  I was leery of using SimplifyInstruction
while the IR was still in a half-baked state, which is the
reason for delaying the simplification until the IR is fully
cooked.

llvm-svn: 119494
2010-11-17 11:16:23 +00:00
Duncan Sands
a5bd3ff0e4 Now that hasConstantValue has been made simpler, it may return the
phi node itself if it occurs in an unreachable basic block.  Protect
against this.  Hopefully this will fix some more buildbots.

llvm-svn: 119493
2010-11-17 10:23:23 +00:00
Evan Cheng
907a7149d6 Revert r119109 for now. It's breaking 176.gcc.
llvm-svn: 119492
2010-11-17 09:31:04 +00:00
Duncan Sands
d3c1ca1f00 Previously SimplifyInstruction could report that an instruction
simplified to itself (this can only happen in unreachable blocks).
Change it to return null instead.  Hopefully this will fix some
buildbot failures.

llvm-svn: 119490
2010-11-17 08:35:29 +00:00
Chris Lattner
5faff99d84 With the newly simplified SourceMgr interfaces and the generalized
SrcMgrDiagHandler, we can improve clang diagnostics for inline asm:
instead of reporting them on a source line of the original line,
we can report it on the correct line wherever the string literal came
from. For something like this:

void foo() {
  asm("push %rax\n"
      ".code32\n");
}

we used to get this: (note that the line in t.c isn't helpful)

t.c:4:7: error: warning: ignoring directive for now
  asm("push %rax\n"
      ^
<inline asm>:2:1: note: instantiated into assembly here
.code32
^

now we get:

t.c:5:8: error: warning: ignoring directive for now
      ".code32\n"
       ^
<inline asm>:2:1: note: instantiated into assembly here
.code32
^

Note that we're pointing to line 5 properly now.

llvm-svn: 119488
2010-11-17 08:20:42 +00:00
Chris Lattner
99b8654169 now that AsmPrinter::EmitInlineAsm is factored right, we can eliminate the
cookie argument to the SourceMgr diagnostic stuff.  This cleanly separates
LLVMContext's inlineasm handler from the sourcemgr error handling 
definition, increasing type safety and cleaning things up.

llvm-svn: 119486
2010-11-17 08:13:01 +00:00
Che-Liang Chiou
f8ffd59ccb Add simple arithmetics and %type directive for PTX
llvm-svn: 119485
2010-11-17 08:08:49 +00:00
Evan Cheng
eed919e2fb Simplify code that toggle optional operand to ARM::CPSR.
llvm-svn: 119484
2010-11-17 08:06:50 +00:00
Chris Lattner
2cc6515616 rearrange how the handler in SourceMgr is installed, eliminating the use of
the cookie argument to setDiagHandler

llvm-svn: 119483
2010-11-17 08:03:32 +00:00
Chris Lattner
003e3db609 refactor the interface to EmitInlineAsm a bit, no functionality change.
llvm-svn: 119482
2010-11-17 07:53:40 +00:00
Chris Lattner
9ecbca191a fix PR8613 - Copy constructor of SwitchInst does not call SwitchInst::init
llvm-svn: 119463
2010-11-17 05:41:46 +00:00
Chris Lattner
4e53e6e198 tidy up
llvm-svn: 119462
2010-11-17 05:41:32 +00:00
Bill Wendling
7d3f3104d7 The machine instruction no longer encodes the submode as a separate operand. We
should get the submode from the load/store multiple instruction's opcode.

llvm-svn: 119461
2010-11-17 05:31:09 +00:00
Bill Wendling
f0a1acba8c Proper encoding for VLDM and VSTM instructions. The register lists for these
instructions have to distinguish between lists of single- and double-precision
registers in order for the ASM matcher to do a proper job. In all other
respects, a list of single- or double-precision registers are the same as a list
of GPR registers.

llvm-svn: 119460
2010-11-17 04:32:08 +00:00
Duncan Sands
48517dac03 Fix a layering violation: hasConstantValue, which is part of the PHINode
class, uses DominatorTree which is an analysis.  This change moves all of
the tricky hasConstantValue logic to SimplifyInstruction, and replaces it
with a very simple literal implementation.  I already taught users of
hasConstantValue that need tricky stuff to use SimplifyInstruction instead.
I didn't update InlineFunction because the IR looks like it might be in a
funky state at the point it calls hasConstantValue, which makes calling
SimplifyInstruction dangerous since it can in theory do a lot of tricky
reasoning.  This may be a pessimization, for example in the case where
all phi node operands are either undef or a fixed constant.

llvm-svn: 119459
2010-11-17 04:30:22 +00:00
Duncan Sands
7376a19858 Have ScalarEvolution use SimplifyInstruction rather than hasConstantValue.
While there, add a note about an inefficiency I noticed.

llvm-svn: 119458
2010-11-17 04:18:45 +00:00
Duncan Sands
a2af48a00b Have RemovePredecessorAndSimplify you SimplifyInstruction
rather than hasConstantValue.

llvm-svn: 119457
2010-11-17 04:12:05 +00:00
Duncan Sands
697e2419ba Remove dead code in GVN: now that SimplifyInstruction is called
systematically, CollapsePhi will always return null here.  Note
that CollapsePhi did an extra check, isSafeReplacement, which
the SimplifyInstruction logic does not do.  I think that check
was bogus - I guess we will soon find out!  (It was originally
added in commit 41998 without a testcase).

llvm-svn: 119456
2010-11-17 04:05:21 +00:00
Dan Gohman
b10ff802a0 Memoize results from ScalarEvolution's getUnsignedRange and getSignedRange.
This fixes some extreme compile times on unrolled sha512 code.

llvm-svn: 119455
2010-11-17 02:44:44 +00:00
Eric Christopher
fb840882c6 Only avoid the check if we're the last operand before the variable
operands in a variadic instruction.

llvm-svn: 119446
2010-11-17 00:55:36 +00:00
Bill Wendling
0b16ba97fd Add binary emission stuff for VLDM/VSTM. This reuses the
"getRegisterListOpValue" logic. If the registers are double or single precision,
the value returned is suitable for VLDM/VSTM.

llvm-svn: 119435
2010-11-17 00:45:23 +00:00
Peter Collingbourne
1cf8df8f83 Fix typo: Exectuable -> Executable
llvm-svn: 119433
2010-11-17 00:43:43 +00:00
Bill Wendling
d2da6dff5e Use the correct variable names so that the encodings will be correct.
llvm-svn: 119403
2010-11-16 23:44:49 +00:00
Dan Gohman
348c3f8197 Reapply r118917. With pseudo-instruction expansion moved to
a different pass, the complicated interaction between cmov expansion
and fast isel is no longer a concern.

llvm-svn: 119400
2010-11-16 22:43:23 +00:00
Oscar Fuentes
690d065e70 Fix assembling X86CompilationCallback_Win64.asm on VS 10.
Patch by Louis Zhuang!

llvm-svn: 119394
2010-11-16 22:07:47 +00:00
Dan Gohman
eb3b1c3576 Fix grammaro.
llvm-svn: 119386
2010-11-16 21:27:00 +00:00
Evan Cheng
5a62a6c2b6 Add ExpandPseudos.cpp.
llvm-svn: 119385
2010-11-16 21:20:36 +00:00
Rafael Espindola
283e6bd938 Add .loc methods to the streamer.
Next: Add support for the !HasDotLocAndDotFile case to the MCAsmStreamer
and then switch codegen to use it.

llvm-svn: 119384
2010-11-16 21:20:32 +00:00
Dan Gohman
52a761760d Split pseudo-instruction expansion into a separate pass, to make it
easier to debug, and to avoid complications when the CFG changes
in the middle of the instruction selection process.

llvm-svn: 119382
2010-11-16 21:02:37 +00:00
Jakob Stoklund Olesen
fb47e37338 Fix emergency spilling in LiveIntervals::spillPhysRegAroundRegDefsUses.
Always spill the full representative register at any point where any subregister
is live.

This fixes PR8620 which caused the old logic to get confused and not spill
anything at all.

The fundamental problem here is that the coalescer is too aggressive about
physical register coalescing. It sometimes makes it impossible to allocate
registers without these emergency spills.

llvm-svn: 119375
2010-11-16 19:55:14 +00:00
Jakob Stoklund Olesen
6673408896 Print out the register class of the current interval.
llvm-svn: 119374
2010-11-16 19:55:12 +00:00
Rafael Espindola
dc0be5a0cc Parse and ignore some .cfi_* directives.
llvm-svn: 119362
2010-11-16 18:34:07 +00:00
Michael J. Spencer
7435976c05 This is the first step in adding sane error handling support to LLVMSystem.
The system API's will be shifted over to returning an error_code, and returning
other return values as out parameters to the function.

Code that needs to check error conditions will use the errc enum values which
are the same as the posix_errno defines (EBADF, E2BIG, etc...), and are
compatable with the error codes in WinError.h due to some magic in system_error.

An example would be:

if (error_code ec = KillEvil("Java")) { // error_code can be converted to bool.
  handle_error(ec);
}

llvm-svn: 119360
2010-11-16 18:31:52 +00:00
Jim Grosbach
1b1636f0cb ARM conditional mov encoding fix.
llvm-svn: 119354
2010-11-16 18:13:42 +00:00
Duncan Sands
74aeda71dd Have a few places that want to simplify phi nodes use SimplifyInstruction
rather than calling hasConstantValue.  No intended functionality change.

llvm-svn: 119352
2010-11-16 17:41:24 +00:00
Duncan Sands
825c7d7f79 In which I discover the existence of loops. Threading an operation
over a phi node by applying it to each operand may be wrong if the
operation and the phi node are mutually interdependent (the testcase
has a simple example of this).  So only do this transform if it would
be correct to perform the operation in each predecessor of the block
containing the phi, i.e. if the other operands all dominate the phi.
This should fix the FFMPEG snow.c regression reported by İsmail Dönmez.

llvm-svn: 119347
2010-11-16 12:16:38 +00:00