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Commit Graph

35 Commits

Author SHA1 Message Date
Lang Hames
25553028ff Make the peephole optimizer clear kill flags on a vreg if it's about to add new
uses of the vreg, since the old kills may no longer be valid.  This was causing
-verify-machineinstrs to complain about uses after kills, and could potentially
have been causing subtle register allocation issues, but I haven't come across a
test case yet.

llvm-svn: 151425
2012-02-25 02:01:00 +00:00
Lang Hames
6ec3b488f8 Fixed typo.
llvm-svn: 151417
2012-02-25 00:46:38 +00:00
Andrew Trick
b9d2e9e81d Codegen pass definition cleanup. No functionality.
Moving toward a uniform style of pass definition to allow easier target configuration.
Globally declare Pass ID.
Globally declare pass initializer.
Use INITIALIZE_PASS consistently.
Add a call to the initializer from CodeGen.cpp.
Remove redundant "createPass" functions and "getPassName" methods.

While cleaning up declarations, cleaned up comments (sorry for large diff).

llvm-svn: 150100
2012-02-08 21:23:13 +00:00
Andrew Trick
beefd7ef4e whitespace
llvm-svn: 150094
2012-02-08 21:22:43 +00:00
Evan Cheng
1acd685d87 Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.

llvm-svn: 146026
2011-12-07 07:15:52 +00:00
Nick Lewycky
714cb9cf31 If MI is deleted then remove it from the set. If a new MI is created, it could
have the same address as the one we deleted, and we don't want that in the set
yet. Noticed by inspection.

llvm-svn: 141849
2011-10-13 02:16:18 +00:00
Duncan Sands
f74e5f1322 SrcDef is only written and never read. Remove it.
llvm-svn: 136080
2011-07-26 15:05:06 +00:00
Evan Cheng
4a169be530 - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.

llvm-svn: 134021
2011-06-28 19:10:37 +00:00
Evan Cheng
29faaebae9 Add a peephole optimization to optimize pairs of bitcasts. e.g.
v2 = bitcast v1
...
v3 = bitcast v2
...
   = v3
=>
v2 = bitcast v1
...
   = v1
if v1 and v3 are of in the same register class.

bitcast between i32 and fp (and others) are often not nops since they
are in different register classes. These bitcast instructions are often
left because they are in different basic blocks and cannot be
eliminated by dag combine.

rdar://9104514

llvm-svn: 127668
2011-03-15 05:13:13 +00:00
Evan Cheng
c6f645610e Fix thinko. Cmp can be the first instruction in a MBB.
llvm-svn: 125552
2011-02-15 05:00:24 +00:00
Evan Cheng
3685f86688 Fix PR8854. Track inserted copies to avoid read before write. Sorry, it's hard to reduce a sensible small test case.
llvm-svn: 125523
2011-02-14 21:50:37 +00:00
Jakob Stoklund Olesen
32f1783ca1 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

llvm-svn: 123155
2011-01-10 02:58:51 +00:00
Evan Cheng
aa16fd02ad Do not model all INLINEASM instructions as having unmodelled side effects.
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.

This allows memory instructions to be moved around INLINEASM instructions.

llvm-svn: 123044
2011-01-07 23:50:32 +00:00
Evan Cheng
8b58b77d06 DBG_VALUE does not have any side effects; it also makes no sense to mark it cheap as a copy.
llvm-svn: 123031
2011-01-07 21:08:26 +00:00
Evan Cheng
ce610bd6b3 Remove ARM isel hacks that fold large immediates into a pair of add, sub, and,
and xor. The 32-bit move immediates can be hoisted out of loops by machine
LICM but the isel hacks were preventing them.

Instead, let peephole optimization pass recognize registers that are defined by
immediates and the ARM target hook will fold the immediates in.

Other changes include 1) do not fold and / xor into cmp to isel TST / TEQ
instructions if there are multiple uses. This happens when the 'and' is live
out, machine sink would have sinked the computation and that ends up pessimizing
code. The peephole pass would recognize situations where the 'and' can be
toggled to define CPSR and eliminate the comparison anyway.

2) Move peephole pass to after machine LICM, sink, and CSE to avoid blocking
important optimizations.

rdar://8663787, rdar://8241368

llvm-svn: 119548
2010-11-17 20:13:28 +00:00
Evan Cheng
4afa3a6b1f Code clean up. The peephole pass should be the one updating the instruction
iterator, not TII->OptimizeCompareInstr.

llvm-svn: 119186
2010-11-15 21:20:45 +00:00
Bill Wendling
4340c9449a When we look at instructions to convert to setting the 's' flag, we need to look
at more than those which define CPSR. You can have this situation:

(1)  subs  ...
(2)  sub   r6, r5, r4
(3)  movge ...
(4)  cmp   r6, 0
(5)  movge ...

We cannot convert (2) to "subs" because (3) is using the CPSR set by
(1). There's an analogous situation here:

(1)  sub   r1, r2, r3
(2)  sub   r4, r5, r6
(3)  cmp   r4, ...
(5)  movge ...
(6)  cmp   r1, ...
(7)  movge ...

We cannot convert (1) to "subs" because of the intervening use of CPSR.

llvm-svn: 117950
2010-11-01 20:41:43 +00:00
Bill Wendling
70856991c5 The testcase is now XFAILed. Sorry about the breakage.
llvm-svn: 117904
2010-11-01 05:50:55 +00:00
Eric Christopher
7295ed492c Revert r117876 for now, it's causing more testsuite failures.
llvm-svn: 117879
2010-10-31 22:42:55 +00:00
Bill Wendling
13936421e6 Disable the peephole optimizer until 186.crafty on armv6 is fixed. This is what
looks like is happening:

Without the peephole optimizer:
  (1)   sub     r6, r6, #32
        orr     r12, r12, lr, lsl r9
        orr     r2, r2, r3, lsl r10
  (x)   cmp     r6, #0
        ldr     r9, LCPI2_10
        ldr     r10, LCPI2_11
  (2)   sub     r8, r8, #32
  (a)   movge   r12, lr, lsr r6
  (y)   cmp     r8, #0
LPC2_10:
        ldr     lr, [pc, r10]
  (b)   movge   r2, r3, lsr r8

With the peephole optimizer:
        ldr     r9, LCPI2_10
        ldr     r10, LCPI2_11
  (1*)  subs    r6, r6, #32
  (2*)  subs    r8, r8, #32
  (a*)  movge   r12, lr, lsr r6
  (b*)  movge   r2, r3, lsr r8

(1) is used by (x) for the conditional move at (a). (2) is used by (y) for the
conditional move at (b). After the peephole optimizer, these the flags resulting
from (1*) are ignored and only the flags from (2*) are considered for both
conditional moves.

llvm-svn: 117876
2010-10-31 22:07:12 +00:00
Owen Anderson
46990c17f7 Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which
must be called in the pass's constructor.  This function uses static dependency declarations to recursively initialize
the pass's dependencies.

Clients that only create passes through the createFooPass() APIs will require no changes.  Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.

I have tested this with all standard configurations of clang and llvm-gcc on Darwin.  It is possible that there are problems
with the static dependencies that will only be visible with non-standard options.  If you encounter any crash in pass
registration/creation, please send the testcase to me directly.

llvm-svn: 116820
2010-10-19 17:21:58 +00:00
Bill Wendling
3b3d9aaa86 Don't recompute MachineRegisterInfo in the Optimize* method.
llvm-svn: 116750
2010-10-18 21:22:31 +00:00
Owen Anderson
63f757463c Begin adding static dependence information to passes, which will allow us to
perform initialization without static constructors AND without explicit initialization
by the client.  For the moment, passes are required to initialize both their
(potential) dependencies and any passes they preserve.  I hope to be able to relax
the latter requirement in the future.

llvm-svn: 116334
2010-10-12 19:48:12 +00:00
Owen Anderson
69cbf2e8b7 Now with fewer extraneous semicolons!
llvm-svn: 115996
2010-10-07 22:25:06 +00:00
Gabor Greif
99c07b1d95 Move the search for the appropriate AND instruction
into OptimizeCompareInstr.
This necessitates the passing of CmpValue around,
so widen the virtual functions to accomodate.

No functionality changes.

llvm-svn: 114428
2010-09-21 12:01:15 +00:00
Gabor Greif
bd0b1357e0 must not peephole away side effects
llvm-svn: 113848
2010-09-14 20:46:08 +00:00
Bill Wendling
038bcd275f Rename ConvertToSetZeroFlag to something more general.
llvm-svn: 113670
2010-09-11 00:13:50 +00:00
Bill Wendling
f2b0c99610 No need to recompute the SrcReg and CmpValue.
llvm-svn: 113666
2010-09-10 23:46:12 +00:00
Bill Wendling
e54ebc2cbe Move some of the decision logic for converting an instruction into one that sets
the 'zero' bit down into the back-end. There are other cases where this logic
isn't sufficient, so they should be handled separately.

llvm-svn: 113665
2010-09-10 23:34:19 +00:00
Bill Wendling
dc260a07f6 Modify the comparison optimizations in the peephole optimizer to update the
iterator when an optimization took place. This allows us to do more insane
things with the code than just remove an instruction or two.

llvm-svn: 113640
2010-09-10 21:55:43 +00:00
Bill Wendling
09a19ea0bf Remove now unneeded command line flag that enables 'optimize compares.'
llvm-svn: 112287
2010-08-27 20:39:09 +00:00
Bill Wendling
c8117e507d Turn optimize compares back on with fix. We needed to test that a machine op was
a register before checking if it was defined.

llvm-svn: 110733
2010-08-10 21:38:11 +00:00
Dan Gohman
9abea56ce4 Revert r110718; it broke clang-i386-darwin9.
llvm-svn: 110726
2010-08-10 20:49:33 +00:00
Bill Wendling
0acc8f8a02 Turn optimize cmps on by default so that we can get some testing by the nightly
ARM testers.

llvm-svn: 110718
2010-08-10 20:23:02 +00:00
Bill Wendling
8a7a43a1cb Merge the OptimizeExts and OptimizeCmps passes into one PeepholeOptimizer
pass. This pass should expand with all of the small, fine-grained optimization
passes to reduce compile time and increase happiment.

llvm-svn: 110627
2010-08-09 23:59:04 +00:00