Craig Topper
655f8a01e6
Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes part of PR10700.
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llvm-svn: 140370
2011-09-23 06:57:25 +00:00
Andrew Trick
bfac89c238
Restore hasPostISelHook tblgen flag.
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No functionality change. The hook makes it explicit which patterns
require "special" handling. i.e. it self-documents tblgen
deficiencies. I plan to add verification in ExpandISelPseudos and
Thumb2SizeReduce to catch any missing hasPostISelHooks. Otherwise it's
too fragile.
llvm-svn: 140160
2011-09-20 18:22:31 +00:00
Andrew Trick
53aeb9f663
ARM isel bug fix for adds/subs operands.
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Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile
llvm-svn: 140134
2011-09-20 03:17:40 +00:00
Eric Christopher
6cf9c3efe8
Remove more of llvmc and dependencies.
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llvm-svn: 140121
2011-09-20 00:34:27 +00:00
Jim Grosbach
6da9e6b23d
Thumb2 assembly parsing and encoding for TBB/TBH.
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llvm-svn: 140078
2011-09-19 22:21:13 +00:00
David Greene
799578fee4
Better Error Reporting
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Report missing template arguments more helpfully by supplying the name
of the missing argument in the error message.
llvm-svn: 140034
2011-09-19 18:26:07 +00:00
Eric Christopher
2e1f5823a1
Migrate this to use clang by default as well.
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llvm-svn: 139936
2011-09-16 20:36:22 +00:00
Eric Christopher
3163b0a2ce
We now look for clang, then llvm-gcc, then gcc as our compiler. We don't need
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this anymore.
llvm-svn: 139935
2011-09-16 20:36:20 +00:00
Craig Topper
60719c7bfb
Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND from being recognized by disassembler.
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llvm-svn: 139691
2011-09-14 06:41:26 +00:00
Argyrios Kyrtzidis
d0acbd50a7
[tablegen] In ClangAttrEmitter.cpp handle SourceLocation arguments to attributes.
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llvm-svn: 139617
2011-09-13 18:41:43 +00:00
Argyrios Kyrtzidis
56cc934d76
In ClangAttrEmitter.cpp emit code that allows attributes to keep their source range.
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llvm-svn: 139598
2011-09-13 16:05:43 +00:00
Craig Topper
03c833ff84
Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from being disassembled. Also added encodings for the other register/register form of these instructions. Fixes PR10848.
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llvm-svn: 139588
2011-09-13 06:54:58 +00:00
Craig Topper
a9b27eecc9
Fix disassembling of reverse register/register forms of ADD/SUB/XOR/OR/AND/SBB/ADC/CMP/MOV.
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llvm-svn: 139485
2011-09-11 21:41:45 +00:00
Craig Topper
8361de67b5
Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP disassembling to ignore OpSize and REX.W.
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llvm-svn: 139484
2011-09-11 20:23:20 +00:00
Douglas Gregor
6a808433ce
Update Clang AST attribute reader tblgen generation to match with ASTReader change
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llvm-svn: 139414
2011-09-09 21:37:29 +00:00
Jim Grosbach
eb2d668899
Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH.
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llvm-svn: 139381
2011-09-09 18:37:27 +00:00
Eli Friedman
fd4451674b
Make sure to handle the case where emitPredicateMatch returns false. Noticed by inspection.
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llvm-svn: 139317
2011-09-08 21:00:31 +00:00
Caitlin Sadowski
ac6881fc85
Added LateParsed property to TableGen attributes.
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This patch was written by DeLesley Hutchins.
llvm-svn: 139300
2011-09-08 17:40:49 +00:00
James Molloy
090d019a29
Fix warning on windows; use of comparison with bool argument.
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llvm-svn: 139286
2011-09-08 08:12:01 +00:00
Andrew Trick
dc3f981b08
Fix a use of freed string contents.
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Speculatively try to fix our windows testers with a patch I found on the internet.
llvm-svn: 139279
2011-09-08 05:25:49 +00:00
Andrew Trick
daeb007cee
whitespace
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llvm-svn: 139278
2011-09-08 05:23:14 +00:00
Jim Grosbach
8b54d19514
Thumb2 assembly parsing and encoding for LDRBT.
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llvm-svn: 139267
2011-09-07 23:39:14 +00:00
Jim Grosbach
20642fb479
Thumb2 parsing and encoding for LDR(immediate).
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The immediate offset of the non-writeback i8 form (encoding T4) allows
negative offsets only. The positive offset form of the encoding is the
LDRT instruction. Immediate offsets in the range [0,255] use encoding T3
instead.
llvm-svn: 139254
2011-09-07 20:58:57 +00:00
James Molloy
ac057f13a5
Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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llvm-svn: 139250
2011-09-07 19:42:28 +00:00
Joerg Sonnenberger
9fa9ed6961
Dependency should be on the output file name, not the dependency file
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name.
llvm-svn: 139220
2011-09-07 02:12:03 +00:00
Benjamin Kramer
b98ae4dc68
valgrind: Suppress glibc's optiized strcasecmp harder.
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llvm-svn: 139084
2011-09-03 17:59:31 +00:00
Andrew Trick
cac23d1858
Attempt to silence known valgrind errors.
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llvm-svn: 139048
2011-09-02 22:59:34 +00:00
David Greene
9cb3b3dd2e
Make RecordVal Name an Init
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Store a RecordVal's name as an Init to allow class-qualified Record
members to reference Records that have Init names. We'll use this to
provide more programmability in how we name defs and their associated
members.
llvm-svn: 139031
2011-09-02 20:12:07 +00:00
Kevin Enderby
edfcba2f3c
Fix the disassembly of the X86 "crc32w %ax, %eax" instruction. Bug 10702.
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llvm-svn: 139014
2011-09-02 18:03:03 +00:00
Craig Topper
316c7bfe37
Make IC_VEX* not inherit from IC_*. Prevents instructions with no VEX form from disassembling to their non-VEX form. Also prevents weak filter collisons that were keeping valid VEX instructions from decoding properly. Make VEX_L* not inherit from VEX_* because the VEX.L bit always important. This stops packed int VEX encodings from being disassembled when specified with VEX.L=1. Fixes PR10831 and PR10806.
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llvm-svn: 138997
2011-09-02 04:17:54 +00:00
James Molloy
4a63186421
Fix up r137380 based on post-commit review by Jim Grosbach.
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llvm-svn: 138948
2011-09-01 18:02:14 +00:00
NAKAMURA Takumi
d18caf57a3
lit: Normalize pathsep slashes also on %T.
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On Python-w32 with mingw msys bash, %T was replaced to "x:\foo\bar...". msys bash cannot handle DOSish paths.
llvm-svn: 138852
2011-08-31 03:56:17 +00:00
Evan Cheng
91aa81acaa
Follow up to r138791.
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Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
call a target hook to adjust the instruction. For ARM, this is used to
adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
instructions have implicit def of CPSR (required since it now uses CPSR physical
register dependency rather than "glue"). If the carry flag is used, then the
target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
will remove the CPSR implicit def from the MachineInstr.
llvm-svn: 138810
2011-08-30 19:09:48 +00:00
Andrew Trick
e1de7514f3
Lit option for ignoring stderr output.
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This is useful for testing a build a temporarily hand instrumented
build.
Patch by arrowdodger!
llvm-svn: 138804
2011-08-30 17:42:33 +00:00
Craig Topper
5556444bf7
Add vvvv support to disassembling of instructions with MRMDestMem and MRMDestReg form. Needed to support mem dest form of vmaskmovps/d. Fixes PR10807.
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llvm-svn: 138795
2011-08-30 07:09:35 +00:00
Kevin Enderby
f1aef98ad2
Fix the disassembly of the X86 crc32 instruction. Bug 10702 and rdar://8795217
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llvm-svn: 138771
2011-08-29 22:06:28 +00:00
Andrew Trick
1b89583203
Reverted r138652, valgrind doesn't understand obj:*/tblgen.
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llvm-svn: 138703
2011-08-27 06:17:30 +00:00
Owen Anderson
fd21da3506
Improve encoding support for BLX with immediat eoperands, and fix a BLX decoding bug this uncovered.
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llvm-svn: 138675
2011-08-26 23:32:08 +00:00
Andrew Trick
0c3e000af1
valgrind: Always suppress tblgen leaks.
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I'll clean up the rest of the XFAIL: vg_leak lines if this works.
llvm-svn: 138652
2011-08-26 20:41:20 +00:00
Douglas Gregor
7d590ad966
lit: Add %T as a replacement for the output directory
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llvm-svn: 138640
2011-08-26 19:05:18 +00:00
Craig Topper
5af7ba783d
Give ATTR_VEX higher priority when generating the disassembler context table. Fixes disassembling of VEX instructions with 'pp'=00. Fixes subset of PR10678.
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llvm-svn: 138552
2011-08-25 07:42:00 +00:00
Jim Grosbach
b2b155a93f
Thumb parsing and encoding support for ADD SP instructions.
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Fix the test FIXME and add parsing support for the ADD (SP plus immediate)
and ADD (SP plus register) instruction forms.
llvm-svn: 138488
2011-08-24 21:22:15 +00:00
Jim Grosbach
b33129ebad
Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.
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Add the predicate operand to the instructions. Update the back end
accordingly where the instructions are used. Restrict the SP operands
to actually only be SP, as otherwise these break assembly parsing for the
normal instruction variants.
llvm-svn: 138445
2011-08-24 17:46:13 +00:00
Caitlin Sadowski
9a011eafa9
Thread safety: Adding in an option for variadic expr* array of arguments
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llvm-svn: 138351
2011-08-23 18:49:23 +00:00
Eric Christopher
cd47076a67
Fix fpimmm->fpimm typo.
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Patch by Micah Villmow!
llvm-svn: 138330
2011-08-23 15:42:35 +00:00
NAKAMURA Takumi
6f25e6a0ec
utils/lit/lit/TestingConfig.py: Pass TEMP and TMP to tests on Win32 hosts.
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Win32 GetTempPath() tends to pick up %WINDIR% when neither TEMP nor TMP was found. %WINDIR% should not be treated writable on recent Windows OS.
llvm-svn: 138192
2011-08-20 05:44:58 +00:00
NAKAMURA Takumi
2d13692fbd
utils/lit/lit/TestingConfig.py: Split out environment vars for Win32.
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llvm-svn: 138191
2011-08-20 05:44:52 +00:00
Jim Grosbach
4e811b51eb
Allow non zero_reg explicit values for OptionalDefOperands in aliases.
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llvm-svn: 138073
2011-08-19 20:33:06 +00:00
Jim Grosbach
d990119d89
Tidy up. Formatting.
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llvm-svn: 138067
2011-08-19 19:53:51 +00:00
Owen Anderson
3146968039
Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment.
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Patch by James Molloy.
llvm-svn: 137830
2011-08-17 17:44:15 +00:00