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412 Commits

Author SHA1 Message Date
Michael Kuperstein
3563778983 [X86] Add support for tbyte memory operand size for Intel-syntax x86 assembly 
Differential Revision: http://reviews.llvm.org/D11257
Patch by: marina.yatsina@intel.com

llvm-svn: 242639
 2015-07-19 11:03:08 +00:00
Elena Demikhovsky
618bae6f38 AVX-512: Added all AVX-512 forms of Vector Convert for Float/Double/Int/Long types. 
In this patch I have only encoding. Intrinsics and DAG lowering will be in the next patch.
I temporary removed the old intrinsics test (just to split this patch).
Half types are not covered here.

Differential Revision: http://reviews.llvm.org/D11134

llvm-svn: 242023
 2015-07-13 13:26:20 +00:00
David Majnemer
40f539becd [llvm-objdump] Require that jump targets shown in -d are functions 
Don't let the disassembler pick call <.text> if a function happens to
live at the start of the section by only using function symbols.

llvm-svn: 241830
 2015-07-09 18:11:40 +00:00
David Majnemer
9584e54586 [llvm-objdump] Print the call target next to the instruction 
GNU binutils provides this behavior.  objdump -r doesn't really help
when you aren't dealing with relocation object files.

llvm-svn: 241631
 2015-07-07 22:06:59 +00:00
Asaf Badouh
a51b8d0d5b [X86][AVX512] Multiply Packed Unsigned Integers with Round and Scale 
pmulhrsw

review:
http://reviews.llvm.org/D10948

llvm-svn: 241443
 2015-07-06 14:03:40 +00:00
Asaf Badouh
7e53a288e3 [x86][AVX512] add Multiply High Op 
include encoding and intrinsics tests.

review
http://reviews.llvm.org/D10896

llvm-svn: 241406
 2015-07-05 12:23:20 +00:00
Craig Topper
3faa86f8f9 [X86] Add proper 64-bit mode checks to jrcxz and jcxz. 
llvm-svn: 241381
 2015-07-04 00:01:07 +00:00
Igor Breger
cdff3524c0 AVX-512: Implemented missing encoding for FMA scalar instructions 
Added tests for encoding

Differential Revision: http://reviews.llvm.org/D10865

llvm-svn: 241159
 2015-07-01 13:24:28 +00:00
Elena Demikhovsky
12bde41e5a AVX-512: all forms of SCATTER instruction on SKX, 
encoding, intrinsics and tests.

llvm-svn: 240936
 2015-06-29 12:14:24 +00:00
Igor Breger
7ca2ee2eb1 AVX-512: Implemented missing encoding and intrinsics for FMA instructions 
Added tests for DAG lowering ,encoding and intrinsics

Differential Revision: http://reviews.llvm.org/D10796

llvm-svn: 240926
 2015-06-29 09:10:00 +00:00
Asaf Badouh
732e3b5425 [x86][AVX512] 
Add vscalef support
include encoding and intrinsics


review:
http://reviews.llvm.org/D10730

llvm-svn: 240906
 2015-06-28 14:30:39 +00:00
Elena Demikhovsky
02169f53d0 AVX-512: Added all SKX forms of GATHER instructions. 
Added intrinsics.
Added encoding and tests.

llvm-svn: 240905
 2015-06-28 10:53:29 +00:00
Petr Hosek
7d5572358c [MC] Ensure that pending labels are flushed when -mc-relax-all flag is used 
Summary:
The current implementation doesn't always flush all pending labels
beforeemitting data which can result in an incorrectly placed labels in
case when when instruction bundling is enabled and -mc-relax-all flag is
being used. To address this issue, we always flush pending labels before
emitting data.

The change was tested by running PNaCl toolchain trybots with
-mc-relax-all flag set.

Fixes https://code.google.com/p/nativeclient/issues/detail?id=4063

Test Plan: Regression test attached

Reviewers: mseaborn

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D10325

llvm-svn: 240870
 2015-06-27 01:54:17 +00:00
Petr Hosek
0b66377b09 [MC] Align fragments when -mc-relax-all flag is used 
Summary:
Ensure that fragments are bundle aligned when instruction bundling
is enabled and the -mc-relax-all flag is set. This is implicitly
assumed by the bundle padding implementation but this assumption
does not hold when custom alignment is being used.

The change was tested by running PNaCl toolchain trybots with
-mc-relax-all flag set.

Fixes https://code.google.com/p/nativeclient/issues/detail?id=4063

Test Plan: Regression test attached

Reviewers: mseaborn

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D10044

llvm-svn: 240869
 2015-06-27 01:49:53 +00:00
Rafael Espindola
393725d952 Add a test for a recent regression. 
llvm-svn: 240656
 2015-06-25 16:16:08 +00:00
Elena Demikhovsky
1df83908be AVX-512: Added all forms of VPABS instruction 
Added all intrinsics, tests for encoding, tests for intrinsics.

llvm-svn: 240386
 2015-06-23 08:19:46 +00:00
Sanjoy Das
bea61317e9 [FaultMaps] Add a parser for the __llvm__faultmaps section. 
Summary:
The parser is exercised by llvm-objdump using -print-fault-maps.  As is
probably obvious, the code itself was "heavily inspired" by
http://reviews.llvm.org/D10434.

Reviewers: reames, atrick, JosephTremoulet

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10491

llvm-svn: 240304
 2015-06-22 18:03:02 +00:00
Elena Demikhovsky
0d6489273b AVX-512: added VPSHUFB instruction - all SKX forms 
Added intrinsics and encoding tests.

llvm-svn: 240277
 2015-06-22 13:00:42 +00:00
Elena Demikhovsky
833648a31f AVX-512: All forms of VCOPMRESS VEXPAND instructions, 
encoding tests.

llvm-svn: 240272
 2015-06-22 11:16:30 +00:00
Asaf Badouh
6e78caf9ff [AVX512] 
add instructions: VPAVGB and VPAVGW


review
http://reviews.llvm.org/D10504

llvm-svn: 240012
 2015-06-18 12:30:53 +00:00
Elena Demikhovsky
e3fe4bf53e AVX-512: (fixed) Added encoding of all forms of VPERMT2W/D/Q/PS/PD and VPERMI2W/D/Q/PS/PD. 
Intrinsics and tests for them are comming in the next patch.

llvm-svn: 240003
 2015-06-18 08:56:19 +00:00
Elena Demikhovsky
dc7dd8572b reverted 239999 due to test failures 
llvm-svn: 240001
 2015-06-18 08:06:49 +00:00
Elena Demikhovsky
f5554ec461 AVX-512: Added encoding of all forms of VPERMT2W/D/Q/PS/PD 
and VPERMI2W/D/Q/PS/PD.
Intrinsics and tests for them are comming in the next patch.

llvm-svn: 239999
 2015-06-18 07:29:40 +00:00
Michael Kuperstein
915c69271d Add support for parsing the XOR operator in Intel syntax inline assembly. 
Differential Revision: http://reviews.llvm.org/D10385
Patch by marina.yatsina@intel.com

llvm-svn: 239695
 2015-06-14 12:59:45 +00:00
Igor Breger
f163333815 AVX-512: Implemented cvtsi2ss/d cvtusi2ss/d instructions with round control for KNL. 
Added intrinsics for cvtsi2ss/d instructions.
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D10430

llvm-svn: 239694
 2015-06-14 12:44:55 +00:00
Elena Demikhovsky
b46f844518 X86-MPX: Implemented encoding for MPX instructions. 
Added encoding tests.

llvm-svn: 239403
 2015-06-09 13:02:10 +00:00
Igor Breger
545f43a067 AVX-512: Implemented 256/128bit VALIGND/Q instructions for SKX and KNL 
Implemented DAG lowering for all these forms.
Added tests for DAG lowering and encoding.

Differential Revision: http://reviews.llvm.org/D10310

llvm-svn: 239300
 2015-06-08 14:03:17 +00:00
Colin LeMahieu
fb88ee51e5 [objdump] Moving PrintImmHex out of MachODump and in to llvm-objdump and setting instprinter appropriately. 
llvm-svn: 239265
 2015-06-07 21:07:17 +00:00
Igor Breger
452695b2e5 Test commit 
llvm-svn: 239019
 2015-06-04 07:23:38 +00:00
Elena Demikhovsky
2b7fd2c6ef AVX-512: added all SKX forms of VPERMW/D/Q instructions. 
Added all forms of VPERMPS/PD instrcuctions.
Added encoding tests.

llvm-svn: 239016
 2015-06-04 07:07:13 +00:00
Asaf Badouh
08f13fa0ba re-apply 238809 
AVX-512: Implemented GETEXP instruction for KNL and SKX
Added rounding mode modifier for SQRTPS/PD
Added tests for encoding and intrinsics.
CR:
http://reviews.llvm.org/D9991

llvm-svn: 238923
 2015-06-03 13:41:48 +00:00
Elena Demikhovsky
13b85a4aa6 AVX-512: Implemented SHUFF32x4/SHUFF64x2/SHUFI32x4/SHUFI64x2 instructions for SKX and KNL. 
Added tests for encoding.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 238917
 2015-06-03 10:56:40 +00:00
Elena Demikhovsky
c14282d277 AVX-512: Implemented VRANGESD and VRANGESS instructions for SKX Implemented DAG lowering for all these forms. 
Added tests for encoding.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 238834
 2015-06-02 14:12:54 +00:00
Elena Demikhovsky
9402ebb636 AVX-512: Implemented VFIXUPIMMSD and VFIXUPIMMSS instructions for KNL 
Implemented DAG lowering for all these forms.
Added tests for encoding.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 238811
 2015-06-02 08:28:57 +00:00
Asaf Badouh
f8387bd5f5 revert 238809 
llvm-svn: 238810
 2015-06-02 07:45:19 +00:00
Asaf Badouh
9a55f1d0aa AVX-512: Implemented GETEXP instruction for KNL and SKX 
Added rounding mode modifier for SQRTPS/PD
Added tests for encoding and intrinsics.

llvm-svn: 238809
 2015-06-02 07:18:14 +00:00
Asaf Badouh
db0710de25 First commit test. 
llvm-svn: 238745
 2015-06-01 13:56:00 +00:00
Elena Demikhovsky
9e9a44e5bd AVX-512: Implemented VRANGEPD and VRANGEPD instructions for SKX. 
Implemented DAG lowering for all these forms.
Added tests for encoding.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 238738
 2015-06-01 11:05:34 +00:00
Elena Demikhovsky
12406985ca AVX-512: added all forms of VPSHUFD and VPSHUFHW, VPSHUFLW 
including encodings.

llvm-svn: 238729
 2015-06-01 07:17:23 +00:00
Elena Demikhovsky
9db95755e6 AVX-512: Implemented VFIXUPIMMPD and VFIXUPIMMPS instructions for KNL and SKX 
Implemented DAG lowering for all these forms.
Added tests for encoding.

by Igor Breger (igor.breger@intel.com)

llvm-svn: 238728
 2015-06-01 06:50:49 +00:00
Ahmed Bougacha
e255a8b38a [TableGen][AsmMatcherEmitter] Only parse isolated tokens as registers. 
Fixes PR23455, where, when TableGen generates the matcher from the
AsmString, it splits "cmp${cc}ss" into tokens, and the "ss" suffix
is recognized as the SS register.

I can't think of a situation where that's a feature, not a bug, hence:
when a token is "isolated", i.e., it is followed and preceded by
separators, it shouldn't be parsed as a register.

Differential Revision: http://reviews.llvm.org/D9844

llvm-svn: 238536
 2015-05-29 01:03:37 +00:00
Elena Demikhovsky
51096c6536 AVX-512: Implemented all forms of sign-extend and zero-extend instructions for KNL and SKX 
Implemented DAG lowering for all these forms.
Added tests for DAG lowering and encoding.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 238301
 2015-05-27 08:15:19 +00:00
Elena Demikhovsky
7d3b86db52 AVX-512: Added VBROADCASTF64X4, VBROADCASTF64X2, VBROADCASTI32X8, and other instructions from this set 
Added encoding tests.

llvm-svn: 237557
 2015-05-18 06:42:57 +00:00
Elena Demikhovsky
0803046ed4 AVX-512: fixed a bug in encoding of VPSRAQ instrcution, 
added a bunch of encoding tests.

llvm-svn: 237232
 2015-05-13 07:35:05 +00:00
Elena Demikhovsky
b034efaea8 AVX-512: asm parser errors check 
I reverted the error check that was removed in 236416.
I put the it in a separate file.

llvm-svn: 237107
 2015-05-12 09:47:23 +00:00
Elena Demikhovsky
f25b492812 AVX-512: Added SKX instructions and intrinsics: 
{add/sub/mul/div/} x {ps/pd} x {128/256} 2. max/min with sae

By Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 236971
 2015-05-11 06:05:05 +00:00
Elena Demikhovsky
28f6bb84a5 AVX-512: Added all forms of FP compare instructions for KNL and SKX. 
Added intrinsics for the instructions. CC parameter of the intrinsics was changed from i8 to i32 according to the spec.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 236714
 2015-05-07 11:24:42 +00:00
Elena Demikhovsky
40362f45c8 AVX-512: added integer "add" and "sub" instructions with saturation for SKX 
with intrinsics and tests

by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 236418
 2015-05-04 12:35:55 +00:00
Elena Demikhovsky
75f13a4f1a AVX-512: enabled tests for AVX512F set 
llvm-svn: 236416
 2015-05-04 11:09:41 +00:00
Elena Demikhovsky
5b00c277f4 AVX-512: Added VPACK* instructions forms for KNL and SKX 
and their intrinsics
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 236414
 2015-05-04 09:14:02 +00:00