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2 Commits

Author SHA1 Message Date
Andrea Di Biagio
bdef9a5ae6 [X86] Improved tablegen patters for matching TZCNT/LZCNT. 
Teach ISel how to match a TZCNT/LZCNT from a conditional move if the
condition code is X86_COND_NE.
Existing tablegen patterns only allowed to match TZCNT/LZCNT from a
X86cond with condition code equal to X86_COND_E. To avoid introducing
extra rules, I added an 'ImmLeaf' definition that checks if the
condition code is COND_E or COND_NE.

llvm-svn: 223668
 2014-12-08 17:47:18 +00:00
Andrea Di Biagio
41bcee5bc3 [X86] Add ISel patterns to improve the selection of TZCNT and LZCNT. 
Instructions TZCNT (requires BMI1) and LZCNT (requires LZCNT), always
provide the operand size as output if the input operand is zero.

We can take advantage of this knowledge during instruction selection
stage in order to simplify a few corner case.

llvm-svn: 209159
 2014-05-19 20:38:59 +00:00