2 Commits

Author	SHA1	Message	Date
Sanjay Patel	b9a5d78c41	fixed to test feature, not CPU ... llvm-svn: 231513	2015-03-06 20:51:25 +00:00
Sanjay Patel	ae0d32c510	Lower FNEG ( FABS (x) ) -> FNABS (x) [X86 codegen] PR20578 ... Negative FABS of either a scalar or vector should be handled the same way on x86 with SSE/AVX: a single OR instruction of the FP operand with a constant to light up the sign bit(s). http://llvm.org/bugs/show_bug.cgi?id=20578 Differential Revision: http://reviews.llvm.org/D5201 llvm-svn: 218822	2014-10-01 21:20:06 +00:00