Scott Michel
70cc5f61b2
CellSPU: Fix prologue/epilogue emission when function contains calls but
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theframe size is 0; the prologue and epilogue should be emitted in this case.
llvm-svn: 58890
2008-11-08 05:16:20 +00:00
Dan Gohman
30c5ce1b7d
Switch the MachineOperand accessors back to the short names like
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isReg, etc., from isRegister, etc.
llvm-svn: 57006
2008-10-03 15:45:36 +00:00
Bill Wendling
7273078850
Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc:
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/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
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llvm-svn: 56703
2008-09-26 22:10:44 +00:00
Evan Cheng
9946443460
Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.
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llvm-svn: 56683
2008-09-26 19:48:35 +00:00
Dan Gohman
d7a32ecde2
Trim unnecessary #includes.
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llvm-svn: 53471
2008-07-11 20:38:31 +00:00
Dan Gohman
c8097f8c8c
Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
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the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
llvm-svn: 52943
2008-07-01 00:05:16 +00:00
Dan Gohman
e9f33e576d
Don't use ISD namespace opcodes for MachineInstrs.
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llvm-svn: 52932
2008-06-30 22:23:08 +00:00
Bill Wendling
2ba98ca60f
Remove more iostream header includes. Needed to implement a "FlushStream"
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function to flush a specified std::ostream.
llvm-svn: 51705
2008-05-29 21:46:33 +00:00
Evan Cheng
38a755499d
Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.
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llvm-svn: 48995
2008-03-31 20:40:39 +00:00
Anton Korobeynikov
c41f5b6af4
Fix newly-introduced 4.3 warnings
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llvm-svn: 47375
2008-02-20 12:07:57 +00:00
Dan Gohman
cabaec582f
Rename MRegisterInfo to TargetRegisterInfo.
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llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Evan Cheng
705212577d
Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution.
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llvm-svn: 46609
2008-01-31 09:59:15 +00:00
Scott Michel
ab3702fba9
More cleanups for CellSPU:
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- Expand tabs... (poss 80-col violations, will get them later...)
- Consolidate logic for SelectDFormAddr and SelectDForm2Addr into a single
function, simplifying maintenance. Also reduced custom instruction
generation for SPUvecinsert/INSERT_MASK.
llvm-svn: 46544
2008-01-30 02:55:46 +00:00
Owen Anderson
f19692b2f6
Move even more functionality from MRegisterInfo into TargetInstrInfo.
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Some day I'll get it all moved over...
llvm-svn: 45672
2008-01-07 01:35:02 +00:00
Owen Anderson
e6856128ab
Move some more instruction creation methods from RegisterInfo into InstrInfo.
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llvm-svn: 45484
2008-01-01 21:11:32 +00:00
Owen Anderson
ae7e2c1e03
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
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Machine-level API cleanup instigated by Chris.
llvm-svn: 45470
2007-12-31 06:32:00 +00:00
Chris Lattner
96167aa93c
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
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that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
llvm-svn: 45467
2007-12-31 04:13:23 +00:00
Chris Lattner
9e5cc35593
Add new shorter predicates for testing machine operands for various types:
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e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
Chris Lattner
12477d46b4
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
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llvm-svn: 45453
2007-12-30 20:49:49 +00:00
Chris Lattner
ad9a6ccb83
Remove attribution from file headers, per discussion on llvmdev.
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llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Scott Michel
5cbdbd26a8
More working CellSPU tests:
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- vec_const.ll: Vector constant loads
- immed64.ll: i64, f64 constant loads
llvm-svn: 45242
2007-12-20 00:44:13 +00:00
Scott Michel
d4d96bb6f6
Add new immed16.ll test case, fix CellSPU errata to make test case work.
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llvm-svn: 45196
2007-12-19 07:35:06 +00:00
Scott Michel
4f980e1acd
- Restore some i8 functionality in CellSPU
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- New test case: nand.ll
llvm-svn: 45130
2007-12-17 22:32:34 +00:00
Evan Cheng
aecb76bcc2
Update foldMemoryOperand.
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llvm-svn: 44621
2007-12-05 18:36:37 +00:00
Evan Cheng
8464a0bf00
Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
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the stored register is killed.
llvm-svn: 44600
2007-12-05 03:14:33 +00:00
Scott Michel
8a2cb11b05
Updated source file headers to llvm coding standard.
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llvm-svn: 44597
2007-12-05 01:40:25 +00:00
Scott Michel
191775d31f
Main CellSPU backend files checked in. Intrinsics and autoconf files
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remain.
llvm-svn: 44595
2007-12-05 01:24:05 +00:00