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Commit Graph

122381 Commits

Author SHA1 Message Date
Sanjoy Das
a9789b67ff [OperandBundles] Add an accessor to get an operand bundle by tag
Not used at the moment, but will be used in a later change to
RewriteStatepointsForGC.

llvm-svn: 249510
2015-10-07 02:39:24 +00:00
Sanjoy Das
01d951e9b2 [OperandBundles] Remove a useless accessor from OperandBundleUser
Since the `const` version of `getOperandBundle` returns a value of the
same type as the non-`const` version, the non-`const` version is
redundant.

llvm-svn: 249509
2015-10-07 02:39:21 +00:00
Sanjoy Das
3621ece8f2 [RS4GC] Cosmetic cleanup, NFC
Summary:
A series of cosmetic cleanup changes to RewriteStatepointsForGC:

  - Rename variables to LLVM style
  - Remove some redundant asserts
  - Remove an unsued `Pass *` parameter
  - Remove unnecessary variables
  - Use C++11 idioms where applicable
  - Pass CallSite by value, not reference

Reviewers: reames, swaroop.sridhar

Subscribers: llvm-commits, sanjoy

Differential Revision: http://reviews.llvm.org/D13370

llvm-svn: 249508
2015-10-07 02:39:18 +00:00
Eric Christopher
f1cabed0b6 Remove the comdat-ness from the testcase as it won't lower properly
on darwin with it since darwin doesn't have comdat and it isn't
necessary for the testcase.

llvm-svn: 249504
2015-10-07 01:52:33 +00:00
Matt Arsenault
304de9ef09 AMDGPU: Add comment for VOP2b operand class
Because of the constant bus requirement, it is never legal to
use a literal constant for these instructions despite the encoding
allowing it. This was already doing the right thing, but note why.

llvm-svn: 249500
2015-10-07 01:36:00 +00:00
Eric Christopher
4bdf451af3 Update test to use FileCheck and clean up run lines to match the
expected behavior.

llvm-svn: 249498
2015-10-07 01:21:49 +00:00
Matt Arsenault
1bde052e2e AMDGPU: Properly register passes
llvm-svn: 249495
2015-10-07 00:42:53 +00:00
Matt Arsenault
28c28a361a AMDGPU: Use explicit register size indirect pseudos
This stops using an unknown reg class operand.

Currently build_vector selection has a broken looking check
where it tries to use a VGPR reg class and an SGPR one if it
sees an SGPR use.

With the source operand has an explicit VGPR class,
illegal copies will be inserted that SIFixSGPRCopies will take care
of normally later, which will allow removing the weird check
of build_vector users. Without this, when removed v_movrels_b32 would
still be emitted even though all of the values were only stored in
SGPRs.

llvm-svn: 249494
2015-10-07 00:42:51 +00:00
Matt Arsenault
3e5538c9ff AMDGPU: Remove inferRegClassFromUses / inferRegClassFromDefs
I'm not sure why this would be necessary, and no tests fail with
them removed. Looking at the uses is suspect as well because
the use reg classes will likely change when the users are moved
as a result of moving this instruction.

llvm-svn: 249493
2015-10-07 00:42:31 +00:00
Reid Kleckner
faee57dd2a [SEH] Add llvm.eh.exceptioncode intrinsic
This will support the Clang __exception_code intrinsic.

llvm-svn: 249492
2015-10-07 00:27:33 +00:00
Hans Wennborg
b27c6dcee4 InstCombine: Fold comparisons between unguessable allocas and other pointers
This will allow us to optimize code such as:

  int f(int *p) {
    int x;
    return p == &x;
  }

as well as:

  int *allocate(void);
  int f() {
    int x;
    int *p = allocate();
    return p == &x;
  }

The folding can only be done under certain circumstances. Even though p and &x
cannot alias, the comparison must still return true if the pointer
representations are equal. If a user successfully generates a p that's a
correct guess for &x, comparison should return true even though p is an invalid
pointer.

This patch argues that if the address of the alloca isn't observable outside the
function, the function can act as-if the address is impossible to guess from the
outside. The tricky part is keeping the act consistent: if we fold p == &x to
false in one place, we must make sure to fold any other comparisons based on
those pointers similarly. To ensure that, we only fold when &x is involved
exactly once in comparison instructions.

Differential Revision: http://reviews.llvm.org/D13358

llvm-svn: 249490
2015-10-07 00:20:07 +00:00
David Blaikie
145c8164ea Move test to X86-specific due to some IR invalid on other targets
llvm-svn: 249489
2015-10-07 00:17:31 +00:00
David Blaikie
bc555eb00b DebugInfo: Include the decl_line/decl_file in subprogram definitions if they differ from those in the declaration
This is handy for some AutoFDO stuff, and seems like a minor improvement
to correctness (otherwise a debug info consumer might think the decl
line/file of the def was the same as that of the declaration - though
what a consumer might use that for, I'm not sure - maybe "list <func>"
would've misbehaved with the old behavior?) and at a minor cost (in my
experiment, with fission, without type units, without compression, 0.01%
growth in debug info in the executable/objects, 0.02% growth in the .dwo
files).

llvm-svn: 249487
2015-10-07 00:04:16 +00:00
David Majnemer
ccf132c096 [WinEH] Create a separate MBB for funclet prologues
Our current emission strategy is to emit the funclet prologue in the
CatchPad's normal destination.  This is problematic because
intra-funclet control flow to the normal destination is not erroneous
and results in us reevaluating the prologue if said control flow is
taken.

Instead, use the CatchPad's location for the funclet prologue.  This
correctly models our desire to have unwind edges evaluate the prologue
but edges to the normal destination result in typical control flow.

Differential Revision: http://reviews.llvm.org/D13424

llvm-svn: 249483
2015-10-06 23:31:59 +00:00
Hans Wennborg
7d1f4ff326 Fix Clang-tidy modernize-use-nullptr warnings in source directories and generated files; other minor cleanups.
Patch by Eugene Zelenko!

Differential Revision: http://reviews.llvm.org/D13321

llvm-svn: 249482
2015-10-06 23:24:35 +00:00
Lang Hames
2edf58639e [Orc] Teach the CompileOnDemand layer to clone aliases.
This allows modules containing aliases to be lazily jit'd. Previously these
failed with missing symbol errors because the aliases weren't cloned from the
original module.

llvm-svn: 249481
2015-10-06 22:55:05 +00:00
Duncan P. N. Exon Smith
0a0d366dd5 IR: Use auto for iterators, NFC
llvm-svn: 249480
2015-10-06 22:37:47 +00:00
Kevin Enderby
d35f4170f8 Fix two bugs in llvm-objdump’s printing of Objective-C meta data
from malformed Mach-O files that caused crashes.

We recently got about 700 malformed Mach-O files which we have
been using the improve the robustness of tools that deal with reading
data from object files.  These resulted in about 20 small bug fixes to
the darwin based tools.

The goal here is to also improve the robustness of llvm-objdump and
this is the first two fixes.  In talking with Tim Northover the approach
we thought might be best is to:

1) Only include tests for the malformed Mach-O files that cause crashes
(not all 700+ tests).
2) The test should only contain the command line option that caused the
crash and not all the others that don’t matter.
3) There should be only one line for the FileCheck that is past the point
of the crash if possible and if possible indicates the malformation.

Again the goal is to fix crashes and not so much care about how the
printing of malformed data comes out.

Tim also suggested if we really wanted to add test cases for all 700+
malformed Mach-O files putting them in the regression tests might be
an option.  But many of these do not cause crashes.

llvm-svn: 249479
2015-10-06 22:27:08 +00:00
Duncan P. N. Exon Smith
31a36f151b IR: Remove unnecessary TraitsClass typedef, NFC
No classes are specializing the symbol table traits, so no need to look
through a typedef for class API.  Make a few more functions private
since only SymbolTableListTraits should be using them.

llvm-svn: 249476
2015-10-06 22:14:06 +00:00
Duncan P. N. Exon Smith
46a6922156 CodeGen: s/protected:/private:/ in MachineBasicBlock, NFC
Nothing inherits from `MachineBasicBlock`, so this should have no real
functionality change.  Just makes the code easier to understand.

llvm-svn: 249473
2015-10-06 21:48:31 +00:00
Sanjoy Das
f84d001cef [IndVars] Don't break dominance in eliminateIdentitySCEV
Summary:
After r249211, `getSCEV(X) == getSCEV(Y)` does not guarantee that X and
Y are related in the dominator tree, even if X is an operand to Y (I've
included a toy example in comments, and a real example as a test case).

This commit changes `SimplifyIndVar` to require a `DominatorTree`.  I
don't think this is a problem because `ScalarEvolution` requires it
anyway.

Fixes PR25051.

Depends on D13459.

Reviewers: atrick, hfinkel

Subscribers: joker.eph, llvm-commits, sanjoy

Differential Revision: http://reviews.llvm.org/D13460

llvm-svn: 249471
2015-10-06 21:44:49 +00:00
Sanjoy Das
a98f9cafc8 [IndVars] Extract out eliminateIdentitySCEV, NFC
Summary:
Reflow a comment while at it.

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D13459

llvm-svn: 249470
2015-10-06 21:44:39 +00:00
Duncan P. N. Exon Smith
e2bab51a0b IR: Remove unnecessary specialization of getSymTab(), NFC
The only specializations of `getSymTab()` were identical to the default
defined in `SymbolTableListTraits::getSymTab()`.  Remove the
specializations, and stop treating it like a configuration point.  Just
to be sure no one else accesses this, make it private.

llvm-svn: 249469
2015-10-06 21:31:07 +00:00
Tom Stellard
6c21c7bcdf AMDGPU/SI: Remove calling convention assertion from LowerFormalArguments()
Summary:
We currently ignore the calling convention, so there is no real reason to
assert on the calling convention of functions.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D13367

llvm-svn: 249468
2015-10-06 21:16:34 +00:00
Chad Rosier
31f20c1685 [ARM] Minor refactoring. NFC.
llvm-svn: 249465
2015-10-06 20:58:42 +00:00
Chad Rosier
c2608cb83b [ARM] Minor refactoring. NFC.
llvm-svn: 249464
2015-10-06 20:51:26 +00:00
Chad Rosier
35c6575947 [ARM] Minor refactoring. NFC.
llvm-svn: 249463
2015-10-06 20:45:45 +00:00
Vedant Kumar
1e03cc5880 [Function] Clean up {prefix,prologue} data routines (NFC)
Factor out some common code used to get+set function prefix/prologue
data. This may come in handy if we ever decide to store personality
functions in the same way we store prefix/prologue data.

Differential Revision: http://reviews.llvm.org/D13120

Reviewed-by: bogner
llvm-svn: 249460
2015-10-06 20:31:57 +00:00
Joseph Tremoulet
afc5b7d966 [WinEH] Implement state numbering for CoreCLR
Summary:
Assign one state number per handler/funclet, tracking parent state,
handler type, and catch type token.
State numbers are arranged such that ancestors have lower state numbers
than their descendants.

Reviewers: majnemer, andrew.w.kaylor, rnk

Subscribers: pgavlin, AndyAyers, llvm-commits

Differential Revision: http://reviews.llvm.org/D13450

llvm-svn: 249457
2015-10-06 20:30:33 +00:00
Joseph Tremoulet
d1c89447ca [WinEH] Recognize CoreCLR personality function
Summary:
 - Add CoreCLR to if/else ladders and switches as appropriate.
 - Rename isMSVCEHPersonality to isFuncletEHPersonality to better
   reflect what it captures.

Reviewers: majnemer, andrew.w.kaylor, rnk

Subscribers: pgavlin, AndyAyers, llvm-commits

Differential Revision: http://reviews.llvm.org/D13449

llvm-svn: 249455
2015-10-06 20:28:16 +00:00
Chad Rosier
881e383547 [ARM] Minor refactoring to improve readability. NFC.
llvm-svn: 249454
2015-10-06 20:23:42 +00:00
Philip Reames
ca99cf7d94 Extend known bits to understand @llvm.bswap
This is a cleaned up patch from the one written by John Regehr based on the findings of the Souper superoptimizer.

When writing tests, I was surprised to find that instsimplify apparently doesn't know how to collapse bit test sequences based purely on known bits. This required me to split my tests across both instsimplify and instcombine.

Differential Revision: http://reviews.llvm.org/D13250

llvm-svn: 249453
2015-10-06 20:20:45 +00:00
Philip Reames
dd55dd6aa8 Fix pr25040 - Handle vectors of i1s in recently added implication code
As mentioned in the bug, I'd missed the presence of a getScalarType in the caller of the new implies method. As a result, when we ended up with a implication over two vectors, we'd trip an assert and crash.

Differential Revision: http://reviews.llvm.org/D13441

llvm-svn: 249442
2015-10-06 19:00:02 +00:00
Duncan P. N. Exon Smith
b8e4e8fa60 IR: Use typedefs for getSublistAccess(), NFC
llvm-svn: 249439
2015-10-06 18:33:43 +00:00
Krzysztof Parzyszek
34d7d25a67 [Hexagon] Remove ZeroOrMore from option flags
llvm-svn: 249438
2015-10-06 18:29:36 +00:00
Chad Rosier
eac6012cbd [ARM] Simplify tests and make checks more rigid. NFC.
llvm-svn: 249432
2015-10-06 17:54:12 +00:00
Mehdi Amini
92479849da This patch builds on top of D13378 to handle constant condition.
With this patch, clang -O3 optimizes correctly providing > 1000x speedup on this artificial benchmark):

for (a=0; a<n; a++)
    for (b=0; b<n; b++)
        for (c=0; c<n; c++)
            for (d=0; d<n; d++)
                for (e=0; e<n; e++)
                    for (f=0; f<n; f++)
                        x++;
From test-suite/SingleSource/Benchmarks/Shootout/nestedloop.c

Reviewers: sanjoyd

Differential Revision: http://reviews.llvm.org/D13390

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 249431
2015-10-06 17:19:20 +00:00
Tom Stellard
0610aa5644 AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcp
Summary:
The assembly printing of these is still missing the encoding size
suffix, but this will be fixed in a later commit.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D13436

llvm-svn: 249424
2015-10-06 15:57:53 +00:00
Krzysztof Parzyszek
f0b61fb8a6 [Hexagon] Add an early if-conversion pass
llvm-svn: 249423
2015-10-06 15:49:14 +00:00
Daniel Sanders
6ec0cf9dc8 [mips][microMIPS] Fix an issue with selecting sqrt instruction in LLVM backend
Summary:
This fixes 7 tests during fast LLVM test-suite run:
* MultiSource/Benchmarks/McCat/18-imp/imp
* MultiSource/Applications/oggenc/oggenc
* MultiSource/Benchmarks/MallocBench/gs/gs
* MultiSource/Benchmarks/MiBench/automotive-susan/automotive-susan
* MultiSource/Benchmarks/VersaBench/beamformer/beamformer
* MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame
* MultiSource/Benchmarks/Bullet/bullet

Error message was in the form of:
fatal error: error in backend: Cannot select: 0x95c3288: f32 = fsqrt 0x95c0190 [ORD=9] [ID=18]
  0x95c0190: f32 = fadd 0x95bef30, 0x95c4d00 [ORD=8] [ID=17]
    0x95bef30: f32 = fmul 0x95c4988, 0x95c4988 [ORD=5] [ID=16]
...

There was problem with selecting sqrt instruction in LLVM backend.

To fix the issue changes are made in TableGen definition for sqrt instruction in MipsInstrFPU.td and new test file sqrt.ll is added to LLVM regression tests.

Patch by Zlatko Buljan

Reviewers: zoran.jovanovic, hvarga, dsanders

Subscribers: llvm-commits, petarj

Differential Revision: http://reviews.llvm.org/D13235

llvm-svn: 249416
2015-10-06 15:17:25 +00:00
Daniel Sanders
c71d2c81d3 Revert r249123 - [mips][microMIPS] Fix an issue with selecting sqrt instruction in LLVM backend
The author was not credited and most of the commit message is missing. Will re-commit with this fixed.

llvm-svn: 249415
2015-10-06 15:13:16 +00:00
Arnaud A. de Grandmaison
d7aafd4780 [EarlyCSE] Constify ParseMemoryInst methods (NFC).
llvm-svn: 249400
2015-10-06 13:35:30 +00:00
Filipe Cabecinhas
58b77fabdc Make sure the CastInst is valid before trying to create it
Bug found with afl-fuzz.

llvm-svn: 249396
2015-10-06 12:37:54 +00:00
Andrea Di Biagio
e88e150aaa [InstCombine] Teach SimplifyDemandedVectorElts how to handle ConstantVector select masks with ConstantExpr elements (PR24922)
If the mask of a select instruction is a ConstantVector, method
SimplifyDemandedVectorElts iterates over the mask elements to identify which
values are selected from the select inputs.

Before this patch, method SimplifyDemandedVectorElts always used method
Constant::isNullValue() to check if a value in the mask was zero. Unfortunately
that method always returns false when called on a ConstantExpr.

This patch fixes the problem in SimplifyDemandedVectorElts by adding an explicit
check for ConstantExpr values. Now, if a value in the mask is a ConstantExpr, we
avoid calling isNullValue() on it.

Fixes PR24922.

Differential Revision: http://reviews.llvm.org/D13219

llvm-svn: 249390
2015-10-06 10:34:53 +00:00
Daniel Sanders
d77d130fed [mips][disassembler] Changed CHECK-EB directives to CHECK so div/divu are tested.
llvm-svn: 249386
2015-10-06 10:08:14 +00:00
Daniel Sanders
5ce8a5599d [mips][disassembler] Merged disassembler tests into the corresponding ISA/ASE subdirectories.
llvm-svn: 249384
2015-10-06 10:02:35 +00:00
Daniel Sanders
6755d1473e [mips][disassembler] Moved DSP tests into proper place and corrected formatting.
llvm-svn: 249383
2015-10-06 09:28:48 +00:00
Craig Topper
bab6bd6d80 [TwoAddressInstructionPass] When looking for a 3 addr conversion after commuting, make sure regB has been updated to take into account the commute.
llvm-svn: 249378
2015-10-06 05:39:59 +00:00
Alexei Starovoitov
2aa98cf3bd [bpf] Avoid extra pointer arithmetic for stack access
For the program like below
struct key_t {
  int pid;
  char name[16];
};
extern void test1(char *);
int test() {
  struct key_t key = {};
  test1(key.name);
  return 0;
}
For key.name, the llc/bpf may generate the below code:
  R1 = R10  // R10 is the frame pointer
  R1 += -24 // framepointer adjustment
  R1 |= 4   // R1 is then used as the first parameter of test1
OR operation is not recognized by in-kernel verifier.

This patch introduces an intermediate FI_ri instruction and
generates the following code that can be properly verified:
  R1 = R10
  R1 += -20

Patch by Yonghong Song <yhs@plumgrid.com>

llvm-svn: 249371
2015-10-06 04:00:53 +00:00
Craig Topper
a4f530a18c [X86] Teach constant hoisting that ANDs with 64-bit immediates in the range 0x80000000-0xffffffff can be handled cheaply and don't need to be hoisted.
Most importantly, this keeps constant hoisting from preventing instruction selections ability to turn an AND with 0xffffffff into a move into a 32-bit subregister.

llvm-svn: 249370
2015-10-06 02:50:24 +00:00