Chris Lattner
c4b9cff1f9
switch these back to the 'bad old way'
...
llvm-svn: 31774
2006-11-16 00:33:34 +00:00
Evan Cheng
43ba439abd
Fix an incorrectly inverted condition.
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llvm-svn: 31773
2006-11-16 00:08:20 +00:00
Evan Cheng
40fe5349ea
ChangeToRegister should clear IsImp bit.
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llvm-svn: 31772
2006-11-15 23:55:03 +00:00
Chris Lattner
f505815dad
Fix ppc64 epilog bug.
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llvm-svn: 31771
2006-11-15 23:35:30 +00:00
Chris Lattner
bd95b9d4ae
Stop using isTwoAddress, switching to operand constraints instead.
...
Tell the codegen emitter that specific operands are not to be encoded, fixing
JIT regressions w.r.t. pre-inc loads and stores (e.g. lwzu, which we generate
even when general preinc loads are not enabled).
llvm-svn: 31770
2006-11-15 23:24:18 +00:00
Chris Lattner
4a2af4e374
Remove the isTwoAddress property from the CodeGenInstruction class. It should
...
not be used for anything other than backwards compat constraint handling.
Add support for a new DisableEncoding property which contains a list of
registers that should not be encoded by the generated code emitter. Convert
the codeemitter generator to use this, fixing some PPC JIT regressions.
llvm-svn: 31769
2006-11-15 23:23:02 +00:00
Chris Lattner
1158705ea7
add a new field needed by the code emitter generator.
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llvm-svn: 31768
2006-11-15 22:55:04 +00:00
Chris Lattner
aeddf14f03
Fix typo pointed out by Bryan Adams
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llvm-svn: 31766
2006-11-15 21:04:15 +00:00
Evan Cheng
2a92afa25d
Properly transfer kill / dead info.
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llvm-svn: 31765
2006-11-15 20:58:11 +00:00
Evan Cheng
1b3bde1c1b
Kill / dead info has been moved to MI's.
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llvm-svn: 31764
2006-11-15 20:56:39 +00:00
Evan Cheng
4625504fa4
commuteInstruction should propagate kill / dead info.
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llvm-svn: 31763
2006-11-15 20:56:03 +00:00
Evan Cheng
3ba3e10448
Match live variable changes.
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llvm-svn: 31762
2006-11-15 20:55:15 +00:00
Evan Cheng
cf45b9fa95
Minor updates.
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llvm-svn: 31761
2006-11-15 20:54:29 +00:00
Evan Cheng
7b19d271c4
A register def can be partially dead when the whole register has use(s) but a subreg does not.
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llvm-svn: 31760
2006-11-15 20:54:11 +00:00
Evan Cheng
d79427b22c
Do away with kill / dead maps. Move kill / dead info onto MI's.
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llvm-svn: 31759
2006-11-15 20:51:59 +00:00
Evan Cheng
21b524d10f
Add copyKillDeadInfo to copy kill / dead info; other minor updates.
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llvm-svn: 31758
2006-11-15 20:48:17 +00:00
Chris Lattner
9bc55a6c38
fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri
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addrmodes.
llvm-svn: 31757
2006-11-15 19:55:13 +00:00
Devang Patel
6060a1e3dc
Add run(Function &F) support in FunctionPassManager_New
...
llvm-svn: 31756
2006-11-15 19:39:54 +00:00
Chris Lattner
ccbbe940eb
Simplify IntrinsicLowering and clarify that it is only for use by the
...
CBE and interpreter.
llvm-svn: 31755
2006-11-15 18:00:10 +00:00
Chris Lattner
1453db28c3
Remove unneeded forward decls
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llvm-svn: 31754
2006-11-15 17:53:13 +00:00
Chris Lattner
286bb6e482
remove dead #include
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llvm-svn: 31753
2006-11-15 17:51:15 +00:00
Chris Lattner
2f520b36ba
Fix the PPC regressions last night
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llvm-svn: 31752
2006-11-15 17:40:51 +00:00
Chris Lattner
0a2d29b345
Fix a gcc 4.2 warning.
...
llvm-svn: 31751
2006-11-15 04:53:24 +00:00
Reid Spencer
aea6da0b13
Add a method to get the bit width of a packed type.
...
llvm-svn: 31750
2006-11-15 03:02:41 +00:00
Chris Lattner
6d5a509e34
Switch loads over to use memri as the operand instead of a reg/imm operand
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pair for cleanliness. Add instructions for PPC32 preinc-stores with commented
out patterns. More improvement is needed to enable the patterns, but we're
getting close.
llvm-svn: 31749
2006-11-15 02:43:19 +00:00
Chris Lattner
efcd65f335
ADd support for adding constraints to suboperands
...
llvm-svn: 31748
2006-11-15 02:38:17 +00:00
Devang Patel
cb9cd60f59
Add doInitialization and doFinalization support in FunctionManager_New.
...
llvm-svn: 31747
2006-11-15 02:07:25 +00:00
Devang Patel
c252225cec
Tidy up marking of last analysis user pass.
...
llvm-svn: 31746
2006-11-15 01:48:14 +00:00
Devang Patel
343e099f5d
Add doInitialization and doFinalization support in FunctionManager_New.
...
llvm-svn: 31745
2006-11-15 01:27:05 +00:00
Devang Patel
55ee589fb9
Do not derive CommonPassManagerImpl from Pass.
...
Now BasicBlockPassManager_New is a FunctionPass,
FunctionPassManager_New is a ModulePass
llvm-svn: 31744
2006-11-15 01:11:27 +00:00
Chris Lattner
1c86ab0ffe
restore some 'magic' code that I removed: it is needed. Add comments explaining
...
why.
llvm-svn: 31743
2006-11-14 22:17:10 +00:00
Chris Lattner
927a143285
minimal hack to get patterns whose result type is iPTR to be selected.
...
llvm-svn: 31742
2006-11-14 21:50:27 +00:00
Devang Patel
4f5849544b
Copy initializeAnalysisImpl() implementation from PassManagerT.
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Update LastUser to recursively walk required transitive set.
llvm-svn: 31741
2006-11-14 21:49:36 +00:00
Chris Lattner
1cbfe99b60
remove some dead code
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llvm-svn: 31740
2006-11-14 21:41:35 +00:00
Chris Lattner
7e5cbf9ee0
Add support for nodes that return iPTR.
...
llvm-svn: 31739
2006-11-14 21:32:01 +00:00
Chris Lattner
03cc8c84ef
changes to get ptr_rc to be accepted in patterns. This is needed for ppc preinc
...
stores.
llvm-svn: 31738
2006-11-14 21:18:40 +00:00
Evan Cheng
7c9b3c7ea3
Revert. This wasn't meant to be checked in.
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llvm-svn: 31737
2006-11-14 19:20:33 +00:00
Chris Lattner
55c68f61a7
group load and store instructions together. No functionality change.
...
llvm-svn: 31736
2006-11-14 19:19:53 +00:00
Chris Lattner
6c55120e31
Fix predicates for unindexed stores so they don't accidentally match indexed
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stores.
llvm-svn: 31735
2006-11-14 19:13:39 +00:00
Chris Lattner
dc48b6a77c
Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls
...
clobber. This allows LR8 to be save/restored correctly as a 64-bit quantity,
instead of handling it as a 32-bit quantity. This unbreaks ppc64 codegen when
the code is actually located above the 4G boundary.
llvm-svn: 31734
2006-11-14 18:44:47 +00:00
Chris Lattner
10b528d5c3
remove a ton of custom selection logic no longer needed
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llvm-svn: 31733
2006-11-14 18:43:11 +00:00
Chris Lattner
796d72272b
Fix a bug handling nodes with variable arguments. The code was fixed to assume
...
that there were two input operands before the variable operand portion. This
*happened* to be true for all call instructions, which took a chain and a
destination, but was not true for the PPC BCTRL instruction, whose destination
is implicit.
Making this code more general allows elimination of the custom selection logic
for BCTRL.
llvm-svn: 31732
2006-11-14 18:41:38 +00:00
Chris Lattner
da103686a6
it would be nice of ctlz were lowered to bsf etc.
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llvm-svn: 31730
2006-11-14 08:08:46 +00:00
Chris Lattner
0114b0c20e
implement InstCombine/shift-simplify.ll by transforming:
...
(X >> Z) op (Y >> Z) -> (X op Y) >> Z
for all shifts and all ops={and/or/xor}.
llvm-svn: 31729
2006-11-14 07:46:50 +00:00
Chris Lattner
e9245afa13
new testcase
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llvm-svn: 31728
2006-11-14 07:45:36 +00:00
Chris Lattner
616335f272
implement InstCombine/and-compare.ll:test1. This compiles:
...
typedef struct { unsigned prefix : 4; unsigned code : 4; unsigned unsigned_p : 4; } tree_common;
int foo(tree_common *a, tree_common *b) { return a->code == b->code; }
into:
_foo:
movl 4(%esp), %eax
movl 8(%esp), %ecx
movl (%eax), %eax
xorl (%ecx), %eax
# TRUNCATE movb %al, %al
shrb $4, %al
testb %al, %al
sete %al
movzbl %al, %eax
ret
instead of:
_foo:
movl 8(%esp), %eax
movb (%eax), %al
shrb $4, %al
movl 4(%esp), %ecx
movb (%ecx), %cl
shrb $4, %cl
cmpb %al, %cl
sete %al
movzbl %al, %eax
ret
saving one cycle by eliminating a shift.
llvm-svn: 31727
2006-11-14 06:06:06 +00:00
Chris Lattner
9cda3e7e77
new testcase
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llvm-svn: 31726
2006-11-14 06:04:35 +00:00
Chris Lattner
e3a81b796c
lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead of
...
'(shr (ctlz (sub Y, Z)), 5)'.
The use of xor better exposes the operation to bit-twiddling logic in the
dag combiner. For example, this:
typedef struct {
unsigned prefix : 4;
unsigned code : 4;
unsigned unsigned_p : 4;
} tree_common;
int foo(tree_common *a, tree_common *b) {
return a->code == b->code;
}
Now compiles to:
_foo:
lwz r2, 0(r4)
lwz r3, 0(r3)
xor r2, r3, r2
rlwinm r2, r2, 28, 28, 31
cntlzw r2, r2
srwi r3, r2, 5
blr
instead of:
_foo:
lbz r2, 3(r4)
lbz r3, 3(r3)
srwi r2, r2, 4
srwi r3, r3, 4
subf r2, r2, r3
cntlzw r2, r2
srwi r3, r2, 5
blr
saving a cycle.
llvm-svn: 31725
2006-11-14 05:28:08 +00:00
Andrew Lenharth
6bf99e12a8
A shim over other AA impls to catch incorrect uses
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llvm-svn: 31724
2006-11-14 05:21:04 +00:00
Reid Spencer
f65a8539ec
Discard code that supported old bytecode formats. This makes the Bytecode
...
Reader code much easier to read and maintain. Backwards compatibility from
version 5 format has been retained. Older formats will produce an error.
llvm-svn: 31723
2006-11-14 04:47:22 +00:00