John Thompson
6115a7f1d4
Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
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llvm-svn: 117667
2010-10-29 17:29:13 +00:00
Jim Grosbach
df2ff926a6
Make <target>CodeEmitter::getBinaryCodeForInstr() a const method.
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llvm-svn: 116018
2010-10-08 00:21:28 +00:00
Evan Cheng
39c462b4f1
Add support to model pipeline bypass / forwarding.
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llvm-svn: 115005
2010-09-28 23:50:49 +00:00
Oscar Fuentes
eb27a44982
Removed a bunch of unnecessary target_link_libraries.
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llvm-svn: 114999
2010-09-28 22:39:14 +00:00
Chris Lattner
8cdc5e75f7
update a bunch of code to use the MachinePointerInfo version of getStore.
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llvm-svn: 114461
2010-09-21 18:41:36 +00:00
Chris Lattner
86b3f287ce
eliminate an old SelectionDAG::getTruncStore method, propagating
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MachinePointerInfo around more.
llvm-svn: 114452
2010-09-21 17:42:31 +00:00
Chris Lattner
cdfd993df0
propagate MachinePointerInfo through various uses of the old
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SelectionDAG::getExtLoad overload, and eliminate it.
llvm-svn: 114446
2010-09-21 17:04:51 +00:00
Chris Lattner
4320dda4fb
convert the targets off the non-MachinePointerInfo of getLoad.
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llvm-svn: 114410
2010-09-21 06:44:06 +00:00
NAKAMURA Takumi
cfded91183
AlphaSchedule.td: 7bit-ize.
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llvm-svn: 114173
2010-09-17 09:56:43 +00:00
Chris Lattner
8df3ffd7ac
zap dead code.
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llvm-svn: 113073
2010-09-04 18:12:00 +00:00
Jim Grosbach
2b81a07dc7
Simplify eliminateFrameIndex() interface back down now that PEI doesn't need
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to try to re-use scavenged frame index reference registers. rdar://8277890
llvm-svn: 112241
2010-08-26 23:32:16 +00:00
Chris Lattner
0a9bda3bde
remove some dead code.
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llvm-svn: 111345
2010-08-18 02:42:11 +00:00
Owen Anderson
f2fea95f2f
Reapply r110396, with fixes to appease the Linux buildbot gods.
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llvm-svn: 110460
2010-08-06 18:33:48 +00:00
Owen Anderson
aadd8a89ca
Revert r110396 to fix buildbots.
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llvm-svn: 110410
2010-08-06 00:23:35 +00:00
Owen Anderson
b9762c07cb
Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
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ID member as the sole unique type identifier. Clean up APIs related to this change.
llvm-svn: 110396
2010-08-05 23:42:04 +00:00
Eli Friedman
3c5289c381
PR7774: Fix undefined shifts in Alpha backend. As a bonus, this actually
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improves the generated code in some cases.
llvm-svn: 109985
2010-08-01 21:13:28 +00:00
Jakob Stoklund Olesen
44949b2e1b
Remove the isMoveInstr() hook.
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llvm-svn: 108567
2010-07-16 22:35:46 +00:00
Benjamin Kramer
da3e6cdb26
Don't pass StringRef by reference.
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llvm-svn: 108366
2010-07-14 22:38:02 +00:00
Jakob Stoklund Olesen
7af3eff94d
RISC architectures get their memory operand folding for free.
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The only folding these load/store architectures can do is converting COPY into a
load or store, and the target independent part of foldMemoryOperand already
knows how to do that.
llvm-svn: 108099
2010-07-11 19:19:13 +00:00
Jakob Stoklund Olesen
0fc69a96b7
Replace copyRegToReg with copyPhysReg for Alpha.
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llvm-svn: 108065
2010-07-11 01:08:23 +00:00
Jakob Stoklund Olesen
b1c6191d3b
Use COPY in targets
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llvm-svn: 108063
2010-07-10 22:43:03 +00:00
Evan Cheng
22b3e8f3b1
Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake.
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llvm-svn: 107820
2010-07-07 22:15:37 +00:00
Dan Gohman
c768525273
Split the SDValue out of OutputArg so that SelectionDAG-independent
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code can do calling-convention queries. This obviates OutputArgReg.
llvm-svn: 107786
2010-07-07 15:54:55 +00:00
Devang Patel
7ab104353b
Propagate debug loc.
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llvm-svn: 107710
2010-07-06 22:08:15 +00:00
Dan Gohman
808f334f79
Reapply r107655 with fixes; insert the pseudo instruction into
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the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.
llvm-svn: 107691
2010-07-06 20:24:04 +00:00
Dan Gohman
4d264f7e51
Revert r107655.
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llvm-svn: 107668
2010-07-06 15:49:48 +00:00
Dan Gohman
6a73079aba
Fix a bunch of custom-inserter functions to handle the case where
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the pseudo instruction is not at the end of the block.
llvm-svn: 107655
2010-07-06 15:18:19 +00:00
Evan Cheng
47f3a2db40
Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false.
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llvm-svn: 107550
2010-07-03 00:40:23 +00:00
Eric Christopher
f0e2a62b21
Remove isTwoAddress from Alpha.
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llvm-svn: 106445
2010-06-21 18:48:55 +00:00
Stuart Hastings
bd7194d21c
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
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addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
llvm-svn: 106243
2010-06-17 22:43:56 +00:00
Rafael Espindola
9113809536
cleanup
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llvm-svn: 105322
2010-06-02 13:53:17 +00:00
Dan Gohman
8a798dcca9
BR is a barrier.
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llvm-svn: 103826
2010-05-14 22:00:27 +00:00
Dan Gohman
fb6f4da0e0
Implement a bunch more TargetSelectionDAGInfo infrastructure.
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Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.
llvm-svn: 103481
2010-05-11 17:31:57 +00:00
Dan Gohman
497e752655
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
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doesn't have to guess.
llvm-svn: 103194
2010-05-06 20:33:48 +00:00
Evan Cheng
80f3051bb7
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
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llvm-svn: 103193
2010-05-06 19:06:44 +00:00
Dan Gohman
87a1315fce
No-ops emitted for scheduling don't correspond with anything in the
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user's source, so don't arbitrarily assign them a debug location.
llvm-svn: 103121
2010-05-05 20:58:01 +00:00
Dan Gohman
68f04d06c8
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
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changes before doing phi lowering for switches.
llvm-svn: 102809
2010-05-01 00:01:06 +00:00
Dan Gohman
9281e7be3e
Fix a typo.
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llvm-svn: 102799
2010-04-30 22:38:11 +00:00
Devang Patel
00f63442db
Use MachineOperand::is* predicates.
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llvm-svn: 102472
2010-04-27 22:24:37 +00:00
Anton Korobeynikov
e325c693a5
Make processor FUs unique for given itinerary. This extends the limit of 32
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FU per CPU arch to 32 per intinerary allowing precise modelling of quite
complex pipelines in the future.
llvm-svn: 101754
2010-04-18 20:31:01 +00:00
Dan Gohman
6065ff317b
Delete now-unnecessary const_casts.
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llvm-svn: 101637
2010-04-17 15:32:28 +00:00
Dan Gohman
a0f855157e
Use const qualifiers with TargetLowering. This eliminates several
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const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
llvm-svn: 101635
2010-04-17 15:26:15 +00:00
Dan Gohman
5c8db5ab3f
Move per-function state out of TargetLowering subclasses and into
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MachineFunctionInfo subclasses.
llvm-svn: 101634
2010-04-17 14:41:14 +00:00
Dan Gohman
982923742d
Add skeleton target-specific SelectionDAGInfo files.
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llvm-svn: 101564
2010-04-16 23:04:22 +00:00
Dan Gohman
0e0b8cf9fd
Add const qualifiers to CodeGen's use of LLVM IR constructs.
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llvm-svn: 101334
2010-04-15 01:51:59 +00:00
Benjamin Kramer
0fb23008bb
Use twines to simplify calls to report_fatal_error. For code size and readability.
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llvm-svn: 100756
2010-04-08 10:44:28 +00:00
Chris Lattner
80b41881bc
rename llvm::llvm_report_error -> llvm::report_fatal_error
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llvm-svn: 100709
2010-04-07 22:58:41 +00:00
Chris Lattner
74ce04b9bc
prune some #includes.
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llvm-svn: 100399
2010-04-05 04:04:10 +00:00
Jakob Stoklund Olesen
4c043c50fd
Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.
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When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.
This works well because TableGen resolves member references late:
class I : Instruction {
AddrMode AM = AddrModeNone;
let TSFlags{3-0} = AM.Value;
}
let AM = AddrMode4 in
def ADD : I;
TSFlags gets the expected bits from AddrMode4 in this example.
llvm-svn: 100384
2010-04-05 03:10:20 +00:00
Chris Lattner
3eaaa7bb6c
Momentous day: remove the "O" member from AsmPrinter. Now all
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"asm printering" happens through MCStreamer. This also
Streamerizes PIC16 debug info, which escaped my attention.
This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.
llvm-svn: 100327
2010-04-04 08:18:47 +00:00