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8923 Commits

Author SHA1 Message Date
Bob Wilson
df432a30b2 Revert 96634. It causes assertion failures for 126.gcc and 176.gcc in
the armv6 nightly tests.

llvm-svn: 96691
2010-02-19 18:59:53 +00:00
Charles Davis
a64fc8c41b Add support for the 'alignstack' attribute to the x86 backend. Fixes PR5254.
Also, FileCheck'ize a test.

llvm-svn: 96686
2010-02-19 18:17:13 +00:00
Bob Wilson
c03fbf812d Revert Anton's most recent EH patch (r96637), since it breaks a lot of
ARM and Thumb tests.

llvm-svn: 96680
2010-02-19 17:10:59 +00:00
Duncan Sands
5d5cce2e19 Revert commits 96556 and 96640, because commit 96556 breaks the
dragonegg self-host build.  I reverted 96640 in order to revert
96556 (96640 goes on top of 96556), but it also looks like with
both of them applied the breakage happens even earlier.  The
symptom of the 96556 miscompile is the following crash:

  llvm[3]: Compiling AlphaISelLowering.cpp for Release build
  cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed.
  Stack dump:
  0.	Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE'
  g++: Internal error: Aborted (program cc1plus)

This occurs when building LLVM using LLVM built by LLVM (via
dragonegg).  Probably LLVM has miscompiled itself, though it
may have miscompiled GCC and/or dragonegg itself: at this point
of the self-host build, all of GCC, LLVM and dragonegg were built
using LLVM.  Unfortunately this kind of thing is extremely hard
to debug, and while I did rummage around a bit I didn't find any
smoking guns, aka obviously miscompiled code.

Found by bisection.

r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines

Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"

r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines

Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.

e.g. On x86_64
  %0 = icmp eq i32 %x, 0
  %1 = icmp eq i32 %y, 0
  %2 = xor i1 %1, %0
  br i1 %2, label %bb, label %return
=>
	testl   %edi, %edi
	sete    %al
	testl   %esi, %esi
	sete    %cl
	cmpb    %al, %cl
	je      LBB1_2

llvm-svn: 96672
2010-02-19 11:30:41 +00:00
Evan Cheng
32031f7404 Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.

e.g. On x86_64
  %0 = icmp eq i32 %x, 0
  %1 = icmp eq i32 %y, 0
  %2 = xor i1 %1, %0
  br i1 %2, label %bb, label %return
=>
	testl   %edi, %edi
	sete    %al
	testl   %esi, %esi
	sete    %cl
	cmpb    %al, %cl
	je      LBB1_2

llvm-svn: 96640
2010-02-19 00:34:39 +00:00
Anton Korobeynikov
8aaa04a614 Use the same encoding for EH stuff uniformly on all MachO targets.
This hopefulyl should unbreak EH on PPC/Darwin.

llvm-svn: 96637
2010-02-19 00:29:36 +00:00
Jim Grosbach
53ef05fa82 Radar 7636153. In the presence of large call frames, it's not sufficient
for ARM to just check if a function has a FP to determine if it's safe
to simplify the stack adjustment pseudo ops prior to eliminating frame
indices. Allow targets to override the default behavior and does so for ARM
and Thumb2.

llvm-svn: 96634
2010-02-19 00:16:24 +00:00
Jakob Stoklund Olesen
5b9d14b55e Always normalize spill weights, also for intervals created by spilling.
Moderate the weight given to very small intervals.

The spill weight given to new intervals created when spilling was not
normalized in the same way as the original spill weights calculated by
CalcSpillWeights. That meant that restored registers would tend to hang around
because they had a much higher spill weight that unspilled registers.

This improves the runtime of a few tests by up to 10%, and there are no
significant regressions.

llvm-svn: 96613
2010-02-18 21:33:05 +00:00
Dan Gohman
34b5cb7deb Make CodePlacementOpt detect special EH control flow by
checking whether AnalyzeBranch disagrees with the CFG
directly, rather than looking for EH_LABEL instructions.
EH_LABEL instructions aren't always at the end of the
block, due to FP_REG_KILL and other things. This fixes
an infinite loop compiling MultiSource/Benchmarks/Bullet.

llvm-svn: 96611
2010-02-18 21:25:53 +00:00
Duncan Sands
b7bb8ab12e Uniformize the way these options are printed. Requested by
Russell Wallace.

llvm-svn: 96580
2010-02-18 14:37:52 +00:00
Duncan Sands
80083e741f Remove terminating dot in description. Inconsistency pointed
out by Russell Wallace.

llvm-svn: 96579
2010-02-18 14:10:41 +00:00
Evan Cheng
9af06dfc83 Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"

llvm-svn: 96556
2010-02-18 02:13:50 +00:00
David Greene
d93fb1f15d Make the non-temporal bit "significant" in MemSDNodes so they aren't
CSE'd or otherwise combined with temporal MemSDNodes.

llvm-svn: 96505
2010-02-17 20:21:42 +00:00
Jakob Stoklund Olesen
e7862f29ec Dead code elimination.
llvm-svn: 96496
2010-02-17 19:13:56 +00:00
Chris Lattner
2ec1f1a54a move isOnlyReachableByFallthrough out of MachineBasicBlock into AsmPrinter,
and add a sparc implementation that knows about delay slots.  Patch by
Nathan Keynes!

llvm-svn: 96492
2010-02-17 18:52:56 +00:00
Chris Lattner
955ce23e27 sink special case "cannotyetselect" for intrinsics out of the
tblgen splatted code into the implementation.

llvm-svn: 96460
2010-02-17 06:28:22 +00:00
Lang Hames
b477072a21 Removed an early out which was causing the PBQP allocator to not compute live-in sets or run the rewriter.
llvm-svn: 96450
2010-02-17 03:42:51 +00:00
Devang Patel
0f421b8fc5 Before setting scope end marker, pay attention to scope begin marker and existing scope end marker, if any. Scope must begin before it ends and nested inlined scope do not truncate surrounding scope.
llvm-svn: 96445
2010-02-17 02:20:34 +00:00
Duncan Sands
1b33dd3c83 There are two ways of checking for a given type, for example isa<PointerType>(T)
and T->isPointerTy().  Convert most instances of the first form to the second form.
Requested by Chris.

llvm-svn: 96344
2010-02-16 11:11:14 +00:00
Dale Johannesen
622053fec3 Handle DBG_VALUE mixed with labels when doing PHI
elimination.  Before a DBG_VALUE could affect codegen.
The solution here is imperfect and not final.

llvm-svn: 96318
2010-02-16 01:57:28 +00:00
Dale Johannesen
b410c3010b Reapply 96294; now that I've gotten around to looking
at older buildbot messages, I see the failure predates
this patch.

llvm-svn: 96307
2010-02-16 01:27:47 +00:00
Dale Johannesen
df6f49fc2d Something broke. Hard to believe it was this patch
but it's harder to believe it's the other candidate,
so reverting.  Temporarily I hope.

llvm-svn: 96303
2010-02-16 00:43:58 +00:00
Evan Cheng
df9a8c9d49 Fix a memory leak. Patch by Nicolas Geoffray.
llvm-svn: 96295
2010-02-15 23:16:53 +00:00
Dale Johannesen
16ec2c06bc More handling of DBG_VALUE.
llvm-svn: 96294
2010-02-15 23:05:03 +00:00
Anton Korobeynikov
56e593f08e Add missed entry to cmake build list file
llvm-svn: 96292
2010-02-15 22:55:13 +00:00
Anton Korobeynikov
26310a84b1 Use ttype encoding consistently
llvm-svn: 96290
2010-02-15 22:38:25 +00:00
Anton Korobeynikov
ef1862e256 Move TLOF implementations to libCodegen to resolve layering violation.
llvm-svn: 96288
2010-02-15 22:37:53 +00:00
Anton Korobeynikov
559e34c5fc It turns out that we emitted completely wrong common EH frame since the early beginning! The "z" CIE augmentation mark indicates that there is an extra word containing the size of augmentation section. However, even for frames w/o any augmentation data we emitted size uleb! (this is the case of "unwinding through C code"). Thus frame moves information was emitterd completely wrong.
llvm-svn: 96287
2010-02-15 22:36:41 +00:00
Anton Korobeynikov
dccd240998 Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there
llvm-svn: 96285
2010-02-15 22:35:59 +00:00
Jakob Stoklund Olesen
143339a43a Fix PR6300.
A virtual register can be used before it is defined in the same MBB if the MBB
is part of a loop. Teach the implicit-def pass about this case.

llvm-svn: 96279
2010-02-15 22:03:29 +00:00
Evan Cheng
b5fe25544c Split SelectionDAGISel::IsLegalAndProfitableToFold to
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.

This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.

llvm-svn: 96255
2010-02-15 19:41:07 +00:00
David Greene
4f983d569c Add non-temporal flags and remove an assumption of default arguments.
llvm-svn: 96240
2010-02-15 17:00:31 +00:00
David Greene
0ed0396052 Add non-temporal flags to MachineMemOperand.
llvm-svn: 96226
2010-02-15 16:48:31 +00:00
Duncan Sands
2acaf3609c Uniformize the names of type predicates: rather than having isFloatTy and
isInteger, we now have isFloatTy and isIntegerTy.  Requested by Chris!

llvm-svn: 96223
2010-02-15 16:12:20 +00:00
Dale Johannesen
c23d94e163 Ignore DBG_VALUE in a couple more places.
llvm-svn: 96207
2010-02-15 01:45:47 +00:00
Jakob Stoklund Olesen
0a65533a38 Fix PR6283.
When coalescing with a physreg, remember to add imp-def and imp-kill when
dealing with sub-registers.

Also fix a related bug in VirtRegRewriter where substitutePhysReg may
reallocate the operand list on an instruction and invalidate the reg_iterator.
This can happen when a register is mentioned twice on the same instruction.

llvm-svn: 96072
2010-02-13 02:06:10 +00:00
Evan Cheng
6eb7ff5bbf Teach MachineFrameInfo to track maximum alignment while stack objects are being
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.

llvm-svn: 96069
2010-02-13 01:56:41 +00:00
Bob Wilson
5d66f81412 Besides removing phi cycles that reduce to a single value, also remove dead
phi cycles.  Adjust a few tests to keep dead instructions from being optimized
away.  This (together with my previous change for phi cycles) fixes Apple
radar 7627077.

llvm-svn: 96057
2010-02-13 00:31:44 +00:00
Chris Lattner
946403d05f give MCCodeEmitters access to the current MCContext.
llvm-svn: 96038
2010-02-12 23:12:47 +00:00
Dale Johannesen
c7b5b1dcfa Rewrite handling of DBG_VALUE; previous algorithm
didn't handle
X =
Y<dead> = use X
DBG_VALUE(X)
I was hoping to avoid this approach as it's slower,
but I don't think it can be done.

llvm-svn: 95996
2010-02-12 18:40:17 +00:00
Dan Gohman
c40eb525ad Reapply the new LoopStrengthReduction code, with compile time and
bug fixes, and with improved heuristics for analyzing foreign-loop
addrecs.

This change also flattens IVUsers, eliminating the stride-oriented
groupings, which makes it easier to work with.

llvm-svn: 95975
2010-02-12 10:34:29 +00:00
Lang Hames
46f6d32509 * Updated the cost matrix normalization proceedure to better handle infinite costs.
* Enabled R1/R2 application for nodes with infinite spill costs in the Briggs heuristic (made
safe by the changes to the normalization proceedure).
* Removed a redundant header.

llvm-svn: 95973
2010-02-12 09:43:37 +00:00
Bob Wilson
2fd80c3d94 Add a new pass on machine instructions to optimize away PHI cycles that
reduce down to a single value.  InstCombine already does this transformation
but DAG legalization may introduce new opportunities.  This has turned out to
be important for ARM where 64-bit values are split up during type legalization:
InstCombine is not able to remove the PHI cycles on the 64-bit values but
the separate 32-bit values can be optimized.  I measured the compile time 
impact of this (running llc on 176.gcc) and it was not significant.

llvm-svn: 95951
2010-02-12 01:30:21 +00:00
Jakob Stoklund Olesen
b800ff8ca9 Reapply coalescer fix for better cross-class coalescing.
This time with fixed test cases.

llvm-svn: 95938
2010-02-11 23:55:29 +00:00
Jakob Stoklund Olesen
da3bd912ec Revert functional change. This broke a bunch of tests.
llvm-svn: 95921
2010-02-11 21:19:44 +00:00
Jakob Stoklund Olesen
8b992fb512 It is always good to do a cross-class join when the large register has a tiny interval.
Also avoid division by zero.

llvm-svn: 95917
2010-02-11 20:58:45 +00:00
Dale Johannesen
810ebb35c9 Allow for more than one DBG_VALUE targeting the
same dead instruction.

llvm-svn: 95890
2010-02-11 18:23:23 +00:00
Dale Johannesen
406fad0bad Don't allow DBG_VALUE to affect codegen.
llvm-svn: 95889
2010-02-11 18:22:31 +00:00
Jakob Stoklund Olesen
3aca1b0249 Use array_pod_sort instead of std::sort for improved code size.
Use SmallVector instead of std::vector for better speed when indirectbr has
few successors.

llvm-svn: 95879
2010-02-11 18:06:56 +00:00
Bill Wendling
6e7cc490d4 Use .empty() instead of .size().
llvm-svn: 95871
2010-02-11 10:37:57 +00:00