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ae6a39ea92
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120 Commits

Author SHA1 Message Date
Evan Cheng
ae6a39ea92 - Supposely movlhps is faster / better than unpcklpd. 
- Don't forget pshufd is only available with sse2.

llvm-svn: 26956
 2006-03-22 19:16:21 +00:00
Evan Cheng
cff38e19c3 - Implement X86ISelLowering::isShuffleMaskLegal(). We currently only support 
splat and PSHUFD cases.
- Clean up shuffle / splat matching code.

llvm-svn: 26954
 2006-03-22 18:59:22 +00:00
Evan Cheng
f6dc0a7f5e - VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matches 
PSHUFD. We can make permutes entries which point to the undef pointing
  anything we want.
- Change some names to appease Chris.

llvm-svn: 26951
 2006-03-22 08:01:21 +00:00
Chris Lattner
1554bf155e fix a warning 
llvm-svn: 26941
 2006-03-22 04:18:34 +00:00
Evan Cheng
7aac4350c7 Some splat and shuffle support. 
llvm-svn: 26940
 2006-03-22 02:53:00 +00:00
Evan Cheng
47dd756c72 - Use movaps to store 128-bit vector integers. 
- Each scalar to vector v8i16 and v16i8 is a any_extend followed by a movd.

llvm-svn: 26932
 2006-03-21 23:01:21 +00:00
Chris Lattner
31a93c7740 These targets don't support EXTRACT_VECTOR_ELT, though, in time, X86 will. 
llvm-svn: 26930
 2006-03-21 20:51:05 +00:00
Chris Lattner
09ede9ec9f Add a build_vector node 
llvm-svn: 26895
 2006-03-20 06:18:01 +00:00
Chris Lattner
1bd0aaf2b8 rename these nodes 
llvm-svn: 26848
 2006-03-19 01:13:28 +00:00
Evan Cheng
f4774c9091 Darwin should use _setjmp/_longjmp instead of setjmp/longjmp. 
llvm-svn: 26833
 2006-03-17 20:31:41 +00:00
Chris Lattner
647503bccc Disable x86 fastcc from passing args in registers 
llvm-svn: 26824
 2006-03-17 17:27:47 +00:00
Chris Lattner
a71bc63ced Parameterize the number of integer arguments to pass in registers 
llvm-svn: 26818
 2006-03-17 05:10:20 +00:00
Nate Begeman
42736d46b2 Remove BRTWOWAY* 
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.

llvm-svn: 26814
 2006-03-17 01:40:33 +00:00
Evan Cheng
0e1abe6e19 Bug fix: condition inverted. 
llvm-svn: 26804
 2006-03-16 22:02:48 +00:00
Evan Cheng
cad75d9f0c Added a way for TargetLowering to specify what values can be used as the 
scale component of the target addressing mode.

llvm-svn: 26802
 2006-03-16 21:47:42 +00:00
Evan Cheng
ed013bd937 Add LSR hooks. 
llvm-svn: 26740
 2006-03-13 23:18:16 +00:00
Evan Cheng
a3e0a7f652 Use rep/stosl; and Count 0x3; rep/stosb for memset with 4 byte aligned dest. 
and variable value.
Similarly for memcpy.

llvm-svn: 26603
 2006-03-07 23:29:39 +00:00
Evan Cheng
2327759419 Enable Dwarf debugging info. 
llvm-svn: 26581
 2006-03-07 02:02:57 +00:00
Chris Lattner
6b0947c277 Copysign needs to be expanded everywhere. Note that Alpha and IA64 should 
implement copysign as a native op if they have it.

llvm-svn: 26541
 2006-03-05 05:08:37 +00:00
Evan Cheng
2b45c57663 MEMSET / MEMCPY lowering bugs: we can't issue a single WORD / DWORD version of 
rep/stos and rep/mov if the count is not a constant. We could do
  rep/stosl; and $count, 3; rep/stosb
For now, I will lower them to memset / memcpy calls. We will revisit this after
a little bit experiment.

Also need to take care of the trailing bytes even if the count is a constant.
Since the max. number of trailing bytes are 3, we will simply issue loads /
stores.

llvm-svn: 26517
 2006-03-04 02:48:56 +00:00
Evan Cheng
f2a0107221 Typo 
llvm-svn: 26512
 2006-03-04 01:12:00 +00:00
Chris Lattner
999aa36a04 remove the read/write port/io intrinsics. 
llvm-svn: 26479
 2006-03-03 00:19:58 +00:00
Evan Cheng
ebe1f272b7 Vector op lowering. 
llvm-svn: 26438
 2006-03-01 01:11:20 +00:00
Evan Cheng
bd1279fd2a Added a common about the need for X86ISD::Wrapper. 
llvm-svn: 26372
 2006-02-25 09:55:19 +00:00
Evan Cheng
cb9fb051a5 - Clean up the lowering and selection code of ConstantPool, GlobalAddress, 
and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
  mentioned leaf nodes. Do not mutate and nodes and do not record the
  selection in CodeGenMap. These nodes should be safe to duplicate. This is
  a performance win.

llvm-svn: 26335
 2006-02-23 20:41:18 +00:00
Evan Cheng
2977507828 PIC related bug fixes. 
1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.

llvm-svn: 26324
 2006-02-23 02:43:52 +00:00
Evan Cheng
305141c1ba - Added option -relocation-model to set relocation model. Valid values include static, pic, 
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.

llvm-svn: 26315
 2006-02-22 20:19:42 +00:00
Evan Cheng
005de9e2bb Added MMX, SSE1, and SSE2 vector instructions and some simple patterns. 
Fixed some existing bugs (wrong predicates, prefixes) at the same time.

llvm-svn: 26310
 2006-02-22 02:26:30 +00:00
Chris Lattner
6bb2c3e9cd split register class handling from explicit physreg handling. 
llvm-svn: 26308
 2006-02-22 00:56:39 +00:00
Chris Lattner
a124432746 Updates to match change of getRegForInlineAsmConstraint prototype 
llvm-svn: 26305
 2006-02-21 23:11:00 +00:00
Evan Cheng
063df91002 If SSE3 is available, promote FP_TO_UINT i32 to FP_TO_SINT i64 to take 
advantage of fisttpll.

llvm-svn: 26288
 2006-02-18 07:26:17 +00:00
Evan Cheng
bf3558a375 x86 / Darwin PIC support. 
llvm-svn: 26273
 2006-02-18 00:15:05 +00:00
Chris Lattner
3a899dbbc8 unbreak the build 
llvm-svn: 26260
 2006-02-17 07:09:27 +00:00
Evan Cheng
330fd348ff Unbreak x86 be 
llvm-svn: 26259
 2006-02-17 07:01:52 +00:00
Nate Begeman
9c0ab71f4a kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC 
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.

llvm-svn: 26255
 2006-02-17 05:43:56 +00:00
Nate Begeman
b0ec087c0f Kill the x86 pattern isel. boom. 
llvm-svn: 26246
 2006-02-17 00:03:04 +00:00
Nate Begeman
0bc71999b9 Rework the SelectionDAG-based implementations of SimplifyDemandedBits 
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.

llvm-svn: 26238
 2006-02-16 21:11:51 +00:00
Evan Cheng
2f3056286a A bit more memset / memcpy optimization. 
Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned,
2) size is not known to be greater or equal to some minimum value (currently 128).

llvm-svn: 26224
 2006-02-16 00:21:07 +00:00
Evan Cheng
f6c74c0096 Rename maxStoresPerMemSet to maxStoresPerMemset, etc. 
llvm-svn: 26174
 2006-02-14 08:38:30 +00:00
Evan Cheng
80812d1070 Set maxStoresPerMemSet to 16. Ditto for maxStoresPerMemCpy and 
maxStoresPerMemMove. Although the last one is not used.

llvm-svn: 26172
 2006-02-14 08:25:08 +00:00
Chris Lattner
599b432345 Switch targets over to using SelectionDAG::getCALLSEQ_START to create 
CALLSEQ_START nodes.

llvm-svn: 26143
 2006-02-13 09:00:43 +00:00
Evan Cheng
15369d0b89 Darwin ABI issues: weak, linkonce, etc. dynamic-no-pic support is complete. 
Also fixed a function stub bug. Added weak and linkonce support for
x86 Linux.

llvm-svn: 26038
 2006-02-07 08:38:37 +00:00
Evan Cheng
078962656b Separate FILD and FILD_FLAG, the later is only used for SSE2. It produces a 
flag so it can be flagged to a FST.

llvm-svn: 25953
 2006-02-04 02:20:30 +00:00
Evan Cheng
d432c17927 Fix a erroneous comment. 
llvm-svn: 25894
 2006-02-02 00:28:23 +00:00
Nate Begeman
0be60963bd Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875
 2006-02-01 07:19:44 +00:00
Evan Cheng
27738f635e Return's chain should be matching either the chain produced by the 
value or the chain going into the load.

llvm-svn: 25863
 2006-02-01 01:19:32 +00:00
Evan Cheng
329e86ddfa When folding a load into a return of SSE value, check the chain to 
ensure the memory location has not been clobbered.

llvm-svn: 25861
 2006-02-01 00:20:21 +00:00
Evan Cheng
7eb36f4721 Be smarter about whether to store the SSE return value in memory. If 
it is already available in memory, do a fld directly from there.

llvm-svn: 25859
 2006-01-31 23:19:54 +00:00
Evan Cheng
45ebd632f2 - Allow XMM load (for scalar use) to be folded into ANDP* and XORP*. 
- Use XORP* to implement fneg.

llvm-svn: 25857
 2006-01-31 22:28:30 +00:00
Chris Lattner
5587b270e4 * Fix 80-column violations 
* Rename hasSSE -> hasSSE1 to avoid my continual confusion with 'has any SSE'.
* Add inline asm constraint specification.

llvm-svn: 25854
 2006-01-31 19:43:35 +00:00