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25 Commits

Author SHA1 Message Date
Alp Toker
1c4b33e8e5 Fix known typos 
Sweep the codebase for common typos. Includes some changes to visible function
names that were misspelt.

llvm-svn: 200018
 2014-01-24 17:20:08 +00:00
Arnold Schwaighofer
a8d7eeffb9 Swift model: Fix uop description on some writes 
Those writes really need two/three uops.

llvm-svn: 191677
 2013-09-30 15:56:34 +00:00
Andrew Trick
31eeff56c7 Update machine models. Specify buffer sizes for OOO processors. 
llvm-svn: 184033
 2013-06-15 04:50:02 +00:00
Arnold Schwaighofer
ae78fdcfbc ARM sched model: Use the right resources for DIV 
llvm-svn: 183477
 2013-06-07 01:16:15 +00:00
Arnold Schwaighofer
7ab0e93c53 ARM sched model: Add VFP div instruction on Swift 
Reapply 183271.

llvm-svn: 183472
 2013-06-07 01:10:36 +00:00
Arnold Schwaighofer
e735cf9e6d ARM sched model: Add SIMD/VFP load/store instructions on Swift 
Reapply 183270 again (because three is a magic number).

This should now no longer seg fault after r183459.

llvm-svn: 183464
 2013-06-07 00:04:28 +00:00
Arnold Schwaighofer
b6f6c3165a Revert "ARM sched model: Add SIMD/VFP load/store instructions on Swift" 
Breaks linux build bots (I thought the problem was something else).

llvm-svn: 183447
 2013-06-06 21:08:18 +00:00
Arnold Schwaighofer
c363f5de96 ARM sched model: Add SIMD/VFP load/store instructions on Swift 
Reapply 183270.

llvm-svn: 183445
 2013-06-06 21:02:18 +00:00
Arnold Schwaighofer
2aabc3838f ARM sched model: Add integer VFP/SIMD instructions on Swift 
Reapply 183269.

llvm-svn: 183441
 2013-06-06 20:26:18 +00:00
Arnold Schwaighofer
060a499d4c ARM sched model: Add integer load/store instructions on Swift 
Reapply 183268.

llvm-svn: 183438
 2013-06-06 20:11:56 +00:00
Arnold Schwaighofer
0c32813eef ARM sched model: Add integer arithmetic instructions on Swift 
Reapply 183267.

llvm-svn: 183436
 2013-06-06 19:49:46 +00:00
Arnold Schwaighofer
0bfbfaf7e6 ARM sched model: Add divsion, loads, branches, vfp cvt 
Add some generic SchedWrites and assign resources for Swift and Cortex A9.

Reapply of r183257. (Removed empty InstRW for division on swift)

llvm-svn: 183319
 2013-06-05 16:06:11 +00:00
Arnold Schwaighofer
59cf81c2e1 Revert series of sched model patches until I figure out what is going on. 
llvm-svn: 183273
 2013-06-04 22:35:17 +00:00
Arnold Schwaighofer
d787aba409 ARM sched model: Add VFP div instruction on Swift 
llvm-svn: 183271
 2013-06-04 22:16:08 +00:00
Arnold Schwaighofer
1078009cb6 ARM sched model: Add SIMD/VFP load/store instructions on Swift 
llvm-svn: 183270
 2013-06-04 22:16:07 +00:00
Arnold Schwaighofer
bb0c6ae8d0 ARM sched model: Add integer VFP/SIMD instructions on Swift 
llvm-svn: 183269
 2013-06-04 22:16:05 +00:00
Arnold Schwaighofer
0f39267e23 ARM sched model: Add integer load/store instructions on Swift 
llvm-svn: 183268
 2013-06-04 22:16:04 +00:00
Arnold Schwaighofer
19192c53f2 ARM sched model: Add integer arithmetic instructions on Swift 
llvm-svn: 183267
 2013-06-04 22:16:02 +00:00
Arnold Schwaighofer
fe141a11f4 ARM sched model: Add divsion, loads, branches, vfp cvt 
Add some generic SchedWrites and assign resources for Swift and Cortex A9.

llvm-svn: 183257
 2013-06-04 22:15:46 +00:00
Arnold Schwaighofer
15f0999c37 ARM scheduler model: Add scheduler info to more instructions and resource 
descriptions for compares

llvm-svn: 178844
 2013-04-05 05:01:06 +00:00
Arnold Schwaighofer
e0459c3175 ARM scheduler model: Swift has varying latencies, uops for simple ALU ops 
llvm-svn: 178842
 2013-04-05 04:42:00 +00:00
Arnold Schwaighofer
38aac11be0 ARM Scheduler Model: Add resources instructions, map resources in subtargets 
Reapply r177968:
After commit 178074 we can now have undefined scheduler variants.

Move the CortexA9 resources into the CortexA9 SchedModel namespace. Define
resource mappings under the CortexA9 SchedModel. Define resources and mappings
for the SwiftModel.

Incooperate Andrew's feedback.

llvm-svn: 178460
 2013-04-01 13:07:05 +00:00
Arnold Schwaighofer
1cf4da8cc5 Revert ARM Scheduler Model: Add resources instructions, map resources 
This reverts commit r177968. It is causing failures in a local build bot.

"fatal error: error in backend: Expected a variant SchedClass"

Original commit message:
Move the CortexA9 resources into the CortexA9 SchedModel namespace. Define
resource mappings under the CortexA9 SchedModel. Define resources and mappings
for the SwiftModel.

llvm-svn: 178028
 2013-03-26 15:14:04 +00:00
Arnold Schwaighofer
f4b5b7cd16 ARM Scheduler Model: Add resources instructions, map resources in subtargets 
Move the CortexA9 resources into the CortexA9 SchedModel namespace. Define
resource mappings under the CortexA9 SchedModel. Define resources and mappings
for the SwiftModel.

llvm-svn: 177968
 2013-03-26 02:01:42 +00:00
Bob Wilson
ee6a40c517 Add LLVM support for Swift. 
llvm-svn: 164899
 2012-09-29 21:43:49 +00:00