Jia Liu
|
b077b6085d
|
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
llvm-svn: 150878
|
2012-02-18 12:03:15 +00:00 |
|
Evan Cheng
|
39c462b4f1
|
Add support to model pipeline bypass / forwarding.
llvm-svn: 115005
|
2010-09-28 23:50:49 +00:00 |
|
Anton Korobeynikov
|
e325c693a5
|
Make processor FUs unique for given itinerary. This extends the limit of 32
FU per CPU arch to 32 per intinerary allowing precise modelling of quite
complex pipelines in the future.
llvm-svn: 101754
|
2010-04-18 20:31:01 +00:00 |
|
Chris Lattner
|
ad9a6ccb83
|
Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
|
2007-12-29 20:36:04 +00:00 |
|
Jim Laskey
|
514a74d946
|
Added InstrSchedClass to each of the PowerPC Instructions.
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.
llvm-svn: 23830
|
2005-10-19 19:51:16 +00:00 |
|
Jim Laskey
|
0918760dec
|
Push processor descriptions to the top of target and add command line info.
llvm-svn: 23820
|
2005-10-19 13:34:52 +00:00 |
|
Jim Laskey
|
da117aa6d3
|
Simple edits; remove unimplimented cases and clarify long haul SLU cases.
llvm-svn: 23788
|
2005-10-18 16:59:23 +00:00 |
|
Jim Laskey
|
610af28ca0
|
Checking in first round of scheduling tablegen files. Not tied in as yet.
llvm-svn: 23786
|
2005-10-18 16:23:40 +00:00 |
|