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Commit Graph

43 Commits

Author SHA1 Message Date
Anton Korobeynikov
c87f68e32e Move callee-saved regs spills / reloads to TFI 
llvm-svn: 120228
 2010-11-27 23:05:03 +00:00
Anton Korobeynikov
269e7d3be1 Move hasFP() and few related hooks to TargetFrameInfo. 
llvm-svn: 119740
 2010-11-18 21:19:35 +00:00
Jakob Stoklund Olesen
44949b2e1b Remove the isMoveInstr() hook. 
llvm-svn: 108567
 2010-07-16 22:35:46 +00:00
Jakob Stoklund Olesen
c48892383f Remove redundant branch. Thanks, Anton! 
llvm-svn: 108097
 2010-07-11 17:17:35 +00:00
Jakob Stoklund Olesen
ecdef6c130 Replace copyRegToReg with copyPhysReg for SystemZ. 
llvm-svn: 108092
 2010-07-11 16:40:46 +00:00
Stuart Hastings
bd7194d21c Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This 
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.

This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.

llvm-svn: 106243
 2010-06-17 22:43:56 +00:00
Rafael Espindola
f7170870cf Remove the TargetRegisterClass member from CalleeSavedInfo 
llvm-svn: 105344
 2010-06-02 20:02:30 +00:00
Evan Cheng
241d2c434e Implement @llvm.returnaddress. rdar://8015977. 
llvm-svn: 104421
 2010-05-22 01:47:14 +00:00
Dan Gohman
497e752655 Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it 
doesn't have to guess.

llvm-svn: 103194
 2010-05-06 20:33:48 +00:00
Evan Cheng
80f3051bb7 Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. 
llvm-svn: 103193
 2010-05-06 19:06:44 +00:00
Chris Lattner
58b7cca257 use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() 
llvm-svn: 100214
 2010-04-02 20:16:16 +00:00
Dale Johannesen
5b35f2ee86 Teach AnalyzeBranch, RemoveBranch and the branch 
folder to be tolerant of debug info following the
branch(es) at the end of a block.

llvm-svn: 100168
 2010-04-02 01:38:09 +00:00
Dan Gohman
f9654e9258 Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of 
MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.

llvm-svn: 90634
 2009-12-05 00:44:40 +00:00
Chris Lattner
9ce833945e improve portability to avoid conflicting with std::next in c++'0x. 
Patch by Howard Hinnant!

llvm-svn: 90365
 2009-12-03 00:50:42 +00:00
Chris Lattner
8abcfed7c7 add some missing #includes 
llvm-svn: 86367
 2009-11-07 09:20:54 +00:00
Dan Gohman
b95136e649 Replace TargetInstrInfo::isInvariantLoad and its target-specific 
implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.

llvm-svn: 83475
 2009-10-07 17:38:06 +00:00
Anton Korobeynikov
b3e0446dbb Turn few asserts into errors / unreachable's 
llvm-svn: 76313
 2009-07-18 13:33:17 +00:00
Duncan Sands
d1b273609e Avoid a compiler warning when assertions are turned off. 
llvm-svn: 76176
 2009-07-17 12:25:14 +00:00
Anton Korobeynikov
6c622a4547 Provide crazy pseudos for regpairs spills / reloads 
llvm-svn: 76060
 2009-07-16 14:34:15 +00:00
Anton Korobeynikov
c5e948c021 Handle long-disp stuff more consistently 
llvm-svn: 76059
 2009-07-16 14:33:52 +00:00
Anton Korobeynikov
e1bf81893d Another predicate routine 
llvm-svn: 76057
 2009-07-16 14:33:01 +00:00
Anton Korobeynikov
605ebc2c3c More helpers 
llvm-svn: 76056
 2009-07-16 14:32:41 +00:00
Anton Korobeynikov
014ce79e73 Add bunch of branch folding stuff 
llvm-svn: 76055
 2009-07-16 14:32:19 +00:00
Anton Korobeynikov
918a93419c Add missed opcodes to short => long displacement conversion 
llvm-svn: 76054
 2009-07-16 14:31:52 +00:00
Anton Korobeynikov
08d9f6b882 Cleanup 
llvm-svn: 76053
 2009-07-16 14:31:32 +00:00
Anton Korobeynikov
690fef7849 Add missed condbranch opcodes 
llvm-svn: 76043
 2009-07-16 14:27:26 +00:00
Anton Korobeynikov
df2f045667 Handle FP callee-saved regs 
llvm-svn: 76029
 2009-07-16 14:23:01 +00:00
Anton Korobeynikov
e372330133 Implement FP regs spills / restores 
llvm-svn: 76024
 2009-07-16 14:21:41 +00:00
Anton Korobeynikov
23615e0340 Add bunch of FP instructions 
llvm-svn: 76019
 2009-07-16 14:20:24 +00:00
Anton Korobeynikov
7cf7a634df Another attempt to fix prologue emission 
llvm-svn: 76007
 2009-07-16 14:16:26 +00:00
Anton Korobeynikov
cffc479110 Add proper register aliases 
llvm-svn: 75999
 2009-07-16 14:12:54 +00:00
Anton Korobeynikov
6c1091e7f3 Consolidate reg-imm / reg-reg-imm address mode selection logic in one place. 
llvm-svn: 75990
 2009-07-16 14:10:17 +00:00
Anton Korobeynikov
292a84921d Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes. 
llvm-svn: 75989
 2009-07-16 14:09:56 +00:00
Anton Korobeynikov
9ddb4978ed Provide hooks for spilling / restoring stuff 
llvm-svn: 75969
 2009-07-16 14:01:27 +00:00
Anton Korobeynikov
0ed25fd249 Implement InsertBranch() hook 
llvm-svn: 75966
 2009-07-16 14:00:10 +00:00
Anton Korobeynikov
d984dc6c9d Provide "wide" muls and divs/rems 
llvm-svn: 75958
 2009-07-16 13:56:42 +00:00
Anton Korobeynikov
e26fb377c5 SELECT_CC lowering 
llvm-svn: 75948
 2009-07-16 13:52:51 +00:00
Anton Korobeynikov
b4a6f3c467 Emit callee-saved regs spills / restores 
llvm-svn: 75943
 2009-07-16 13:51:12 +00:00
Anton Korobeynikov
4fcadd1a7d Some preliminary call lowering 
llvm-svn: 75941
 2009-07-16 13:50:21 +00:00
Anton Korobeynikov
f080a4a0bd Add shifts and reg-imm address matching 
llvm-svn: 75927
 2009-07-16 13:43:18 +00:00
Anton Korobeynikov
de69aad588 Add bunch of 32-bit patterns... Uffff :) 
llvm-svn: 75926
 2009-07-16 13:42:31 +00:00
Anton Korobeynikov
7b8aec2c40 Add simple reg-reg and reg-imm moves 
llvm-svn: 75912
 2009-07-16 13:29:38 +00:00
Anton Korobeynikov
8155f0cbaa Let's start another backend :) 
llvm-svn: 75909
 2009-07-16 13:27:25 +00:00