RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 12:12:47 +01:00
Code Issues Projects Releases Wiki Activity
11,056 Commits 4 Branches 5 Tags 704 MiB
b45245327e
Commit Graph

1421 Commits

Author SHA1 Message Date
Chris Lattner
b45245327e It helps if I save the file. :) 
llvm-svn: 12357
 2004-03-13 00:24:52 +00:00
Chris Lattner
f7bc6fd913 Rename the intrinsic enum values for llvm.va_* from Intrinsic::va_* to 
Intrinsic::va*.  This avoid conflicting with macros in the stdlib.h file.

llvm-svn: 12356
 2004-03-13 00:24:00 +00:00
Brian Gaeke
5bc633f691 Make -print-machineinstrs show us the code both before and after reg. alloc. 
llvm-svn: 12344
 2004-03-12 21:19:08 +00:00
Alkis Evlogimenos
da990ad8a4 Add support for a wider range of CMOV instructions. 
llvm-svn: 12336
 2004-03-12 17:59:56 +00:00
Chris Lattner
e536e15ce1 ADd support for select instructions 
llvm-svn: 12316
 2004-03-12 05:52:14 +00:00
Misha Brukman
fe8263c956 Move implementations of functions here, which avoids #including <cstdlib> in the 
header file and all those who #include it.

llvm-svn: 12297
 2004-03-11 23:52:43 +00:00
Brian Gaeke
ede938b425 Get rid of the abort in PhyRegAlloc::finishSavingState(). 
Make an explicit call to it from runOnFunction() if we know we're supposed to
write into the global. This is lame (esp. the const_cast), but it solves
the problem.

llvm-svn: 12291
 2004-03-11 19:46:30 +00:00
Brian Gaeke
e6916ff3b4 Give pass a name 
llvm-svn: 12290
 2004-03-11 19:23:15 +00:00
Misha Brukman
992e44e3c5 Fix compilation on Sparc: assert(0) => abort() 
llvm-svn: 12289
 2004-03-11 19:08:24 +00:00
Brian Gaeke
b3f9f99ff2 In PhyRegAlloc::saveState(), dump Arguments' saved-state, and try to 
make the output more compact.

Divorce state-saving from the doFinalization method; for some reason it's not
getting called when I want it to, at Reoptimizer time. Put the guts in
PhyRegAlloc::finishSavingState(). Put an abort() in it so that I can be really
really sure that it's getting called.

Update comments.

llvm-svn: 12286
 2004-03-11 06:45:52 +00:00
Brian Gaeke
bb3d010689 Remove ghostly directory from the build 
llvm-svn: 12285
 2004-03-11 04:42:41 +00:00
Brian Gaeke
a3ed4044b0 Move all the SaveState options and stuff inton one spot at the top of the file. 
De-constify SaveStateToModule; we have to set both it and SaveRegAllocState
explicitly in the reoptimizer.
Make SaveRegAllocState an 'external location' option.

llvm-svn: 12278
 2004-03-10 22:21:03 +00:00
Brian Gaeke
8af4555830 Only call verifySavedState if SaveRegAllocState is set AND debugging flag is on. 
llvm-svn: 12277
 2004-03-10 22:01:59 +00:00
Alkis Evlogimenos
a13672fd71 Check if printing of implicit uses is required for all types of shift 
instructions.

llvm-svn: 12258
 2004-03-09 06:10:15 +00:00
Brian Gaeke
de0239b2a6 Hmm, who left this sitting around in my tree 
llvm-svn: 12255
 2004-03-09 04:49:13 +00:00
Alkis Evlogimenos
7c0224327e Differentiate between extended precision floats (80-bit) and double precision floats (64-bit) 
llvm-svn: 12254
 2004-03-09 03:37:54 +00:00
Alkis Evlogimenos
f86d2df13d Use newly added API to emit bytes for instructions that gas misassembles 
llvm-svn: 12253
 2004-03-09 03:35:34 +00:00
Alkis Evlogimenos
085957be0b Add emitInstruction() API so that we can get the bytes of a simple instruction 
llvm-svn: 12252
 2004-03-09 03:34:53 +00:00
Alkis Evlogimenos
813daf05c3 Constify things a bit 
llvm-svn: 12251
 2004-03-09 03:30:12 +00:00
Brian Gaeke
57269b0c32 Change PhyRegAlloc::saveStateForValue()'s arg type to deal with 
AllocInfo.Instruction becoming an int.

llvm-svn: 12247
 2004-03-08 23:22:03 +00:00
Brian Gaeke
ed741b87c2 Save argument list alloc state by recording it as the operands of Instruction 
#-1. Other minor changes to deal with AllocInfo.Instruction becoming an int.

llvm-svn: 12246
 2004-03-08 23:22:02 +00:00
Brian Gaeke
b9b20ad428 Make AllocInfo's Instruction an int, so that we can overload it for arguments. 
(Instruction #-1's operands = argument list).

llvm-svn: 12245
 2004-03-08 23:22:01 +00:00
Chris Lattner
a7180252e6 Avoid allocating special registers a bit more robustly 
llvm-svn: 12207
 2004-03-08 03:48:07 +00:00
Chris Lattner
a55628694a Implement folding explicit load instructions into binary operations. For a 
testcase like this:

int %test(int* %P, int %A) {
        %Pv = load int* %P
        %B = add int %A, %Pv
        ret int %B
}

We now generate:
test:
        mov %ECX, DWORD PTR [%ESP + 4]
        mov %EAX, DWORD PTR [%ESP + 8]
        add %EAX, DWORD PTR [%ECX]
        ret

Instead of:
test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %EAX, DWORD PTR [%EAX]
        add %EAX, %ECX
        ret

... saving one instruction, and often a register.  Note that there are a lot
of other instructions that could use this, but they aren't handled.  I'm not
really interested in adding them, but mul/div and all of the FP instructions
could be supported as well if someone wanted to add them.

llvm-svn: 12204
 2004-03-08 01:58:35 +00:00
Chris Lattner
9a9b1c4822 Rearrange and refactor some code. No functionality changes. 
llvm-svn: 12203
 2004-03-08 01:18:36 +00:00
Alkis Evlogimenos
65649a50e9 Add memory operand version of conditional move. 
llvm-svn: 12190
 2004-03-07 03:19:11 +00:00
Brian Gaeke
4bb4ec2388 Support return values of basic integer types. 
Emit RETL instruction to return instead of funny JMPL.
Fix indentation.

llvm-svn: 12186
 2004-03-06 05:32:28 +00:00
Brian Gaeke
855518207c Sort stanzas into Sparc V8 book page number order. 
Add RET, RETL.  Rename SAVE, RESTORE & JMPL for consistency.

llvm-svn: 12185
 2004-03-06 05:32:13 +00:00
Brian Gaeke
813f0d8512 Hack it so we do not try to allocate values to G0. 
llvm-svn: 12184
 2004-03-06 05:31:32 +00:00
Brian Gaeke
a265c3c4df Make prolog align stack properly. Make epilog not touch any registers. 
llvm-svn: 12183
 2004-03-06 05:31:21 +00:00
Brian Gaeke
b4258231ca Emit register names in lowercase, as required by the assembler. 
llvm-svn: 12182
 2004-03-06 05:30:21 +00:00
Brian Gaeke
13f3e2f254 Teach getRegClassForType where to find FP registers 
llvm-svn: 12180
 2004-03-06 03:54:13 +00:00
Brian Gaeke
689af03601 Asm output is looking a lot better; not correct for all operands yet though. 
llvm-svn: 12143
 2004-03-05 08:39:09 +00:00
Brian Gaeke
a24ac9bf8b Support -print-machineinstrs 
llvm-svn: 12124
 2004-03-04 19:22:16 +00:00
Brian Gaeke
0b913593ae make -print-machineinstrs work for both SparcV9 and X86 
llvm-svn: 12122
 2004-03-04 19:16:23 +00:00
Alkis Evlogimenos
e8ebdcc780 Add assertion for scale verification. 
llvm-svn: 12120
 2004-03-04 18:05:02 +00:00
Brian Gaeke
9c6c572f24 Asm printer support, based on x86 - only prints mnemonics for now 
llvm-svn: 12113
 2004-03-04 06:00:41 +00:00
Brian Gaeke
f8440c5a60 Double-FP pseudo-registers. 
llvm-svn: 12112
 2004-03-04 05:15:03 +00:00
Brian Gaeke
b2f869ee43 Subtract instructions; minor cleanups 
llvm-svn: 12111
 2004-03-04 04:37:45 +00:00
Brian Gaeke
0d71671bcf Floating point regs 
llvm-svn: 12110
 2004-03-04 04:37:22 +00:00
Brian Gaeke
9ebecfdfe0 Simple copyConstantToReg support, SETHIi and ORri 
llvm-svn: 12107
 2004-03-04 00:56:25 +00:00
Brian Gaeke
324c928e36 Support add - note, still missing important copyConstantToRegister stuff 
llvm-svn: 12106
 2004-03-03 23:03:14 +00:00
Chris Lattner
6978f97701 SPECIFY a target data to initialize the CBE target with. Until now we have 
been using the default target data layout object to lower malloc instructions,
causing us to allocate more memory than we needed!  This could improve the
performance of the CBE generated code substantially!

llvm-svn: 12088
 2004-03-03 02:14:15 +00:00
Chris Lattner
8f80c299f2 Add a new constructor 
llvm-svn: 12087
 2004-03-03 02:12:47 +00:00
Misha Brukman
491ff34abf Doxygenify some comments. 
llvm-svn: 12064
 2004-03-01 23:53:11 +00:00
Chris Lattner
4d192a2674 Add this back, as its absence introduces assertions, and it seems to work now 
that Instructions are annotable again

llvm-svn: 12045
 2004-03-01 15:28:27 +00:00
Tanya Lattner
b22016f21b fix bug in previous checkin 
llvm-svn: 12044
 2004-03-01 15:05:17 +00:00
Brian Gaeke
b78f8498f0 TargetCacheInfo has been removed; its only uses were to propagate a constant 
(16) into certain areas of the SPARC V9 back-end. I'm fairly sure the US IIIi's
dcache has 32-byte lines, so I'm not sure where the 16 came from. However, in
the interest of not breaking things any more than they already are, I'm going
to leave the constant alone.

llvm-svn: 12043
 2004-03-01 06:43:29 +00:00
Chris Lattner
8c1d67b55f Handle passing constant integers to functions much more efficiently. Instead 
of generating this code:

        mov %EAX, 4
        mov DWORD PTR [%ESP], %EAX
        mov %AX, 123
        movsx %EAX, %AX
        mov DWORD PTR [%ESP + 4], %EAX
        call Y

we now generate:
        mov DWORD PTR [%ESP], 4
        mov DWORD PTR [%ESP + 4], 123
        call Y

Which hurts the eyes less.  :)

Considering that register pressure around call sites is already high (with all
of the callee clobber registers n stuff), this may help a lot.

llvm-svn: 12028
 2004-03-01 02:42:43 +00:00
Chris Lattner
c686a9ab37 Fix a minor code-quality issue. When passing 8 and 16-bit integer constants 
to function calls, we would emit dead code, like this:

int Y(int, short, double);
int X() {
  Y(4, 123, 4);
}

--- Old
X:
        sub %ESP, 20
        mov %EAX, 4
        mov DWORD PTR [%ESP], %EAX
***     mov %AX, 123
        mov %AX, 123
        movsx %EAX, %AX
        mov DWORD PTR [%ESP + 4], %EAX
        fld QWORD PTR [.CPIX_0]
        fstp QWORD PTR [%ESP + 8]
        call Y
        mov %EAX, 0
        # IMPLICIT_USE %EAX %ESP
        add %ESP, 20
        ret

Now we emit:
X:
        sub %ESP, 20
        mov %EAX, 4
        mov DWORD PTR [%ESP], %EAX
        mov %AX, 123
        movsx %EAX, %AX
        mov DWORD PTR [%ESP + 4], %EAX
        fld QWORD PTR [.CPIX_0]
        fstp QWORD PTR [%ESP + 8]
        call Y
        mov %EAX, 0
        # IMPLICIT_USE %EAX %ESP
        add %ESP, 20
        ret

Next up, eliminate the mov AX and movsx entirely!

llvm-svn: 12026
 2004-03-01 02:34:08 +00:00