1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
Commit Graph

186793 Commits

Author SHA1 Message Date
Matt Arsenault
d8a883acb6 AMDGPU: Stop adding m0 implicit def to SGPR spills
r375293 removed the SGPR spilling with scalar stores path, so this is
no longer necessary. This also always had the defect of adding the def
even when this path wasn't in use.

llvm-svn: 375448
2019-10-21 19:42:29 +00:00
Matt Arsenault
d38c883bab AMDGPU: Slightly restructure m0 init code
This will allow using another operation to produce the glue in a
future change.

llvm-svn: 375447
2019-10-21 19:42:26 +00:00
Stanislav Mekhanoshin
5648e6e234 [AMDGPU] Select AGPR in PHI operand legalization
If a PHI defines AGPR legalize its operands to AGPR.
At the moment we can get an AGPR PHI with VGPR operands.
I am not aware of any problems as it seems to be handled
gracefully in RA, but this is not right anyway.

It also slightly decreases VGPR pressure in some cases
because we do not have to a copy via VGPR.

Differential Revision: https://reviews.llvm.org/D69206

llvm-svn: 375446
2019-10-21 19:25:27 +00:00
Simon Pilgrim
9f4a5cc892 [X86] Rename matchBitOpReduction to matchScalarReduction. NFCI.
This doesn't need to be just for bitops, but the ops do need to be fully associative.

llvm-svn: 375445
2019-10-21 19:19:50 +00:00
Sander de Smalen
1e4c4fc96c Reverted r375425 as it broke some buildbots.
llvm-svn: 375444
2019-10-21 19:11:40 +00:00
Roman Lebedev
6a6c72f527 [NFC][CVP] Add shl no-wrap deduction test coverage
llvm-svn: 375441
2019-10-21 18:35:26 +00:00
Bjorn Pettersson
4d919ab81d Prune Pass.h include from DataLayout.h. NFCI
Summary:
Reduce include dependencies by no longer including Pass.h from
DataLayout.h. That include seemed irrelevant to DataLayout, as
well as being irrelevant to several users of DataLayout.

Reviewers: rnk

Reviewed By: rnk

Subscribers: mehdi_amini, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D69261

llvm-svn: 375436
2019-10-21 17:51:54 +00:00
Simon Pilgrim
6ea7d64cca [PowerPC] Regenerate test for D52431
llvm-svn: 375435
2019-10-21 17:45:51 +00:00
Raphael Isemann
2d11d4fee9 [NFC] Add missing include to fix modules build
This header doesn't seem to be parsable on its own and breaks the module build therefore with
the following error:

While building module 'LLVM_Backend' imported from llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp:14:
In file included from <module-includes>:62:
llvm-project/llvm/include/llvm/CodeGen/MachinePipeliner.h:91:20: error: declaration of 'AAResultsWrapperPass' must be imported from module 'LLVM_Analysis.AliasAnalysis' before it is required
    AU.addRequired<AAResultsWrapperPass>();
                   ^
llvm-project/llvm/include/llvm/Analysis/AliasAnalysis.h:1157:7: note: previous declaration is here
class AAResultsWrapperPass : public FunctionPass {
      ^
llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp:14:10: fatal error: could not build module 'LLVM_Backend'
 ~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2 errors generated.

llvm-svn: 375433
2019-10-21 17:43:38 +00:00
Simon Pilgrim
dd9ba77cc9 SystemZISelLowering - supportedAddressingMode - silence static analyzer dyn_cast<> null dereference warning. NFCI.
The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us.

llvm-svn: 375430
2019-10-21 17:16:03 +00:00
Simon Pilgrim
4881d4a375 GVNHoist - silence static analyzer dyn_cast<> null dereference warning in hasEHOrLoadsOnPath call. NFCI.
The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us.

llvm-svn: 375429
2019-10-21 17:15:49 +00:00
Simon Pilgrim
4bd54fe2f0 GuardWidening - silence static analyzer null dereference warning with assertion. NFCI.
llvm-svn: 375428
2019-10-21 17:15:37 +00:00
Simon Pilgrim
a5667e6ca4 CrossDSOCFI - silence static analyzer dyn_cast<> null dereference warning. NFCI.
The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us.

llvm-svn: 375427
2019-10-21 17:15:25 +00:00
Simon Pilgrim
60e3d5282e IndVarSimplify - silence static analyzer dyn_cast<> null dereference warning. NFCI.
The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us.

llvm-svn: 375426
2019-10-21 17:15:05 +00:00
Sander de Smalen
a8c76d8b5b [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2)
Commit message from D66935:

This patch fixes a bug exposed by D65653 where a subsequent invocation
of `determineCalleeSaves` ends up with a different size for the callee
save area, leading to different frame-offsets in debug information.

In the invocation by PEI, `determineCalleeSaves` tries to determine
whether it needs to spill an extra callee-saved register to get an
emergency spill slot. To do this, it calls 'estimateStackSize' and
manually adds the size of the callee-saves to this. PEI then allocates
the spill objects for the callee saves and the remaining frame layout
is calculated accordingly.

A second invocation in LiveDebugValues causes estimateStackSize to return
the size of the stack frame including the callee-saves. Given that the
size of the callee-saves is added to this, these callee-saves are counted
twice, which leads `determineCalleeSaves` to believe the stack has
become big enough to require spilling an extra callee-save as emergency
spillslot. It then updates CalleeSavedStackSize with a larger value.

Since CalleeSavedStackSize is used in the calculation of the frame
offset in getFrameIndexReference, this leads to incorrect offsets for
variables/locals when this information is recalculated after PEI.

This patch fixes the lldb unit tests in `functionalities/thread/concurrent_events/*`

Changes after D66935:

Ensures AArch64FunctionInfo::getCalleeSavedStackSize does not return
the uninitialized CalleeSavedStackSize when running `llc` on a specific
pass where the MIR code has already been expected to have gone through PEI.

Instead, getCalleeSavedStackSize (when passed the MachineFrameInfo) will try
to recalculate the CalleeSavedStackSize from the CalleeSavedInfo. In debug
mode, the compiler will assert the recalculated size equals the cached
size as calculated through a call to determineCalleeSaves.

This fixes two tests:
  test/DebugInfo/AArch64/asan-stack-vars.mir
  test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
that otherwise fail when compiled using msan.

Reviewed By: omjavaid, efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68783

llvm-svn: 375425
2019-10-21 17:12:56 +00:00
Xiangling Liao
6325c18e07 [NFC] Cleanup with variable name IsPPC64 & IsDarwin
Clean up PPCAsmPrinter with IsPPC64 and IsDarwin.

Differential Revision: https://reviews.llvm.org/D69259

llvm-svn: 375420
2019-10-21 15:36:13 +00:00
Guillaume Chatelet
4a32ea01b3 [Alignment][NFC] Finish transition for Loads
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, asbirlea, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69253

llvm-svn: 375419
2019-10-21 15:10:26 +00:00
Jay Foad
0717784b90 Pre-commit test cases for D64713.
llvm-svn: 375418
2019-10-21 15:01:59 +00:00
David Green
bfd7efb258 [Types] Define a getWithNewBitWidth for Types and make use of it
This is designed to change the bitwidth of a type without altering the number
of vector lanes. Also useful in D68651. Otherwise an NFC.

Differential Revision: https://reviews.llvm.org/D69139

llvm-svn: 375417
2019-10-21 14:51:49 +00:00
Guillaume Chatelet
e1380964d3 [Alignment][NFC] Instructions::getLoadStoreAlignment
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69256

llvm-svn: 375416
2019-10-21 14:49:28 +00:00
David Green
51a49e0b2b [ARM] Extra qdadd patterns
This adds some new qdadd patterns to go along with the other recently added
qadd's.

Differential Revision: https://reviews.llvm.org/D68999

llvm-svn: 375414
2019-10-21 14:06:49 +00:00
Guillaume Chatelet
a4dce6b58b [Alignment][NFC] Add a helper function to DataLayout
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69258

llvm-svn: 375413
2019-10-21 13:58:33 +00:00
Owen Reynolds
8604299757 [docs][llvm-ar] Update llvm-ar command guide
The llvm-ar command guide had not been updated in some time, it was
missing current functionality and contained information that was out
of date. This change:
- Updates the use of reStructuredText directives, as seen in other tools
  command guides.
- Updates the command synopsis.
- Updates the descriptions of the tool behaviour.
- Updates the options section.
- Adds details of MRI script functionality.
- Removes the sections "Standards" and "File Format"

Differential Revision: https://reviews.llvm.org/D68998

llvm-svn: 375412
2019-10-21 13:13:31 +00:00
David Green
9298ff40a1 [ARM] Add qadd lowering from a sadd_sat
This lowers a sadd_sat to a qadd by treating it as legal. Also adds qsub at the
same time.

The qadd instruction sets the q flag, but we already have many cases where we
do not model this in llvm.

Differential Revision: https://reviews.llvm.org/D68976

llvm-svn: 375411
2019-10-21 12:33:46 +00:00
Guillaume Chatelet
e221827651 [Alignment][NFC] TargetCallingConv::setByValAlign
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69248

llvm-svn: 375410
2019-10-21 12:05:33 +00:00
Jay Foad
4b553a93da Simplify usage of setFPAttrs.
In some cases using the return value of setFPAttrs simplifies the code.
In other cases it complicates the code with ugly casts, so stop doing
it. NFC.

llvm-svn: 375409
2019-10-21 11:32:41 +00:00
George Rimar
9459104c4d [llvm/Object] - Make ELFObjectFile::getRelocatedSection return Expected<section_iterator>
It returns just a section_iterator currently and have a report_fatal_error call inside.
This change adds a way to return errors and handle them on caller sides.

The patch also changes/improves current users and adds test cases.

Differential revision: https://reviews.llvm.org/D69167

llvm-svn: 375408
2019-10-21 11:06:38 +00:00
Guillaume Chatelet
7b931c8b77 [Alignment][NFC] TargetCallingConv::setOrigAlign and TargetLowering::getABIAlignmentForCallingConv
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: sdardis, hiraditya, jrtc27, atanasyan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69243

llvm-svn: 375407
2019-10-21 11:01:55 +00:00
David Carlier
c838310c5c Fix llvm signal tests build.
llvm-svn: 375406
2019-10-21 10:44:20 +00:00
George Rimar
fc0614afd5 [obj2yaml] - Fix a comment. NFC.
I forgot to address this nit before committing..

llvm-svn: 375405
2019-10-21 10:40:43 +00:00
George Rimar
dcebe13dec [obj2yaml] - Stop triggering UB when dumping corrupted strings.
We have a following code to find quote type:

if (isspace(S.front()) || isspace(S.back()))
...

Problem is that:

"int isspace( int ch ): The behavior is undefined if the value of
ch is not representable as unsigned char and is not equal to EOF."
(https://en.cppreference.com/w/cpp/string/byte/isspace)

This patch shows how this UB can be triggered and fixes an issue.

Differential revision: https://reviews.llvm.org/D69160

llvm-svn: 375404
2019-10-21 10:38:03 +00:00
Sam Elliott
8358b7c5ee [MemCpyOpt] Fixing Incorrect Code Motion while Handling Aggregate Type Values
Summary:
When MemCpyOpt is handling aggregate type values, if an instruction (let's call it P) between the targeting load (L) and store (S) clobbers the source pointer of L, it will try to hoist S before P. This process will also hoist S's data dependency instructions.

However, the current implementation has a bug that if one of S's dependency instructions is //also// a user of P, MemCpyOpt will not prevent it from being hoisted above P and cause a use-before-define error. For example, in the newly added test file (i.e. `aggregate-type-crash.ll`), it will try to hoist both `store %my_struct %1, %my_struct* %3` and its dependent, `%3 = bitcast i8* %2 to %my_struct*`, above `%2 = call i8* @my_malloc(%my_struct* %0)`. Creating the following BB:
```
entry:
  %1 = bitcast i8* %4 to %my_struct*
  %2 = bitcast %my_struct* %1 to i8*
  %3 = bitcast %my_struct* %0 to i8*
  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %2, i8* align 4 %3, i64 8, i1 false)
  %4 = call i8* @my_malloc(%my_struct* %0)
  ret void
```
Where there is a use-before-define error between `%1` and `%4`.

Update: The compiler for the Pony Programming Language [also encounter the same bug](https://github.com/ponylang/ponyc/issues/3140)

Patch by Min-Yih Hsu (myhsu)

Reviewers: eugenis, pcc, dblaikie, dneilson, t.p.northover, lattner

Reviewed By: eugenis

Subscribers: lenary, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66060

llvm-svn: 375403
2019-10-21 10:00:34 +00:00
David Green
72ea3fce59 [ARM] Lower sadd_sat to qadd8 and qadd16
Lower the target independent signed saturating intrinsics to qadd8 and qadd16.
This custom lowers them from a sadd_sat, catching the node early before it is
promoted. It also adds a QADD8b and QADD16b node to mean the bottom "lane" of a
qadd8/qadd16, so that we can call demand bits on it to show that it does not
use the upper bits.

Also handles QSUB8 and QSUB16.

Differential Revision: https://reviews.llvm.org/D68974

llvm-svn: 375402
2019-10-21 09:53:38 +00:00
David Green
636ecacbfc [ARM] Add and adjust saturation tests for upcoming qadd changes. NFC
llvm-svn: 375401
2019-10-21 09:43:37 +00:00
Guillaume Chatelet
d0124d17f9 Use Align for TFL::TransientStackAlignment
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: arsenm, dschuff, jyknight, sdardis, jvesely, nhaehnle, sbc100, jgravelle-google, hiraditya, aheejin, fedor.sergeev, jrtc27, atanasyan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69216

llvm-svn: 375398
2019-10-21 08:31:25 +00:00
Roman Lebedev
22c8c8c22e [NFC][InstCombine] Fixup comments
As noted in post-commit review of rL375378375378.

llvm-svn: 375397
2019-10-21 08:21:54 +00:00
Roman Lebedev
f1346a1f71 [CVP] Deduce no-wrap on mul
Summary:
`ConstantRange::makeGuaranteedNoWrapRegion()` knows how to deal with `mul`
since rL335646, there is exhaustive test coverage.
This is already used by CVP's `processOverflowIntrinsic()`,
and by SCEV's `StrengthenNoWrapFlags()`

That being said, currently, this doesn't help much in the end:
| statistic                              |     old |     new | delta | percentage |
| correlated-value-propagation.NumMulNSW |       4 |     275 |   271 |   6775.00% |
| correlated-value-propagation.NumMulNUW |       4 |    1323 |  1319 |  32975.00% |
| correlated-value-propagation.NumMulNW  |       8 |    1598 |  1590 |  19875.00% |
| correlated-value-propagation.NumNSW    |    5715 |    5986 |   271 |      4.74% |
| correlated-value-propagation.NumNUW    |    9193 |   10512 |  1319 |     14.35% |
| correlated-value-propagation.NumNW     |   14908 |   16498 |  1590 |     10.67% |
| instcount.NumAddInst                   |  275871 |  275869 |    -2 |      0.00% |
| instcount.NumBrInst                    |  708234 |  708232 |    -2 |      0.00% |
| instcount.NumMulInst                   |   43812 |   43810 |    -2 |      0.00% |
| instcount.NumPHIInst                   |  316786 |  316784 |    -2 |      0.00% |
| instcount.NumTruncInst                 |   62165 |   62167 |     2 |      0.00% |
| instcount.NumUDivInst                  |    2528 |    2526 |    -2 |     -0.08% |
| instcount.TotalBlocks                  |  842995 |  842993 |    -2 |      0.00% |
| instcount.TotalInsts                   | 7376486 | 7376478 |    -8 |      0.00% |
(^ test-suite plain, tests still pass)

Reviewers: nikic, reames, luqmana, sanjoy, timshen

Reviewed By: reames

Subscribers: hiraditya, javed.absar, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69203

llvm-svn: 375396
2019-10-21 08:21:44 +00:00
Piotr Sobczak
50853e1649 [InstCombine] Allow values with multiple users in SimplifyDemandedVectorElts
Summary:
Allow for ignoring the check for a single use in SimplifyDemandedVectorElts
to be able to simplify operands if DemandedElts is known to contain
the union of elements used by all users.
It is a responsibility of a caller of SimplifyDemandedVectorElts to
supply correct DemandedElts.

Simplify a series of extractelement instructions if only a subset of
elements is used.

Reviewers: reames, arsenm, majnemer, nhaehnle

Reviewed By: nhaehnle

Subscribers: wdng, jvesely, nhaehnle, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67345

llvm-svn: 375395
2019-10-21 08:12:47 +00:00
GN Sync Bot
04c2c24154 gn build: Merge r375390
llvm-svn: 375393
2019-10-21 08:06:38 +00:00
Martin Storsjo
5adfd48a47 [LLDB] [Windows] Initial support for ARM register contexts
Differential Revision: https://reviews.llvm.org/D69226

llvm-svn: 375392
2019-10-21 08:02:34 +00:00
Yevgeny Rouban
7fbbd670e7 [IR] Fix mayReadFromMemory() for writeonly calls
Current implementation of Instruction::mayReadFromMemory()
returns !doesNotAccessMemory() which is !ReadNone. This
does not take into account that the writeonly attribute
also indicates that the call does not read from memory.

The patch changes the predicate to !doesNotReadMemory()
that reflects the intended behavior.

Differential Revision: https://reviews.llvm.org/D69086

llvm-svn: 375389
2019-10-21 06:52:08 +00:00
Yonghong Song
b80df40a5e [BPF] fix indirect call assembly code
Currently, for indirect call, the assembly code printed out as
  callx <imm>
This is not right, it should be
  callx <reg>

Fixed the issue with proper format.

Differential Revision: https://reviews.llvm.org/D69229

llvm-svn: 375386
2019-10-21 03:22:03 +00:00
Johannes Doerfert
d3db2c6a77 [Attributor][FIX] Silence sign-compare warning
llvm-svn: 375384
2019-10-21 01:29:10 +00:00
Johannes Doerfert
36fd1aad48 [Attributor] Teach AANoCapture to use information in-flight more aggressively
AAReturnedValues, AAMemoryBehavior, and AANoUnwind, can provide
information that helps during the tracking or even justifies no-capture.
We now use this information and enable no-capture in some test cases
designed a long while a ago for these cases.

llvm-svn: 375382
2019-10-21 00:48:42 +00:00
Craig Topper
b94fcd8ad8 [X86] Check Subtarget.hasSSE3() before calling shouldUseHorizontalOp and emitting X86ISD::FHADD in LowerUINT_TO_FP_i64.
This was a regression from r375341.

Fixes PR43729.

llvm-svn: 375381
2019-10-20 23:54:19 +00:00
Philip Reames
046b9617b1 [IndVars] Add a todo to reflect a further oppurtunity identified in D69009
Nikita pointed out an oppurtunity, might as well document it in the code.

llvm-svn: 375380
2019-10-20 23:44:01 +00:00
Philip Reames
e57810463a [IndVars] Eliminate loop exits with equivalent exit counts
We can end up with two loop exits whose exit counts are equivalent, but whose textual representation is different and non-obvious. For the sub-case where we have a series of exits which dominate one another (common), eliminate any exits which would iterate *after* a previous exit on the exiting iteration.

As noted in the TODO being removed, I'd always thought this was a good idea, but I've now seen this in a real workload as well.

Interestingly, in review, Nikita pointed out there's let another oppurtunity to leverage SCEV's reasoning.  If we kept track of the min of dominanting exits so far, we could discharge exits with EC >= MDE.  This is less powerful than the existing transform (since later exits aren't considered), but potentially more powerful for any case where SCEV can prove a >= b, but neither a == b or a > b.  I don't have an example to illustrate that oppurtunity, but won't be suprised if we find one and return to handle that case as well.  

Differential Revision: https://reviews.llvm.org/D69009

llvm-svn: 375379
2019-10-20 23:38:02 +00:00
Roman Lebedev
dfd372d9e2 [InstCombine] conditional sign-extend of high-bit-extract: 'or' pattern.
In this pattern, all the "magic" bits that we'd `add` are all
high sign bits, and in the value we'd be adding to they are all unset,
not unexpectedly, so we can have an `or` there:
https://rise4fun.com/Alive/ups

It is possible that `haveNoCommonBitsSet()` should be taught about this
pattern so that we never have an `add` variant, but the reasoning would
need to be recursive (because of that `select`), so i'm not really sure
that would be worth it just yet.

llvm-svn: 375378
2019-10-20 20:52:06 +00:00
Roman Lebedev
530c99e82a [NFC][InstCombine] conditional sign-extend of high-bit-extract: 'and' pat. can be 'or' pattern.
In this pattern, all the "magic" bits that we'd add are all
high sign bits, and in the value we'd be adding to they are all unset,
not unexpectedly, so we can have an `or` there:
https://rise4fun.com/Alive/ups

llvm-svn: 375377
2019-10-20 20:51:37 +00:00
GN Sync Bot
7bed98bf74 gn build: Merge r375375
llvm-svn: 375376
2019-10-20 20:44:56 +00:00