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40160 Commits

Author SHA1 Message Date
Dan Gohman
b5a26419b8 Make SDNode::dump() print a newline at the end. 
llvm-svn: 109234
 2010-07-23 16:37:47 +00:00
Gabor Greif
30f8e2112c fix constness warnings 
llvm-svn: 109224
 2010-07-23 13:28:47 +00:00
Gabor Greif
a04ffe0391 do not (implicitly) dereference iterator many times, cache it instead 
llvm-svn: 109222
 2010-07-23 10:23:01 +00:00
Mikhail Glushenkov
bbe02846de Formatting. 
llvm-svn: 109216
 2010-07-23 04:19:34 +00:00
Mikhail Glushenkov
bbeb485c74 Get rid of exceptions in llvmc. 
llvmc can be now compiled with llvm-gcc on Windows.

llvm-svn: 109215
 2010-07-23 03:42:55 +00:00
Bruno Cardoso Lopes
b5374c4b69 Declare CLMUL as a subtarget feature 
llvm-svn: 109207
 2010-07-23 01:22:45 +00:00
Bruno Cardoso Lopes
b034ffa291 Add x86 CLMUL (Carry-less multiplication) cpu feature 
llvm-svn: 109206
 2010-07-23 01:17:51 +00:00
Eric Christopher
308237108d 80-col. 
llvm-svn: 109205
 2010-07-23 01:05:59 +00:00
Bruno Cardoso Lopes
b9182e3051 Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual 
llvm-svn: 109204
 2010-07-23 00:54:35 +00:00
Dale Johannesen
1ee436f417 The only supported calling convention for X86-64 uses 
SSE, so we can't return floating point values if this
is disabled.  Detect this error for clang.

With SSE1 only, f64 is a problem; it can be done, but
neither llvm-gcc nor clang has ever generated correct
code for it.  Since nobody noticed this I think it's
OK to treat it as an error for now.

This also handles SSE-sized vectors of floating point.
8207686, 8204109.

llvm-svn: 109201
 2010-07-23 00:30:35 +00:00
Bruno Cardoso Lopes
93fd8bdf6a Fix some AVX instructions which didnt had HasAVX prefix. And also a problem with PINSRW, which was totally wrong because of a typo I introduced previously 
llvm-svn: 109198
 2010-07-23 00:14:54 +00:00
Chris Lattner
a1dcdf0bd4 eliminate the TargetInstrInfo::GetInstSizeInBytes hook. 
ARM/PPC/MSP430-specific code (which are the only targets that
implement the hook) can directly reference their target-specific
instrinfo classes.

llvm-svn: 109171
 2010-07-22 21:27:00 +00:00
Chris Lattner
7c16f1a16e remove the dwarf sizing stuff which is now dead, it was 
"yet another" copy of the dwarf EH emission code that was
copied, pasted and slightly hacked up.

llvm-svn: 109169
 2010-07-22 21:20:39 +00:00
Bruno Cardoso Lopes
7722724eee Add remaining AVX instructions (most of them dealing with GR64 destinations. This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step 
llvm-svn: 109168
 2010-07-22 21:18:49 +00:00
Chris Lattner
65ad913bec remove the JIT "NeedsExactSize" feature and supporting logic. 
llvm-svn: 109167
 2010-07-22 21:17:55 +00:00
Chris Lattner
9c30949ae1 switch a private implementation of GetFunctionSizeInBytes. 
This is probably not the best way to implement "Force LR to 
be spilled if the Thumb function size is > 2048." do this, 
it should use the branch shortening infrastructure, but I'm
just preserving functionality here.

llvm-svn: 109165
 2010-07-22 21:14:33 +00:00
Chris Lattner
7704d56b21 X86MCInstLower now depends on AsmPrinter being around. 
llvm-svn: 109154
 2010-07-22 21:10:04 +00:00
Chris Lattner
367aa754b1 instead of migrating it to the MC instruction encoder, just 
rip out the implementation of X86InstrInfo::GetInstSizeInBytes.
The code being ripped out just implemented a copy and hacked up
version of the (old) instruction encoder, and is buggy and 
terrible in other ways.  Since "GetInstSizeInBytes" is really 
only there to support the JIT's "NeedsExactSize" hook (which
noone is using), just rip out the code.  I will rip out the
NeedsExactSize hook next.

This resolves rdar://7617809 - switch X86InstrInfo::GetInstSizeInBytes to use X86MCCodeEmitter

llvm-svn: 109149
 2010-07-22 21:05:13 +00:00
Devang Patel
f53de95e64 Speculatively revert 109117 
llvm-svn: 109132
 2010-07-22 18:44:00 +00:00
Xerxes Ranby
c7a04bcaa5 ARMv4 JIT forgets to set the lr register when making a indirect function call. Fixes PR7608 
llvm-svn: 109125
 2010-07-22 17:28:34 +00:00
Gabor Greif
feb96f2df2 keep in 80 cols 
llvm-svn: 109122
 2010-07-22 17:18:03 +00:00
Devang Patel
58b7143697 Map MDNode correctly. 
A non function local MDNode can have an operand which is cloned by MapValue(). 

llvm-svn: 109117
 2010-07-22 16:35:00 +00:00
Gabor Greif
346b13120a use cascading operator-> feature 
llvm-svn: 109104
 2010-07-22 13:49:27 +00:00
Gabor Greif
96a9f8c7c6 mass elimination of reliance on automatic iterator dereferencing 
llvm-svn: 109103
 2010-07-22 13:36:47 +00:00
Gabor Greif
225d763b90 simplify 
llvm-svn: 109101
 2010-07-22 13:07:39 +00:00
Gabor Greif
40e372be7e do not access arguments via low-level interface, do not multiply dereference use_iterators 
llvm-svn: 109100
 2010-07-22 13:04:32 +00:00
Gabor Greif
582eb39c11 pass dereferenced iterator to dyn_cast 
llvm-svn: 109099
 2010-07-22 11:48:35 +00:00
Gabor Greif
87ef691878 pass dereferenced iterator to dyn_cast 
llvm-svn: 109098
 2010-07-22 11:43:44 +00:00
Gabor Greif
197322c365 use -> instead of (*). 
llvm-svn: 109094
 2010-07-22 11:12:32 +00:00
Gabor Greif
e826ece8c2 cache dereferenced iterator 
llvm-svn: 109093
 2010-07-22 11:07:46 +00:00
Gabor Greif
a7509fca78 undo 80 column trespassing I caused 
llvm-svn: 109092
 2010-07-22 10:37:47 +00:00
Chandler Carruth
e10953d673 Mark an assert-only variable as used. 
llvm-svn: 109091
 2010-07-22 08:02:25 +00:00
Chandler Carruth
4810e179e9 Fix the generated file name for CMake. 
llvm-svn: 109090
 2010-07-22 08:00:52 +00:00
Tobias Grosser
604a50cd71 Add new RegionInfo pass. 
The RegionInfo pass detects single entry single exit regions in a function,
where a region is defined as any subgraph that is connected to the remaining
graph at only two spots.
Furthermore an hierarchical region tree is built.
Use it by calling "opt -regions analyze" or "opt -view-regions".

llvm-svn: 109089
 2010-07-22 07:46:31 +00:00
Chandler Carruth
66edf31b8e Attempt to fix linking issues with CMake. Please review other CMake users, 
especially on other platforms. Is there a better way to fix this.

llvm-svn: 109084
 2010-07-22 06:27:45 +00:00
Evan Cheng
c47b23ef06 Re-apply r109079 with fix. 
llvm-svn: 109083
 2010-07-22 06:24:48 +00:00
Owen Anderson
2553a4be1a Revert r109079, which broke a lot of CodeGen tests. 
llvm-svn: 109082
 2010-07-22 06:01:28 +00:00
Owen Anderson
01e73ac583 Update CMake files. 
llvm-svn: 109081
 2010-07-22 06:00:01 +00:00
Reid Kleckner
3a876ca187 Initial modifications to MCAssembler and TargetMachine for the MCJIT. 
Patch by Olivier Meurant!

llvm-svn: 109080
 2010-07-22 05:58:53 +00:00
Evan Cheng
f1ca10c69f Initialize RegLimit only when register pressure is being tracked. 
llvm-svn: 109079
 2010-07-22 05:18:41 +00:00
Eric Christopher
4924d5fb93 Custom lower the memory barrier instructions and add support 
for lowering without sse2.  Add a couple of new testcases.

Fixes a few libgomp tests and latent bugs.  Remove a few todos.

llvm-svn: 109078
 2010-07-22 02:48:34 +00:00
Evan Cheng
32f6aba7d8 Fix constant island pass's handling of tBR_JTr. The offset of the instruction does not have to be 4-byte aligned. Rather, it's the offset + 2 that must be aligned since the instruction expands into: 
mov     pc, r1
        .align  2
LJTI0_0_0:
        .long    LBB0_14

This fixes rdar://8213383. No test case since it's not possible to come up with a suitable small one.

llvm-svn: 109076
 2010-07-22 02:09:47 +00:00
Eric Christopher
5901214b6a 80-columns. 
llvm-svn: 109070
 2010-07-22 00:26:08 +00:00
Nate Begeman
c50bef0df7 Make fast isel win64-aware w.r.t. call-clobbered regs 
llvm-svn: 109069
 2010-07-22 00:09:39 +00:00
Evan Cheng
5aa6a25102 More register pressure aware scheduling work. 
llvm-svn: 109064
 2010-07-21 23:53:58 +00:00
Bruno Cardoso Lopes
5920e38cd2 Add more 256-bit forms for a bunch of regular AVX instructions 
Add 64-bit (GR64) versions of some instructions (which are not
described in their SSE forms, but are described in AVX)

llvm-svn: 109063
 2010-07-21 23:53:50 +00:00
Dan Gohman
859ffd353e Make NamedMDNode not be a subclass of Value, and simplify the interface 
for creating and populating NamedMDNodes.

llvm-svn: 109061
 2010-07-21 23:38:33 +00:00
Rafael Espindola
c8342b43c4 Fixes win64. It was broken by a previous patch where I missed the !isWin64 
and then forced every register to be a vr128 on win64.

llvm-svn: 109060
 2010-07-21 23:19:57 +00:00
Owen Anderson
b36d01c1b6 Add INSTANTIATE_AG_PASS, which combines RegisterPass<> with RegisterAnalysisGroup<> for pass registration. 
llvm-svn: 109058
 2010-07-21 23:07:00 +00:00
Jim Grosbach
489d758ea8 For ARM/Darwin, add a dwarf entry indicating whether a function is arm or thumb 
rdar://8202967

llvm-svn: 109057
 2010-07-21 23:03:52 +00:00