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Commit Graph

6224 Commits

Author SHA1 Message Date
Duncan Sands
975f2428ba When replacing uses and the same node is reached
via two paths, process it once not twice, d'oh!
Analysis, testcase and original patch thanks to
Mon Ping Wang.

llvm-svn: 62169
2009-01-13 15:17:14 +00:00
Duncan Sands
21b6c02d9d Mark this XFAIL for the moment.
llvm-svn: 62168
2009-01-13 15:15:46 +00:00
Nick Lewycky
911bb6122c Wind SCEV back in time, to Nov 18th. This 'fixes' PR3275, PR3294, PR3295,
PR3296 and PR3302.

llvm-svn: 62160
2009-01-13 09:18:58 +00:00
Evan Cheng
a706a020bc FIX llvm-gcc bootstrap on x86_64 linux. If a virtual register is copied to a physical register, it's not necessarily defined by a copy. We have to watch out it doesn't clobber any sub-register that might be live during its live interval. If the live interval crosses a basic block, then it's not safe to check with the less conservative check (by scanning uses and defs) because it's possible a sub-register might be live out of the block.
llvm-svn: 62144
2009-01-13 03:57:45 +00:00
Devang Patel
6d7fd4b913 Use DebugInfo interface to lower dbg_* intrinsics.
llvm-svn: 62126
2009-01-13 00:32:17 +00:00
Dale Johannesen
12bb54e183 Enable recursive inlining. Reduce inlining threshold
back to 200; 400 seems to be too high, loses more than
it gains.

llvm-svn: 62107
2009-01-12 22:11:50 +00:00
Evan Cheng
4479171ba3 Second test is only valid in 32-bit mode.
llvm-svn: 62084
2009-01-12 08:05:54 +00:00
Evan Cheng
64eee612cf Test for r62076.
llvm-svn: 62077
2009-01-12 03:46:55 +00:00
Evan Cheng
5e17ea36e1 Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical register to a virtual register unless it requires an expensive cross class copy. That means we are only treating "expensive to copy" register dependency as physical register dependency.
Also future proof the scheduler to handle "normal" physical register dependencies. The code is not exercised yet.

llvm-svn: 62074
2009-01-12 03:19:55 +00:00
Evan Cheng
47dfb8c719 This is a dup of pr2659.ll.
llvm-svn: 62029
2009-01-10 19:06:32 +00:00
Evan Cheng
411c48b7d2 Duplicated node may produce a non-physical register def.
llvm-svn: 62015
2009-01-09 22:44:02 +00:00
Evan Cheng
84945aba0b Add test case from PR2659.
llvm-svn: 62006
2009-01-09 21:01:31 +00:00
Chris Lattner
1219b4e6bc Fix PR3304
llvm-svn: 61995
2009-01-09 18:18:43 +00:00
Dan Gohman
a707c0dafe PR2659 was fixed by r61847. Add the testcase as a regression test.
llvm-svn: 61986
2009-01-09 08:16:12 +00:00
Chris Lattner
660c094906 Implement rdar://6480391, extending of equality icmp's to avoid a truncation.
I noticed this in the code compiled for a routine using std::map, which produced
this code:
	%25 = tail call i32 @memcmp(i8* %24, i8* %23, i32 6) nounwind readonly
	%.lobit.i = lshr i32 %25, 31		; <i32> [#uses=1]
	%tmp.i = trunc i32 %.lobit.i to i8		; <i8> [#uses=1]
	%toBool = icmp eq i8 %tmp.i, 0		; <i1> [#uses=1]
	br i1 %toBool, label %bb3, label %bb4
which compiled to:

	call	L_memcmp$stub
	shrl	$31, %eax
	testb	%al, %al
	jne	LBB1_11	## 

with this change, we compile it to:

	call	L_memcmp$stub
	testl	%eax, %eax
	js	LBB1_11

This triggers all the time in common code, with patters like this:

	%169 = and i32 %ply, 1		; <i32> [#uses=1]
	%170 = trunc i32 %169 to i8		; <i8> [#uses=1]
	%toBool = icmp ne i8 %170, 0		; <i1> [#uses=1]

 	%7 = lshr i32 %6, 24		; <i32> [#uses=1]
	%9 = trunc i32 %7 to i8		; <i8> [#uses=1]
	%10 = icmp ne i8 %9, 0		; <i1> [#uses=1]

etc

llvm-svn: 61985
2009-01-09 07:47:06 +00:00
Chris Lattner
6140ea4f18 Fix PR3298, a crash in Jump Threading. Apparently even
jump threading can have bugs, who knew? ;-)

llvm-svn: 61983
2009-01-09 06:08:12 +00:00
Chris Lattner
c421c547d2 this doesn't depend on the gcc early inliner anymore.
llvm-svn: 61982
2009-01-09 05:49:27 +00:00
Chris Lattner
c8cc13c98e PR3290 is now fixed.
llvm-svn: 61981
2009-01-09 05:46:19 +00:00
Chris Lattner
5ce930d116 Fix part 3/2 of PR3290, making instcombine zap (gep(bitcast)) when possible.
llvm-svn: 61980
2009-01-09 05:44:56 +00:00
Chris Lattner
4166afffa7 this test should not run opt -std-compile-opts, it should run
just llc.

llvm-svn: 61979
2009-01-09 05:32:00 +00:00
Dale Johannesen
4c25cb12ea Do not inline functions with (dynamic) alloca into
functions that don't already have a (dynamic) alloca.
Dynamic allocas cause inefficient codegen and we shouldn't
propagate this (behavior follows gcc).  Two existing tests
assumed such inlining would be done; they are hacked by
adding an alloca in the caller, preserving the point of
the tests.

llvm-svn: 61946
2009-01-08 21:45:23 +00:00
Chris Lattner
5a8a2b046d ValueTracker can't assume that an alloca with no specified alignment
will get its preferred alignment.  It has to be careful and cautiously assume
it will just get the ABI alignment.  This prevents instcombine from rounding
up the alignment of a load/store without adjusting the alignment of the alloca.

llvm-svn: 61934
2009-01-08 19:28:38 +00:00
Chris Lattner
853f4978ea this testcase is huge and hasn't regressed ever, I don't think it is worth keeping.
llvm-svn: 61931
2009-01-08 19:01:45 +00:00
Chris Lattner
759c4201e9 the new scalarrepl changes are optimizing away a temporary alloca in
check242, which invalidates this test.  This test is an x86-32 ABI test 
that is trying to be run in a target-independent way, which is not going
to work very well.  Just remove the test.

llvm-svn: 61921
2009-01-08 07:58:23 +00:00
Chris Lattner
60a03a2f36 This implements the second half of the fix for PR3290, handling
loads from allocas that cover the entire aggregate.  This handles
some memcpy/byval cases that are produced by llvm-gcc.  This triggers
a few times in kc++ (with std::pair<std::_Rb_tree_const_iterator
<kc::impl_abstract_phylum*>,bool>) and once in 176.gcc (with %struct..0anon).

llvm-svn: 61915
2009-01-08 05:42:05 +00:00
Misha Brukman
6338af14f6 Fix off-by-one error in traversing an array; this fixes a test.
The error was reported by gcc-4.3.0 during compilation.

llvm-svn: 61896
2009-01-07 23:07:29 +00:00
Duncan Sands
a254acd1d3 Remove alloca tracking from nocapture analysis. Not only
was it not very helpful, it was also wrong!  The problem
is shown in the testcase: the alloca might be passed to
a nocapture callee which dereferences it and returns the
original pointer.  But because it was a nocapture call we
think we don't need to track its uses, but we do.

llvm-svn: 61876
2009-01-07 19:39:06 +00:00
Chris Lattner
8adf14ea21 Implement the first half of PR3290: if there is a store of an
integer to a (transitive) bitcast the alloca and if that integer
has the full size of the alloca, then it clobbers the whole thing.
Handle this by extracting pieces out of the stored integer and 
filing them away in the SROA'd elements.

This triggers fairly frequently because the CFE uses integers to
pass small structs by value and the inliner exposes these.  For 
example, in kimwitu++, I see a bunch of these with i64 stores to
"%struct.std::pair<std::_Rb_tree_const_iterator<kc::impl_abstract_phylum*>,bool>"

In 176.gcc I see a few i32 stores to "%struct..0anon".

In the testcase, this is a difference between compiling test1 to:

_test1:
	subl	$12, %esp
	movl	20(%esp), %eax
	movl	%eax, 4(%esp)
	movl	16(%esp), %eax
	movl	%eax, (%esp)
	movl	(%esp), %eax
	addl	4(%esp), %eax
	addl	$12, %esp
	ret

vs:

_test1:
	movl	8(%esp), %eax
	addl	4(%esp), %eax
	ret

The second half of this will be to handle loads of the same form.

llvm-svn: 61853
2009-01-07 08:11:13 +00:00
Evan Cheng
a70ecc2f51 The coalescer does not coalesce a virtual register to a physical register if any of the physical register's sub-register live intervals overlaps with the virtual register. This is overly conservative. It prevents a extract_subreg from being coalesced away:
v1024 = EDI  // not killed
      =
      = EDI

One possible solution is for the coalescer to examine the sub-register live intervals in the same manner as the physical register. Another possibility is to examine defs and uses (when needed) of sub-registers. Both solutions are too expensive. For now, look for "short virtual intervals" and scan instructions to look for conflict instead.

This is a small win on x86-64. e.g. It shaves 403.gcc by ~80 instructions.

llvm-svn: 61847
2009-01-07 02:08:57 +00:00
Chris Lattner
f6de7aa2c9 add a testcase.
llvm-svn: 61845
2009-01-07 01:48:08 +00:00
Dan Gohman
ca4475dd7b Add patterns to match conditional moves with loads folded
into their left operand, rather than their right. Do this
by commuting the operands and inverting the condition.

llvm-svn: 61842
2009-01-07 01:00:24 +00:00
Dan Gohman
2682e8745c X86_COND_C and X86_COND_NC are alternate mnemonics for
X86_COND_B and X86_COND_AE, respectively.

llvm-svn: 61835
2009-01-07 00:15:08 +00:00
Dan Gohman
4edc9d725b Now that fold-pcmpeqd-0.ll is effectively testing that scheduling helps
avoid the need for spilling, add a new testcase that tests that the
pcmpeqd used for V_SETALLONES is changed to a constant-pool load as
needed.

llvm-svn: 61831
2009-01-06 23:48:10 +00:00
Dan Gohman
e033f7c41e Revert r42653 and forward-port the code that lets INC64_32r be
converted to LEA64_32r in x86's convertToThreeAddress. This
replaces code like this:
   movl  %esi, %edi
   inc   %edi
with this:
   lea   1(%rsi), %edi
which appears to be beneficial.

llvm-svn: 61830
2009-01-06 23:34:46 +00:00
Dan Gohman
b19f5073f9 Fix a bug in ComputeLinearIndex computation handling multi-level
aggregate types. Don't increment the current index after reaching
the end of a struct, as it will already be pointing at
one-past-the end. This fixes PR3288.

llvm-svn: 61828
2009-01-06 22:53:52 +00:00
Scott Michel
c30557841b CellSPU:
- Fix bugs 3194, 3195: i128 load/stores produce correct code (although, we
  need to ensure that i128 is 16-byte aligned in real life), and 128 zero-
  extends are supported.
- New td file: SPU128InstrInfo.td: this is where all new i128 support should
  be put in the future.
- Continue to hammer on i64 operations and test cases; ensure that the only
  remaining problem will be i64 mul.

llvm-svn: 61784
2009-01-06 03:36:14 +00:00
Dan Gohman
cf1ac86514 Delete this test; it's a duplicate of 2006-07-03-schedulers.ll.
llvm-svn: 61781
2009-01-06 01:36:23 +00:00
Dan Gohman
1cdb677fc8 Use a latency value of 0 for the artificial edges inserted by
AddPseudoTwoAddrDeps. This lets the scheduling infrastructure
avoid recalculating node heights. In very large testcases this
was a major bottleneck. Thanks to Roman Levenstein for finding
this!

As a side effect, fold-pcmpeqd-0.ll is now scheduled better
and it no longer requires spilling on x86-32.

llvm-svn: 61778
2009-01-06 01:19:04 +00:00
Chris Lattner
e10764369d make m_ConstantInt(int64_t) safely match ConstantInt's that are larger than i64.
This fixes an instcombine crash on PR3235.

llvm-svn: 61775
2009-01-05 23:45:50 +00:00
Bill Wendling
4e68cc9ef0 Strength test.
llvm-svn: 61755
2009-01-05 21:27:59 +00:00
Duncan Sands
130c00e4b2 Teach the internalize pass to also internalize
global aliases.

llvm-svn: 61754
2009-01-05 21:24:45 +00:00
Evan Cheng
36e238a4d3 Find loop back edges only after empty blocks are eliminated.
llvm-svn: 61752
2009-01-05 21:17:27 +00:00
Chris Lattner
d72ab018c0 testcase for bill's patch.
llvm-svn: 61751
2009-01-05 21:07:34 +00:00
Duncan Sands
3b98802e9a Delete unused global aliases with internal linkage.
In fact this also deletes those with linkonce linkage,
however this is currently dead because for the moment
aliases aren't allowed to have this linkage type.

llvm-svn: 61742
2009-01-05 20:37:33 +00:00
Duncan Sands
e4ef28d52c Don't spew bitcode to standard out if this test
fails, like it is right now.

llvm-svn: 61690
2009-01-05 10:52:29 +00:00
Torok Edwin
e97eb75c44 This test passes again, unXFAIL.
llvm-svn: 61688
2009-01-05 09:30:47 +00:00
Chris Lattner
29c7f160c4 alignment of 0 is not valid.
llvm-svn: 61682
2009-01-05 08:14:35 +00:00
Scott Michel
733d5f71a0 CellSPU:
- Teach SPU64InstrInfo.td about the remaining signed comparisons, update tests
  accordingly.

llvm-svn: 61672
2009-01-05 04:05:53 +00:00
Scott Michel
06c324c6c7 CellSPU:
- Add an 8-bit operation test, which doesn't do much at this point.

llvm-svn: 61665
2009-01-05 01:35:22 +00:00
Scott Michel
0d9d939406 CellSPU:
- Fix (brcond (setq ...)) bug, where BRNZ should have been used vice BRZ.
- Kill unused/unnecessary nodes in SPUNodes.td
- Beef out the i64operations.c test harness to use a lot of unaligned
  loads, test loops and LLVM loop/basic block optimizations; run the
  test harness successfully on real Cell hardware.

llvm-svn: 61664
2009-01-05 01:34:35 +00:00