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Commit Graph

5708 Commits

Author SHA1 Message Date
Daniel Dunbar
b72534060e LLVMBuild: Introduce a common section which currently has a list of the
subdirectories to traverse into.
 - Originally I wanted to avoid this and just autoscan, but this has one key
   flaw in that new subdirectories can not automatically trigger a rerun of the
   llvm-build tool. This is particularly a pain when switching back and forth
   between trees where one has added a subdirectory, as the dependencies will
   tend to be wrong. This will also eliminates FIXME implicitly.

llvm-svn: 146436
2011-12-12 22:45:54 +00:00
Bob Wilson
70f6f24d68 Implement 'e' and 'f' modifiers for Neon inline asm. <rdar://problem/10551006>
These modifiers simply select either the low or high D subregister of a Neon
Q register.  I've also removed the unimplemented 'p' modifier, which turns out
to be a bit different than the comment here suggests and as far as I can tell
was only intended for internal use in Apple's version of gcc.

llvm-svn: 146417
2011-12-12 21:45:15 +00:00
Daniel Dunbar
30d6a45140 LLVMBuild: Remove trailing newline, which irked me.
llvm-svn: 146409
2011-12-12 19:48:00 +00:00
Jakob Stoklund Olesen
f9a9db0d62 Add a postOffset() alignment argument.
This computes the offset of the layout sucessor block, considering its
alignment as well.

llvm-svn: 146401
2011-12-12 19:25:54 +00:00
Jakob Stoklund Olesen
95050edc56 Fix typo.
llvm-svn: 146400
2011-12-12 19:25:51 +00:00
Jakob Stoklund Olesen
df04f809f4 Also set the proper alignment on inner islands and the function itself.
Downgrade the alignment of the initial constant island when constant
pool entries are moved elsewhere.

This is all gated by -arm-align-constant-islands.

llvm-svn: 146391
2011-12-12 18:45:45 +00:00
Jakob Stoklund Olesen
3b2cfb38e1 Make MF a class member instead of passing it around everywhere.
Also add an MCP member pointing to the machine constant pool.

No functional change intended.

llvm-svn: 146382
2011-12-12 18:16:53 +00:00
Jakob Stoklund Olesen
c3280867bc Add a -arm-align-constant-islands flag, default off.
Order constant pool entries by descending alignment in the initial
island to ensure packing and correct alignment.  When the command line
flag is set, also align the basic block containing the constant pool
entries.

This is only a partial implementation of constant island alignment. More
to come.

llvm-svn: 146375
2011-12-12 16:49:37 +00:00
Stepan Dyatkovskiy
bf1423bdcd Fixed bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). Third attempt: simplified checks in test for armv7-apple-darwin11.
llvm-svn: 146341
2011-12-11 14:35:48 +00:00
Chad Rosier
d8a265c838 Revert r146322 to appease buildbots. Original commit message:
Fixed bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for
FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). Second
attempt.

llvm-svn: 146328
2011-12-10 19:55:03 +00:00
Stepan Dyatkovskiy
5b2b42e8c9 Fixed bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). Second attempt.
llvm-svn: 146322
2011-12-10 08:42:24 +00:00
Jakob Stoklund Olesen
8c75d72739 Try to align the point where a large basic block is split.
The split point is picked such that the newly created water has the same
alignment as the function. This makes the island suitable for constant
pool entries with potentially higher alignment.

This also fixes an issue where the basic block was split one instruction
too late, causing nonconvergence of the algorithm.

<rdar://problem/10550705>

There is still an issue with correctly packing differently aligned
entries in the island.

llvm-svn: 146314
2011-12-10 02:55:10 +00:00
Jakob Stoklund Olesen
9ed0107fcb More debug output formatting.
llvm-svn: 146313
2011-12-10 02:55:06 +00:00
Jim Grosbach
ece09e5e6b ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.
llvm-svn: 146300
2011-12-10 00:01:02 +00:00
Eli Friedman
ca06c3a2bd Splats can contain undef's; make sure to handle them correctly. PR11526.
llvm-svn: 146299
2011-12-09 23:54:42 +00:00
Jim Grosbach
2356c1f141 ARM add some pre-UAL VFP mnemonics for convenience when porting old code.
llvm-svn: 146296
2011-12-09 23:34:09 +00:00
Jim Grosbach
43cade9bb2 ARM allows '' syntax, not just '#imm' for assembly.
Backwards compatibility with 'gas'. #imm is the preferered and documented
syntax, but lots of existing code uses the '$' prefix, so we should
support it if we can.

llvm-svn: 146285
2011-12-09 22:25:03 +00:00
Jim Grosbach
356ad6d232 ARM assembly aliases for BIC<-->AND (immediate).
When the immediate operand of an AND or BIC instruction isn't representable
in the immediate field of the instruction, but the bitwise negation of the
immediate is, assemble the instruction as the inverse operation instead
with the inverted immediate as the operand.

rdar://10550057

llvm-svn: 146283
2011-12-09 22:02:17 +00:00
Jim Grosbach
4181008717 ARM NEON data type aliases for VBIC(register).
llvm-svn: 146281
2011-12-09 21:46:04 +00:00
Jim Grosbach
489e81da30 ARM assembly parsing and encoding for VLD2 with writeback.
Refactor the instructions into fixed writeback and register-stride
writeback variants to simplify the offset operand (no more optional
register operand using reg0). This is a simpler representation and allows
the assembly parser to more easily handle these instructions.

Add tests for the instruction variants now supported.

llvm-svn: 146278
2011-12-09 21:28:25 +00:00
Jakob Stoklund Olesen
ae14ef74e0 User a helper overload for a common pattern.
llvm-svn: 146270
2011-12-09 19:44:39 +00:00
Jim Grosbach
5c5a31449d Tidy up. Better base class factoring.
llvm-svn: 146267
2011-12-09 19:07:20 +00:00
Jim Grosbach
02aac98831 Tidy up. Better base class factoring.
llvm-svn: 146266
2011-12-09 18:54:11 +00:00
Jakob Stoklund Olesen
630b836b58 Tweak debugging output.
llvm-svn: 146264
2011-12-09 18:20:35 +00:00
Jim Grosbach
5f3c519248 ARM convenience aliases for VSQRT.
llvm-svn: 146201
2011-12-08 22:51:25 +00:00
Jim Grosbach
62873cae5f ARM 64-bit VEXT assembly uses a .64 suffix, not .32, amazingly enough.
llvm-svn: 146194
2011-12-08 22:19:04 +00:00
Jim Grosbach
a33fa8aa88 ARM VSHR implied destination operand form aliases.
llvm-svn: 146192
2011-12-08 22:06:06 +00:00
Jim Grosbach
01485b7e6e ARM asm parser, just issue a warning for a duplicate reg in a list.
For better 'gas' compatibility.

llvm-svn: 146185
2011-12-08 21:34:20 +00:00
Jim Grosbach
78020c4642 ARM VSUB implied destination operand form aliases.
llvm-svn: 146182
2011-12-08 20:56:26 +00:00
Jim Grosbach
a33af36947 ARM VQADD implied destination operand form aliases.
llvm-svn: 146179
2011-12-08 20:49:43 +00:00
Jim Grosbach
405e213008 ARM a few more VMUL implied destination operand form aliases.
llvm-svn: 146177
2011-12-08 20:42:35 +00:00
Jim Grosbach
f79eacae90 ARM assembler support for register name aliases.
rdar://10550084

llvm-svn: 146170
2011-12-08 19:27:38 +00:00
Daniel Dunbar
c192ce505d Revert r146143, "Fix bug 9905: Failure in code selection for llvm intrinsics
sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP,
FEXP2).", it is failing tests.

llvm-svn: 146157
2011-12-08 17:32:18 +00:00
Stepan Dyatkovskiy
8fde5b6eb4 Fix bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2).
llvm-svn: 146143
2011-12-08 07:55:03 +00:00
Jim Grosbach
e1fe053f6e ARM NEON two-operand aliases for VSHL(immediate).
llvm-svn: 146125
2011-12-08 01:30:04 +00:00
Jakob Stoklund Olesen
7b5f22051a Drop the HasInlineAsm flag.
It is not used any more. We are tracking inline assembly misalignments
directly through the BBInfo.Unalign and KnownBits fields.

A simple conservative size estimate is not good enough since it can
cause alignment padding to be underestimated.

llvm-svn: 146124
2011-12-08 01:22:39 +00:00
Jim Grosbach
3e9384b103 ARM NEON two-operand aliases for VSHL(register).
llvm-svn: 146123
2011-12-08 01:12:35 +00:00
Jakob Stoklund Olesen
533f7a0f7a Simplify offset verification.
llvm-svn: 146121
2011-12-08 01:10:05 +00:00
Jim Grosbach
1ec6357689 Fix copy/past-o.
llvm-svn: 146120
2011-12-08 01:02:26 +00:00
Jim Grosbach
7e59d1c4db ARM NEON two-operand aliases for VMUL.
llvm-svn: 146119
2011-12-08 00:59:47 +00:00
Jakob Stoklund Olesen
ff1463af3b Don't include alignment padding in BBInfo.Size.
Compute alignment padding before and after basic blocks dynamically.

Heed basic block alignment.

This simplifies bookkeeping because we don't have to constantly add and
remove padding from BBInfo.Size.  It also makes it possible to track the
extra known alignment bits we get after a tBR_JTr terminator and when
entering an aligned basic block.

This makes the ARMConstantIslandPass aware of aligned basic blocks.

It is tricky to model block alignment correctly when dealing with inline
assembly and tBR_JTr instructions that have variable size.  If inline
assembly turns out to be smaller than expected, that may cause following
alignment padding to be larger than expected.  This could cause constant
pool entries to move out of range.

To avoid that problem, we use the worst case alignment padding following
inline assembly. This may cause slightly suboptimal constant island
placement in aligned basic blocks following inline assembly.  Normal
functions should be unaffected.

llvm-svn: 146118
2011-12-08 00:55:02 +00:00
Jim Grosbach
597cb99d62 ARM VFP support 'fmrs/fmsr' aliases for 'vldr'
llvm-svn: 146116
2011-12-08 00:52:55 +00:00
Jim Grosbach
fa73a483a9 ARM VFP support 'flds/fldd' aliases for 'vldr'
llvm-svn: 146115
2011-12-08 00:49:29 +00:00
Jim Grosbach
3b4d5c0510 ARM optional destination operand variants for VEXT instructions.
llvm-svn: 146114
2011-12-08 00:43:47 +00:00
Jim Grosbach
c1cf417595 ARM assembler aliases for "add Rd, #-imm" to "sub Rd, #imm".
llvm-svn: 146111
2011-12-08 00:31:07 +00:00
Jim Grosbach
6146f79b7d ARM assembly, allow 'asl' as a synonym for 'lsl' in shifted-register operands.
For 'gas' compatibility.

llvm-svn: 146106
2011-12-07 23:40:58 +00:00
Jim Grosbach
dd3788b044 ARM two-operand aliases for VAND/VEOR/VORR instructions.
llvm-svn: 146095
2011-12-07 23:08:12 +00:00
Jim Grosbach
da0a3e310a ARM two-operand aliases for VADDW instructions.
llvm-svn: 146093
2011-12-07 23:01:10 +00:00
Jim Grosbach
ecf9c2bb21 ARM two-operand aliases for VADD instructions.
llvm-svn: 146091
2011-12-07 22:52:54 +00:00
Jim Grosbach
268b95034c Nuke inadvertant debugging commit.
llvm-svn: 146057
2011-12-07 19:56:16 +00:00