Jakob Stoklund Olesen
6036d58c40
Avoid editing the current live interval during remat.
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The live interval may be used for a spill slot as well, and that spill slot
could be shared by split registers. We cannot shrink it, even if we know the
current register won't need the spill slot in that range.
llvm-svn: 110721
2010-08-10 20:45:07 +00:00
Jakob Stoklund Olesen
d3f939d7a2
More debug spew
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llvm-svn: 110720
2010-08-10 20:45:01 +00:00
Bill Wendling
0acc8f8a02
Turn optimize cmps on by default so that we can get some testing by the nightly
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ARM testers.
llvm-svn: 110718
2010-08-10 20:23:02 +00:00
Devang Patel
17606414a4
Add missing argument. CreateCompositeTypeEx() users, please verify.
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llvm-svn: 110717
2010-08-10 20:22:49 +00:00
Owen Anderson
a3a2b79f01
Switch over to using ConstantRange to track integral values.
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llvm-svn: 110714
2010-08-10 20:03:09 +00:00
Devang Patel
9b12559c4f
Do not forget debug info for enums. Use named mdnode to keep track of these types.
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llvm-svn: 110712
2010-08-10 20:01:20 +00:00
Daniel Dunbar
eb15b8b44d
tests: Don't error out if HOME isn't present in t the environment.
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llvm-svn: 110711
2010-08-10 19:36:25 +00:00
Evan Cheng
784a286b92
Delete some unused instructions.
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llvm-svn: 110710
2010-08-10 19:36:22 +00:00
Evan Cheng
d9a1b0d046
Re-apply r110655 with fixes. Epilogue must restore sp from fp if the function stack frame has a var-sized object.
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Also added a test case to check for the added benefit of this patch: it's optimizing away the unnecessary restore of sp from fp for some non-leaf functions.
llvm-svn: 110707
2010-08-10 19:30:19 +00:00
Rafael Espindola
c61143ae75
Make it possible to set the flags passed to the assembler.
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Nick, please review.
llvm-svn: 110705
2010-08-10 18:55:09 +00:00
Jakob Stoklund Olesen
245a1faf76
Implement register class inflation.
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When splitting a live range, the new registers have fewer uses and the
permissible register class may be less constrained. Recompute the register class
constraint from the uses of new registers created for a split. This may let them
be allocated from a larger set, possibly avoiding a spill.
llvm-svn: 110703
2010-08-10 18:37:40 +00:00
Daniel Dunbar
872e84afb5
Revert r110655, "Fix ARM hasFP() semantics. It should return true whenever FP
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register is", it breaks a couple test-suite tests.
llvm-svn: 110701
2010-08-10 18:32:02 +00:00
Daniel Dunbar
f7233103ff
MC/AsmParser: Fix a bug in macro argument parsing, which was dropping
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parentheses from argument lists.
llvm-svn: 110692
2010-08-10 17:38:52 +00:00
Bob Wilson
b44310d677
Install llvmCore_Sim to the simulator SDK directory. Radar 8282845.
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llvm-svn: 110687
2010-08-10 17:13:58 +00:00
Jakob Stoklund Olesen
e51a747336
Recalculate the spill weight and allocation hint for virtual registers created
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during live range splitting.
llvm-svn: 110686
2010-08-10 17:07:22 +00:00
Jakob Stoklund Olesen
99402e857d
Fix test for more architectures. Patch by Tobias Grosser.
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llvm-svn: 110685
2010-08-10 16:48:24 +00:00
Rafael Espindola
acfdd67ec8
Fix silly bug.
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llvm-svn: 110684
2010-08-10 16:32:15 +00:00
Michael J. Spencer
26a45fe57e
Revert "MC/MachO: Fix possible null pointer dereference."
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This reverts commit 110575.
Target.isAbsolute() is true if SD would be null.
llvm-svn: 110683
2010-08-10 16:00:49 +00:00
Rafael Espindola
c90e97f163
Use RunPassesOn as in the rest of bugpoint.
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llvm-svn: 110682
2010-08-10 15:46:11 +00:00
Mikhail Glushenkov
2c1543bc9d
Simplify generating LLVMC_BUILTIN_PLUGIN.
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Patch by NAKAMURA Takumi!
llvm-svn: 110680
2010-08-10 14:49:29 +00:00
Mikhail Glushenkov
ba7b4da6de
Trailing whitespace.
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llvm-svn: 110679
2010-08-10 14:49:24 +00:00
Chandler Carruth
69dd8d673c
Mark this variable as used.
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llvm-svn: 110667
2010-08-10 10:39:25 +00:00
Tobias Grosser
7b96737b7f
RegionInfo: Do not assert if a BB is not part of the dominance tree.
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llvm-svn: 110665
2010-08-10 09:54:35 +00:00
Tobias Grosser
766f219db9
Fix failing testcase.
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Those look like typos to me.
llvm-svn: 110664
2010-08-10 09:54:29 +00:00
Devang Patel
84f48b5483
Handle TAG_constant for integers.
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llvm-svn: 110656
2010-08-10 07:11:13 +00:00
Evan Cheng
3d47dbe761
Fix ARM hasFP() semantics. It should return true whenever FP register is
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reserved, not available for general allocation. This eliminates all the
extra checks for Darwin.
This change also fixes the use of FP to access frame indices in leaf
functions and cleaned up some confusing code in epilogue emission.
llvm-svn: 110655
2010-08-10 06:26:49 +00:00
Bill Wendling
eb1b0564a7
Update CMake...sorry for the breakage.
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llvm-svn: 110654
2010-08-10 05:16:06 +00:00
Devang Patel
8edc7575a4
Simplify.
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llvm-svn: 110653
2010-08-10 04:12:17 +00:00
Devang Patel
191ed4c41d
Drop "const". It does not add value here.
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llvm-svn: 110652
2010-08-10 04:09:06 +00:00
Bruno Cardoso Lopes
f1928b60c0
Add AVX movnt{pd,ps,dq} 256-bit intrinsics
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llvm-svn: 110650
2010-08-10 02:49:24 +00:00
Evan Cheng
7aaf83ba17
Add missing null check reported by Amaury Pouly.
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llvm-svn: 110649
2010-08-10 02:39:45 +00:00
Bruno Cardoso Lopes
f5884c6791
Add AVX movmsk 256-bit intrinsics
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llvm-svn: 110648
2010-08-10 02:34:56 +00:00
Bruno Cardoso Lopes
460703a738
Remove replicate intrinsics, clang will generate shufflevector for those. The shuffles can't be matched by x86 codegen yet, but will soon
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llvm-svn: 110647
2010-08-10 02:25:35 +00:00
Bruno Cardoso Lopes
2a7ed4b5c9
Support AVX 256-bit load and store intrinsics
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llvm-svn: 110645
2010-08-10 01:43:16 +00:00
Bruno Cardoso Lopes
7afe424c59
Use i32 instead of i8 for dot product intrinsic
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llvm-svn: 110643
2010-08-10 01:40:05 +00:00
Devang Patel
ef61383343
Do not include file static variable in pubnames list.
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Refactor and simplify code to avoid redundant checks.
llvm-svn: 110642
2010-08-10 01:37:23 +00:00
Dan Gohman
c5bc7b091e
Expand uses of python 2.6's "A if B else C" syntax into regular
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if-else statements, to hopefully support older pythons (PR7850).
llvm-svn: 110638
2010-08-10 01:03:34 +00:00
Chris Lattner
838e42928b
remove code setting rw locks to PTHREAD_PROCESS_PRIVATE, which
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is the default. Patch by NAKAMURA Takumi!
llvm-svn: 110636
2010-08-10 00:34:06 +00:00
Bruno Cardoso Lopes
1ea37cfa7b
Patterns to match AVX cmp instructions
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llvm-svn: 110633
2010-08-10 00:13:20 +00:00
Jakob Stoklund Olesen
1ab2fab3af
Transpose the calculation of spill weights such that we are calculating one
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register at a time. This turns out to be slightly faster than iterating over
instructions, but more importantly, it allows us to compute spill weights for
new registers created after the spill weight pass has run.
Also compute the allocation hint at the same time as the spill weight. This
allows us to use the spill weight as a cost metric for copies, and choose the
most profitable hint if there is more than one possibility.
The new hints provide a very small (< 0.1%) but universal code size improvement.
llvm-svn: 110631
2010-08-10 00:02:26 +00:00
Bruno Cardoso Lopes
4e8d77892c
Add matching patterns for vblend AVX intrinsics
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llvm-svn: 110630
2010-08-10 00:02:05 +00:00
Bruno Cardoso Lopes
7d73127002
Fix the last argument type of AVX vblend intrinsics
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llvm-svn: 110628
2010-08-10 00:00:22 +00:00
Bill Wendling
8a7a43a1cb
Merge the OptimizeExts and OptimizeCmps passes into one PeepholeOptimizer
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pass. This pass should expand with all of the small, fine-grained optimization
passes to reduce compile time and increase happiment.
llvm-svn: 110627
2010-08-09 23:59:04 +00:00
Devang Patel
c5f885e228
Undo accidental commit.
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llvm-svn: 110623
2010-08-09 23:28:52 +00:00
Devang Patel
4ccbd73f20
Simplify. Avoid redundant checks.
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llvm-svn: 110621
2010-08-09 23:26:06 +00:00
Eric Christopher
a79ff725ab
Wording.
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llvm-svn: 110618
2010-08-09 22:52:47 +00:00
Kevin Enderby
8303a64b0a
Next bit of support for the dwarf .file directive. This patch takes the
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previously collected info from the .file directives and outputs the encoded
bytes for it. For now this is only in the Mach-O streamer but at some point
will move to a more generic place.
llvm-svn: 110617
2010-08-09 22:52:14 +00:00
Evan Cheng
fa0406ae10
ARMBaseRegisterInfo::hasFP() has been broken for a while now. :-(
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This will always be false before PEI:
(DisableFramePointerElim(MF) && MFI->adjustsStack())
Which means it's going to make r11 available as a general purpose register even
if -disable-fp-elim is specified. It's working on Darwin only because r7 is
always reserved. But it's obviously broken for other targets.
llvm-svn: 110614
2010-08-09 22:32:45 +00:00
Bruno Cardoso Lopes
e58d077846
Add VCVTPD2PS, VCVTPS2DQ, VCVTPS2PDY, VCVTTPD2DQY, VCVTTPS2DQ and VCVTPD2DQ 256-bit conversion intrinsics
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llvm-svn: 110608
2010-08-09 21:51:56 +00:00
Devang Patel
8d0c79694e
Refactor.
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llvm-svn: 110607
2010-08-09 21:39:24 +00:00