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Commit Graph

24736 Commits

Author SHA1 Message Date
Nate Begeman
fa83cee567 Hooray, everyone now uses the same printBasicBlockLabel implementation
llvm-svn: 28056
2006-05-02 17:34:51 +00:00
Chris Lattner
5c1abc2b94 Remove dead method
llvm-svn: 28055
2006-05-02 17:20:28 +00:00
Chris Lattner
436a2304db Remove a now-dead method
llvm-svn: 28054
2006-05-02 17:17:13 +00:00
Chris Lattner
c11eac5284 There is no reason to use a virtual method to store this word.
llvm-svn: 28053
2006-05-02 17:16:20 +00:00
Chris Lattner
aff0e22c2a Remove the debug machine code emitter. The "FilePrinterEmitter" is moreuseful for debugging.
llvm-svn: 28052
2006-05-02 16:59:49 +00:00
Chris Lattner
bb8c8b5d9d Remove the debug machine code emitter. The "FilePrinterEmitter" is more
useful for debugging.

llvm-svn: 28051
2006-05-02 16:59:24 +00:00
Nate Begeman
05174045df Extend printBasicBlockLabel a bit so that it can be used to print all
basic block labels, consolidating the code to do so in one place for each
target.

llvm-svn: 28050
2006-05-02 05:37:32 +00:00
Nate Begeman
82a6c0c66c Update the PPC compilation callback code to not need weird abi-violating
prologs and epilogs, keep all the asm in one place, and remove use of
compiler builtin functions.

llvm-svn: 28049
2006-05-02 04:50:05 +00:00
Chris Lattner
1275941193 Add pass ID's for various passes, so they can be AddRequiredID. Patch by
Domagoj Babic!

llvm-svn: 28048
2006-05-02 04:24:36 +00:00
Jeff Cohen
a35a8a5f9c De-virtualize SwitchSection.
llvm-svn: 28047
2006-05-02 03:58:45 +00:00
Jeff Cohen
b257253098 De-virtualize EmitZeroes.
llvm-svn: 28046
2006-05-02 03:46:13 +00:00
Jeff Cohen
5c2e201a63 Finish support for Microsoft ML/MASM. May still be a few rough edges.
llvm-svn: 28045
2006-05-02 03:11:50 +00:00
Jeff Cohen
ec0f5808a1 Make Intel syntax mode friendlier to Microsoft ML assembler (still needs more work).
llvm-svn: 28044
2006-05-02 01:16:28 +00:00
Chris Lattner
8cbad2f76a Put instruction names into the first non TargetInstrInfo namespace found.
llvm-svn: 28043
2006-05-01 23:46:16 +00:00
Chris Lattner
85ba2cb9bf New testcase that crashes the new CFE.
llvm-svn: 28042
2006-05-01 23:18:55 +00:00
Chris Lattner
c2914c8ac5 Fix a latent bug that my spiller patch last week exposed: we were leaving
instructions in the virtregfolded map that were deleted.  Because they
were deleted, newly allocated instructions could end up at the same address,
magically finding themselves in the map.  The solution is to remove entries
from the map when we delete the instructions.

llvm-svn: 28041
2006-05-01 22:03:24 +00:00
Chris Lattner
a9f3c7c50a When promoting a load to a reg-reg copy, where the load was a previous
instruction folded with spill code, make sure the remove the load from
the virt reg folded map.

llvm-svn: 28040
2006-05-01 21:17:10 +00:00
Chris Lattner
befcd1e76d Remove previous patch, which wasn't quite right.
llvm-svn: 28039
2006-05-01 21:16:03 +00:00
Chris Lattner
da6162633a instructions can be in different namespaces. Make sure to use the right
one for each instruction.

llvm-svn: 28038
2006-05-01 17:01:17 +00:00
Chris Lattner
8456272509 Put PHI/INLINEASM into the correct namespace.
llvm-svn: 28037
2006-05-01 17:00:49 +00:00
Evan Cheng
0bae850dda Formating
llvm-svn: 28036
2006-05-01 09:30:17 +00:00
Evan Cheng
44e851f6ec Dis-favor stores more
llvm-svn: 28035
2006-05-01 09:20:44 +00:00
Evan Cheng
494e47d755 Bottom up register-pressure reduction scheduler now pushes store operations
up the schedule. This helps code that looks like this:

loads ...
computations (first set) ...
stores (first set) ...
loads
computations (seccond set) ...
stores (seccond set) ...

Without this change, the stores and computations are more likely to
interleave:

loads ...
loads ...
computations (first set) ...
computations (second set) ...
computations (first set) ...
stores (first set) ...
computations (second set) ...
stores (stores set) ...

This can increase the number of spills if we are unlucky.

llvm-svn: 28033
2006-05-01 09:14:40 +00:00
Evan Cheng
efcb0061df Mark instructions whose pattern is (store ...) isStore.
llvm-svn: 28032
2006-05-01 09:04:20 +00:00
Evan Cheng
94264c7c90 Didn't mean ScheduleDAGList.cpp to make the last checkin.
llvm-svn: 28030
2006-05-01 08:56:34 +00:00
Evan Cheng
ef706b77c4 Remove temp. option -spiller-check-liveout, it didn't cause any failure nor performance regressions.
llvm-svn: 28029
2006-05-01 08:54:57 +00:00
Chris Lattner
db3b029ab9 Intel mode no longer uses %'s on registers
llvm-svn: 28028
2006-05-01 05:56:51 +00:00
Chris Lattner
fe8f858ec0 Remove %'s from register names when in intel mode.
llvm-svn: 28027
2006-05-01 05:53:50 +00:00
Chris Lattner
bce271e829 Format #APP lines a bit nicer
llvm-svn: 28026
2006-05-01 04:11:03 +00:00
Evan Cheng
02e72f8f55 Local spiller kills a store if the folded restore is turned into a copy.
But this is incorrect if the spilled value live range extends beyond the
current BB.
It is currently controlled by a temporary option -spiller-check-liveout.

llvm-svn: 28024
2006-04-30 08:41:47 +00:00
Jeff Cohen
1b3f7b8b48 Mingw32 patches supplied by Anton Korobeynikov.
llvm-svn: 28023
2006-04-29 18:41:44 +00:00
Chris Lattner
6ce6942d21 Remove a bogus transformation. This fixes SingleSource/UnitTests/2006-01-23-InitializedBitField.c
with some changes I have to the new CFE.

llvm-svn: 28022
2006-04-28 23:33:20 +00:00
Evan Cheng
a7ee4891c5 I can't spell: Register, not Regsiter.
llvm-svn: 28021
2006-04-28 23:19:39 +00:00
Evan Cheng
516164744a Implemented x86 inline asm b, h, w, k modifiers.
llvm-svn: 28020
2006-04-28 23:11:40 +00:00
Chris Lattner
4c79d3b238 Fix InstCombine/2006-04-28-ShiftShiftLongLong.ll
llvm-svn: 28019
2006-04-28 22:21:41 +00:00
Chris Lattner
8665f8644d new testcase miscompiled by instcombine
llvm-svn: 28018
2006-04-28 22:17:20 +00:00
Chris Lattner
e3de67fae2 Fix CodeGen/Generic/2006-04-28-Sign-extend-bool.ll
llvm-svn: 28017
2006-04-28 21:56:10 +00:00
Chris Lattner
6b7d67bb51 testcase that crashes the ppc backend, which can't sextinreg(i1)
llvm-svn: 28016
2006-04-28 21:52:24 +00:00
Evan Cheng
a33feb51db Initial caller side support (for CCC only, not FastCC) of 128-bit vector
passing by value.

llvm-svn: 28015
2006-04-28 21:29:37 +00:00
Evan Cheng
a8b295feb2 Bare-bone X86 inline asm printer support.
llvm-svn: 28014
2006-04-28 21:19:05 +00:00
Evan Cheng
ba1c03668e Update. It should use two shufps, not three!
llvm-svn: 28013
2006-04-28 18:55:34 +00:00
Evan Cheng
9f21c2daf4 Remove the temporary option: -no-isel-fold-inflight
llvm-svn: 28012
2006-04-28 18:54:11 +00:00
Evan Cheng
d577ce4c4a Implement four-wide shuffle with 2 shufps if no more than two elements come
from each vector. e.g.
        shuffle(G1, G2, 7, 1, 5, 2)
==>
        movaps _G2, %xmm0
        shufps $151, _G1, %xmm0
        shufps $216, %xmm0, %xmm0

llvm-svn: 28011
2006-04-28 07:03:38 +00:00
Chris Lattner
a297ad27db Fix PR743: emit -help output of a tool to cout, not cerr.
llvm-svn: 28010
2006-04-28 05:36:25 +00:00
Evan Cheng
f843942504 TargetLowering::LowerArguments should return a VBIT_CONVERT of
FORMAL_ARGUMENTS SDOperand in the return result vector.

llvm-svn: 28009
2006-04-28 05:25:15 +00:00
Chris Lattner
4e783a3101 Mapping of physregs can make it so that the designated and input physregs are
the same.  In this case, don't emit a noop copy.

llvm-svn: 28008
2006-04-28 04:43:18 +00:00
Chris Lattner
2118062b9c Fix Transforms/Reassociate/2006-04-27-ReassociateVector.ll
llvm-svn: 28007
2006-04-28 04:14:49 +00:00
Chris Lattner
c251c24048 new testcase
llvm-svn: 28006
2006-04-28 04:14:29 +00:00
Evan Cheng
37af498015 Use movaps instead of movapd for spill / restore.
llvm-svn: 28005
2006-04-28 02:23:35 +00:00
Evan Cheng
ff5a88b62e Added a temporary option -no-isel-fold-inflight to control whether a "inflight"
node can be folded.

llvm-svn: 28003
2006-04-28 02:09:19 +00:00