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Commit Graph

192420 Commits

Author SHA1 Message Date
Lang Hames
46f1687baa [ORC] Add errors for missing and extraneous symbol definitions.
This patch adds new errors and error checking to the ObjectLinkingLayer to
catch cases where a compiled or loaded object either:
(1) Contains definitions not covered by its responsibility set, or
(2) Is missing definitions that are covered by its responsibility set.

Proir to this patch providing the correct set of definitions was treated as
an API contract requirement, however this requires that the client be confident
in the correctness of the whole compiler / object-cache pipeline and results
in difficult-to-debug assertions upon failure. Treating this as a recoverable
error results in clearer diagnostics.

The performance overhead of this check is one comparison of densemap keys
(symbol string pointers) per linking object, which is minimal. If this overhead
ever becomes a problem we can add the check under a flag that can be turned off
if the client fully trusts the rest of the pipeline.
2020-02-22 11:49:14 -08:00
Rafael Ávila de Espíndola
8263acd297 Add a llvm::shuffle and use it in lld
With this --shuffle-sections=seed produces the same result in every
host.

Reviewed By: grimar, MaskRay

Differential Revision: https://reviews.llvm.org/D74971
2020-02-22 10:05:29 -08:00
Tyker
59261f7b76 [NFC] Remove some GCC warning from c9e93c84f61400d1aac7d195a0578e80bc48c69a 2020-02-22 14:11:31 +01:00
Georgii Rymar
0ba63b8a56 [yaml2obj] - Automatically assign sh_addr for allocatable sections.
I've noticed that it is not convenient to create YAMLs from
binaries (using obj2yaml) that have to be test cases for obj2yaml
later (after applying yaml2obj).

The problem, for example is that obj2yaml emits "DynamicSymbols:"
key instead of .dynsym. It also does not create .dynstr.
And when a YAML document without explicitly defined .dynsym/.dynstr
is given to yaml2obj, we have issues:

1) These sections are placed after non-allocatable sections (I've fixed it in D74756).
2) They have VA == 0. User needs create descriptions for such sections explicitly manually
    to set a VA.

This patch addresses (2). I suggest to let yaml2obj assign virtual addresses by itself.
It makes an output binary to be much closer to "normal" ELF.
(It is still possible to use "Address: 0x0" for a section to get the original behavior
if it is needed)

Differential revision: https://reviews.llvm.org/D74764
2020-02-22 14:43:54 +03:00
Simon Moll
aed916d9dc [VE][fix] missing include 2020-02-22 11:00:59 +01:00
Fangrui Song
1040019dfe [Frontend] Replace CC1 option -mcode-model with -mcmodel=
Before:

% clang -mcmodel=x -xc /dev/null
error: invalid argument 'x' in '-mcode-model x'

Now:

% clang -mcmodel=x -xc /dev/null
clang-11: error: invalid argument 'x' to -mcmodel=
2020-02-21 23:10:50 -08:00
Quentin Colombet
88bd84d7ae [GISel][KnownBits] Suppress unused warning on the dump method
NFC
2020-02-21 21:07:04 -08:00
Craig Topper
4820b68713 [X86] Teach combineCVTPH2PS to shrink v8i16 loads when the output type is v4f32. Remove extra isel patterns.
Similar to what do for other operations that use a subset of bits.
Allows us to remove a pattern that shrinks a load. Which was
incorrect if the load was volatile.
2020-02-21 18:11:07 -08:00
Kirill Naumov
85cc795ad4 Flags for displaying only hot nodes in CFGPrinter graph
Added two flags to omit uncommon or dead paths in the CFG graphs:
  -cfg-hide-unreachable-paths
  -cfg-hide-deoptimize-paths

The main purpose is performance analysis when such block are not
"interesting" from perspective of common path performance.

Reviewed By: apilipenko, davidxl

Differential Revision: https://reviews.llvm.org/D74346
2020-02-21 17:20:00 -08:00
Heejin Ahn
9844b1aac5 [WebAssembly] Fix a non-determinism problem in FixIrreducibleControlFlow
Summary:
We already sorted the blocks when fixing up a set of mutual
loop entries, however, there can be multiple sets of such
mutual loop entries, and the order we encounter them
should not be random, so sort them too.

Fixes https://bugs.llvm.org/show_bug.cgi?id=44982

Patch by Alon Zakai (kripken)

Reviewers: aheejin, sbc100, dschuff

Subscribers: mgrang, sunfish, hiraditya, jgravelle-google, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74999
2020-02-21 17:05:46 -08:00
Fangrui Song
ad2da807b8 [llvm-objdump][test] Fix source-interleave-function-from-debug.test on Windows after D74507 2020-02-21 16:47:54 -08:00
Matt Arsenault
8bcd0c0408 AMDGPU/GlobalISel: Remove dead code 2020-02-21 19:19:32 -05:00
Mark Searles
110a3cbd81 Revert "[AMDGPU] Don’t marke the .note section as ALLOC"
This reverts commit 977cd661cf019039dec7ffdd15bf0ac500828c87.

It breaks OpenCL testing. OpenCL Runtime is using PT_LOAD information
to calculate memory for global variables. This commit should be relanded once
the OpenCL runtime stops relying on PT_LOAD information for calculating global
variable memory size.

Differential Revision: https://reviews.llvm.org/D74995
2020-02-21 16:08:30 -08:00
Fangrui Song
75db90da40 [MC][ELF] Error for sh_type, sh_flags or sh_entsize change
Heads-up message: https://lists.llvm.org/pipermail/llvm-dev/2020-February/139390.html

GNU as started to emit warnings for changed sh_type or sh_flags in 2000.
GNU as>=2.35 will emit errors for most sh_type/sh_flags change, and error for entsize change.

Some cases remain warnings for legacy reasons:

   .section .init_array,"ax", @progbits
   .section .init_array,"ax", @init_array
   # And some obscure sh_flags changes (OS/Processor specific flags)

The rationale of a diagnostic (warning or error) is that sh_type,
sh_flags or sh_entsize changes usually indicate user errors. The values
are taken from the first .section directive. Successive directives are ignored.

We just try to be rigid and emit errors for all sh_type/sh_flags/sh_entsize change.

A possible improvement in the future is to reuse
llvm-readobj/ELFDumper.cpp:getSectionTypeString so that we can name the
type in the diagnostics.

Reviewed By: psmith

Differential Revision: https://reviews.llvm.org/D73999
2020-02-21 15:44:14 -08:00
Jordan Rupprecht
0492ef49dc [llvm-objdump] Print method name from debug info in disassembly output.
Summary:
GNU objdump prints the method name in disassembly output, and upon further investigation this seems to come from debug info, not the symbol table.

Some additional refactoring is necessary to make this work even when the line number is 0/the filename is unknown. The added test case includes a note for this scenario.

See http://llvm.org/PR41341 for more info.

Reviewers: dblaikie, MaskRay, jhenderson

Reviewed By: MaskRay

Subscribers: ormris, jvesely, aprantl, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74507
2020-02-21 15:30:51 -08:00
Stefanos Baziotis
e0907c5816 [Analysis][Docs] Parents of loops documentation.
Recently I had to use it and although one assumes it returns null if
there's no parent loop, I think it helps to doc it.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D74890
2020-02-21 17:11:53 -06:00
Francis Visoiu Mistrih
b42305045e [Target] Remove libObject dependency in lib/Target
This removes a couple useless includes and the dependency of X86Desc on Object,
which was useless as well.
2020-02-21 14:52:31 -08:00
Johannes Doerfert
b02d00556f [Attributor][FIX] Disable a test to unblock the builders
To unblock the builders this disables a test for which the CHECK lines
need to be updated. The patch causing the failure was not reverted
because it is needed for a different problem we are investigating. Here
we just need to update the CHECK lines which will happen in the
meantime.
2020-02-21 14:43:31 -08:00
Quentin Colombet
e023c34590 [GISel][KnownBits] Add a cache mechanism to speed compile time
This patch adds a cache that is valid only for the duration of a call
to getKnownBits. With such short lived cache we avoid all the problems
of cache invalidation while still getting the benefits of reusing
the information we already computed.

This cache is useful whenever an instruction occurs more than once
in a chain of computation.
E.g.,
v0 = G_ADD v1, v2
v3 = G_ADD v0, v1

Previously we would compute the known bits for:
v1, v2, v0, then v1 again and finally v3.

With the patch, now we won't have to recompute v1 again.

NFC
2020-02-21 14:31:42 -08:00
Johannes Doerfert
a2f76095a2 [Attributor][FIX] Undo 16188f9 until SCC iterator bug is fixed
The buildbot
  http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win
shows some strange SCC iterator bug since 16188f9 which we need to
investigate. This patch should remove the part of 16188f9 that could
have exposed the problem.
2020-02-21 14:20:42 -08:00
Whitney Tsang
ef1046fdfe [CloneFunction] Update loop headers after cloning all blocks in loop.
Summary:
Blocks in a loop can be in any order as long as the loop header is the
first block in Blocks.
With some order of Blocks, cloneLoopWithPreheader would trigger the
assertion in addBasicBlockToLoop.

Example:

define void @test(i64 %N) {
preheader.i:
  br label %header.i

header.i:
  %i = phi i64 [ 0, %preheader.i ], [ %inc.i, %latch.i ]
  br label %header.j

header.j:
  %j = phi i64 [ 0, %header.i ], [ %inc.j, %latch.j ]
  br label %header.k

header.k:
  %k = phi i64 [ 0, %header.j ], [ %inc.k, %latch.k ]
  call void @baz(i64 %i, i64 %j, i64 %k)
  br label %latch.k

latch.k:
  %inc.k = add nsw i64 %k, 1
  %cmp.k = icmp slt i64 %inc.k, %N
  br i1 %cmp.k, label %header.k, label %latch.j

latch.j:
  %inc.j = add nsw i64 %j, 1
  %cmp.j = icmp slt i64 %inc.j, %N
  br i1 %cmp.j, label %header.j, label %latch.i

latch.i:
  %inc.i = add nsw i64 %i, 1
  %cmp.i = icmp slt i64 %inc.i, %N
  br i1 %cmp.i, label %header.i, label %exit.i

exit.i:
  ret void
}
declare void @baz(i64, i64, i64)
If the blocks of loop-i is in the order: header.i, latch.k, header.k,
header.j, latch.j, latch.i,
then cloneLoopWithPreheader would trigger the assertion in
addBasicBlockToLoop
assert(contains(SameHeader) && getHeader() == SameHeader->getHeader() &&
"Incorrect LI specified for this loop!");

As latch.k is in both loop-j and loop-k, it would be set as the header
of both loops after adding latch.k.
If we update loop headers during cloning blocks, then after adding
header.k,
the header of loop-k would be updated with header.k,
while the header of loop-j stays as latch.k.

When adding header.j, SameHeader is loop-k, SameHeader->getHeader() is
header.k, but getHeader() is latch.k, which trigger the assertion.
Reviewer: jdoerfert, Meinersbur, fhahn, kbarton, hfinkel, bmahjour,
etiotto
Reviewed By: Meinersbur
Subscribers: hiraditya, llvm-commits
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D74382
2020-02-21 22:18:24 +00:00
Fangrui Song
8831256a14 [AArch64] Delete an unneeded dependency on Object after 1874dee5662603c9251228c71b66de72cec0c979
1874dee5662603c9251228c71b66de72cec0c979 moved CPU_(SUB_)TYPE logic to
BinaryFormat. Object is not directly referenced.
2020-02-21 14:02:54 -08:00
Fangrui Song
e27f4ab4c4 [AArch64][SVE] Fix -DBUILD_SHARED_LIBS=on builds after -D74808/1874dee5662603c9251228c71b66de72cec0c979 2020-02-21 13:59:47 -08:00
Sanjay Patel
8f7d151c8a [SelectionDAG] remove unused isFast() helper function; NFC
We want flag users to check individual fast-math flags,
not that all of them are set. This was also probably
not working as intended because NoFPExcept isn't always
set on non-strict nodes.
2020-02-21 16:58:10 -05:00
Fangrui Song
ff363980b9 [AArch64][SVE] Fix -Wimplicit-fallthrough after D73711 2020-02-21 13:46:33 -08:00
Alexander Shaposhnikov
398c9d3c6d [llvm-objcopy][MachO] Change the storage of sections
In this diff we change the storage of a section to unique_ptr.
This refactoring was factored out from D71647.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D74946
2020-02-21 13:30:52 -08:00
Cameron McInally
6327ef235a [AArch64][SVE] Add support for DestructiveBinary and DestructiveBinaryComm DestructiveInstTypes
Add support for DestructiveBinaryComm DestructiveInstType, as well as the lowering code to expand the new Pseudos into the final movprfx+instruction pairs.

Differential Revision: https://reviews.llvm.org/D73711
2020-02-21 15:19:54 -06:00
Jay Foad
30b747a019 AMDGPU/GlobalISel: Better code for one case of G_SHUFFLE_VECTOR on v2i16
Reviewers: arsenm

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74987
2020-02-21 21:16:39 +00:00
Sanjay Patel
d00cc088dd [VectorCombine] refactor to reduce duplicated code; NFC
This should be the last step in the current cleanup.
Follow-ups should resolve the TODO about cost calc
and enable the more general case where we extract
different elements.
2020-02-21 15:56:00 -05:00
LLVM GN Syncbot
4dd038c419 [gn build] Port 1874dee5662 2020-02-21 20:51:44 +00:00
Francis Visoiu Mistrih
e3adf0fc70 [macho][NFC] Extract all CPU_(SUB_)TYPE logic to BinaryFormat
This moves all the logic of converting LLVM Triples to
MachO::CPU_(SUB_)TYPE from the specific target (Target)AsmBackend to
more convenient functions in lib/BinaryFormat.

This also gets rid of the separate two X86AsmBackend classes.

The previous attempt was to add it to libObject, but that adds an
unnecessary dependency to libObject from all the targets.

Differential Revision: https://reviews.llvm.org/D74808
2020-02-21 12:43:29 -08:00
Craig Topper
604077c19d [X86] Add a new format type for instructions that represent named prefix bytes like data16 and rep. Use it to make a simpler version of isPrefix.
isPrefix was added to support the patches to align branches.
it relies on a switch over instruction names.

This moves those opcodes to a new format so the information is
tablegen and we can just check for a specific value in some bits
in TSFlags instead.

I've left the other function in place for now so that the
existing patches in phabricator will still work. I'll work with
the owner to get them migrated.
2020-02-21 12:34:59 -08:00
Reid Kleckner
9dbb4c30c4 [IR] Update BasicBlock::validateInstrOrdering comments, NFC
Pointed out by Jay Foad.
2020-02-21 12:33:16 -08:00
Francesco Petrogalli
147105c3eb [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics for SVE.
Summary: The patch covers both register/register and register/immediate addressing modes.

Reviewers: efriedma, andwar, sdesmalen

Reviewed By: sdesmalen

Subscribers: sdesmalen, tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74581
2020-02-21 20:22:25 +00:00
Sanjay Patel
dd89b4293b [VectorCombine] refactor cost calcs to reduce duplication; NFC
More cleanup is possible now, but we probably need to
resolve the TODO about the existing difference between
compares and binops.
2020-02-21 15:12:00 -05:00
Francesco Petrogalli
ab5eafb42f [llvm][aarch64] SVE addressing modes.
Summary:
Added register + immediate and register + register addressing modes for the following intrinsics:

1. Masked load and stores:
     * Sign and zero extended load and truncated stores.
     * No extension or truncation.
2. Masked non-temporal load and store.

Reviewers: andwar, efriedma

Subscribers: cameron.mcinally, sdesmalen, tschuett, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74254
2020-02-21 20:02:34 +00:00
Krzysztof Parzyszek
11344326c1 [Hexagon] Simplify intrinsic (vandvrt (vandqrt q b) m) -> q if possible
When each byte in b&m is non-zero, this conversion Q->V->Q is a no-op.
2020-02-21 13:56:04 -06:00
Cameron McInally
a8ae9715b8 [AArch64][SVE] Add backend support for splats of immediates
This patch adds backend support for splats of both Int and FP immediates.

Differential Revision: https://reviews.llvm.org/D74856
2020-02-21 13:21:47 -06:00
Fangrui Song
318004ba1e [ARM] Change ARMAttributeParser::Parse to use support::endianness and simplify 2020-02-21 11:05:33 -08:00
Matt Arsenault
3f406340ef AMDGPU/GlobalISel: Fix SALU mapping for v2s16 min/max
The legalizer helper functions are unusably awkward to perform the 3-5
part legalization. This needs to be widened, scalarized, lowered, and
we should avoid creating vector extends and truncates. Manually do all
of this and expand.
2020-02-21 14:02:16 -05:00
Matt Arsenault
13ad7999a2 AMDGPU: Move dot intrinsic patterns to instruction def
I tried to use some of the new tablegen features to avoid creating
different operand list permutations, but I still don't see a way to
programmatically build a source pattern dag.

Also add GlobalISel tests, which now all import successfully.

Some of the fneg fold tests are incorrect, which need to be fixed in a
future commit
2020-02-21 13:35:40 -05:00
Matt Arsenault
4dec0b4740 AMDGPU/GlobalISel: Select llvm.amdgcn.fdot2
I'm slighly worried about the generated checks, since they won't catch
incorrect modifiers being added at the end of the line.
2020-02-21 13:35:40 -05:00
Matt Arsenault
0c425ae0df AMDGPU/GlobalISel: Select VOP3P instructions
This only handles the basic cases. More work is needed to make better
use of op_sel.
2020-02-21 13:35:40 -05:00
Matt Arsenault
a73f91a16b AMDGPU/GlobalISel: Select G_SHUFFLE_VECTOR
G_SHUFFLE_VECTOR is legal since it theoretically may help match op_sel
for VOP3P instructions. Expand it in some other way in case it doesn't
fold into the use instructions.
2020-02-21 13:35:40 -05:00
Simon Pilgrim
bf8e285e39 [LoopVectorize][X86] Regenerate tests. NFCI. 2020-02-21 18:23:55 +00:00
jasonliu
de676f52d6 [XCOFF][AIX] Put undefined symbol name into StringTable when neccessary
Summary:
When we have a long name for the undefined symbol, we would hit this assertion:
Assertion failed: I != StringIndexMap.end() && "String is not in table!"
This patch addresses that.

Reviewed by: DiggerLin, daltenty

Differential Revision: https://reviews.llvm.org/D74924
2020-02-21 18:18:31 +00:00
Francesco Petrogalli
07c06734bb [llvm][CodeGen] DAG Combiner folds for vscale.
Summary:
This patch simplifies the DAGs generated when using the intrinsic `@llvm.vscale.*` as follows:

* Fold (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)).
* Canonicalize (sub X, (vscale * C)) to (add X,  (vscale * -C)).
* Fold (mul (vscale * C0), C1) to (vscale * (C0 * C1)).
* Fold (shl (vscale * C0), C1) to (vscale * (C0 << C1)).

The test `sve-gep-ll` have been updated to reflect the folding introduced by this patch.

Reviewers: efriedma, sdesmalen, andwar, rengolin

Reviewed By: sdesmalen

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74782
2020-02-21 18:03:12 +00:00
Nikita Popov
01133bb6c1 [InstCombine] Improve simplify demanded bits worklist management
This fixes a small mistake from D72944: The worklist add should
happen before assigning the new operand, not after.

In case an actual replacement happens, the old operand needs to
be added for DCE. If no actual replacement happens, then old/new
are the same, so it doesn't matter.

This drops one iteration from the annotated test case.
2020-02-21 18:51:41 +01:00
Hiroshi Yamauchi
e2050248f6 [BFI] Fix missed BFI updates in MachineSink.
Summary:
This prevents BFI queries on new blocks (from
MachineSinking::GetAllSortedSuccessors) and fixes a bunch of assert failures
under -check-bfi-unknown-block-queries=true.

Reviewers: davidxl

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74511
2020-02-21 09:50:54 -08:00
Fangrui Song
a6c30bdac4 [Clang interpreter] Rename Block.{h,cpp} to InterpBlock.{h,cpp}
The Blocks runtime provide a header named Block.h.
It is generally preferable to avoid name collision with system headers
(reducing reliance on -isystem order, more friendly when navigating files in
an editor, etc).

Reviewed By: gribozavr2

Differential Revision: https://reviews.llvm.org/D74934
2020-02-21 09:47:28 -08:00