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Commit Graph

11196 Commits

Author SHA1 Message Date
Jim Grosbach
bba77cca02 ARM mode encoding information for CLZ, RBIT, REV*, and PKH*.
llvm-svn: 117165
2010-10-22 22:12:16 +00:00
Jim Grosbach
172f52fb3d Remove duplicate test.
llvm-svn: 117158
2010-10-22 22:04:28 +00:00
Jim Grosbach
3cb3f83374 tidy up.
llvm-svn: 117157
2010-10-22 22:01:56 +00:00
Jim Grosbach
4366bb4852 FileCheck-ize a few tests.
llvm-svn: 117156
2010-10-22 21:55:03 +00:00
Bob Wilson
0290dbe7d4 Teach instcombine to set the alignment arguments for NEON load/store intrinsics.
llvm-svn: 117154
2010-10-22 21:41:48 +00:00
Owen Anderson
8c38a57413 Add tests for the correct encoding of NEON vmls.
llvm-svn: 117145
2010-10-22 20:31:24 +00:00
Owen Anderson
424434414e Add correct NEON encodings for vqdmlal.
llvm-svn: 117134
2010-10-22 19:35:48 +00:00
Jim Grosbach
10195e9b73 Add the encoding information for the rest of the ARM mode multiply instructions.
llvm-svn: 117133
2010-10-22 19:15:30 +00:00
Owen Anderson
2bbdc62e17 Provide correct encodings for NEON vmlal.
llvm-svn: 117131
2010-10-22 19:05:25 +00:00
Owen Anderson
ada2b33321 Provide correct NEON encodings for vmla.
llvm-svn: 117126
2010-10-22 18:54:37 +00:00
Stuart Hastings
772bf86028 Temporarily revert r117079; it broke a tester. Radar 6635085.
llvm-svn: 117122
2010-10-22 18:44:22 +00:00
Jim Grosbach
ca2897a0ca More ARM multiply instuction binary encodings.
llvm-svn: 117121
2010-10-22 18:35:16 +00:00
Owen Anderson
399ec622e4 Add testscases for encoding of NEON vdqmull.
llvm-svn: 117115
2010-10-22 17:57:37 +00:00
Jim Grosbach
0ae6bf8095 More ARM multiply instruction encoding information.
llvm-svn: 117108
2010-10-22 17:16:17 +00:00
NAKAMURA Takumi
00eaed4fe8 test/Makefile: Force lit -j1 on Cygwin.
lit -jN causes crash on Cygwin's python.

llvm-svn: 117093
2010-10-22 09:40:37 +00:00
Andrew Trick
b9e8700beb Reverting r117031 to cleanup valgrind errors.
It doesn't look like anything is wrong with the checkin,
but the new test cases expose a mem bug in AsmParser.

llvm-svn: 117087
2010-10-22 03:58:29 +00:00
Sean Callanan
9a40554de4 Fixed handling of immediate operand sizes, which
weren't properly reflecting the OperandSize attribute
of the instruction leading to improper decoding of
certain instructions with the 66H prefix.  Also added
a test case for this.

llvm-svn: 117084
2010-10-22 01:24:11 +00:00
Stuart Hastings
c6b2d77375 Test case for r117075. Radar 6635085.
llvm-svn: 117079
2010-10-21 22:43:32 +00:00
Owen Anderson
bba3b2050e Add tests for NEON encoding of vmull.
llvm-svn: 117077
2010-10-21 22:19:53 +00:00
Jim Grosbach
7c42142b71 ARM binary encodings for MVN variants.
llvm-svn: 117076
2010-10-21 22:19:32 +00:00
Owen Anderson
653fc9304a Add tests for NEON encoding of vqdmulh and vqrdmulh.
llvm-svn: 117074
2010-10-21 22:05:33 +00:00
Jim Grosbach
cb41e97b5c ARM Binary encoding information for BFC/BFI instructions.
llvm-svn: 117072
2010-10-21 22:03:21 +00:00
Owen Anderson
2c25ce7af1 Add tests for NEON vmul encoding.
llvm-svn: 117069
2010-10-21 21:51:58 +00:00
Owen Anderson
b0bddd3282 Rename this test to better reflect its contents.
llvm-svn: 117067
2010-10-21 21:40:15 +00:00
Owen Anderson
77c5078d4a Add tests for NEON encodings of vaddhn and vraddhn.
llvm-svn: 117064
2010-10-21 20:56:57 +00:00
Owen Anderson
ba6ee305cf Add tests for NEON encodings of vqadd, which was already correctly encoded.
llvm-svn: 117059
2010-10-21 20:42:04 +00:00
Owen Anderson
51a6bc3b27 Add correct NEON encodings for vhadd and vrhadd.
llvm-svn: 117047
2010-10-21 18:55:04 +00:00
Owen Anderson
dce283c7db Add correct encodings for NEON vaddw.s* and vaddw.u*.
llvm-svn: 117040
2010-10-21 18:20:25 +00:00
Owen Anderson
7d90c72edf Provide correct NEON encodings for vaddl.u* and vaddl.s*.
llvm-svn: 117039
2010-10-21 18:09:17 +00:00
Rafael Espindola
69c973fbfd Do not recurse into symbol refs that have a variant kind. This prevents us
from losing the variant when producing a relocation on an alias.

llvm-svn: 117037
2010-10-21 18:00:20 +00:00
Kevin Enderby
c63105a064 More tweaks to X86 instructions to allow the 'w' suffix in places it makes
sense, when the instruction takes the 16-bit ax register or m16 memory
location.  These changes to llvm-mc matches what the darwin assembler allows
for these instructions.  Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).

llvm-svn: 117031
2010-10-21 17:16:46 +00:00
Bill Wendling
8b2c8a5856 Fix whitespace.
llvm-svn: 117002
2010-10-21 06:25:08 +00:00
Wesley Peck
d646a12f25 Recommit 116986 with capitalization typo fixed.
llvm-svn: 116993
2010-10-21 03:57:26 +00:00
Andrew Trick
4a3b819c1f putback r116983 and fix simple-fp-encoding.ll tests
llvm-svn: 116992
2010-10-21 03:40:16 +00:00
Wesley Peck
3478e641b9 Reverting the commit 116986. It was breaking the build on llvm-x86_64-linux though it
compiles on OS X. I'll ensure that it builds on a linux machine before committing
again.

llvm-svn: 116991
2010-10-21 03:34:22 +00:00
Owen Anderson
7da515c665 Revert r116983, which is breaking all the buildbots.
llvm-svn: 116987
2010-10-21 03:11:16 +00:00
Wesley Peck
c50372298d Major update of the MicroBlaze backend. The new features are:
1. A delay slot filler that searches for valid instructions
       to fill the delay slot with. Previously NOPs would always
       be inserted into delay slots.
    2. Support for MC based instruction printer added.
    3. Support for MC based machine code generation and ELF
       file generation. ELF file generation does not yet
       completely work as much of the ELF support infrastructure
       is still x86/x86-64 specific.
    4. General clean up of the MBlaze backend code. Much of the
       tablegen code has been cleanup and simplified.

Bug Fixes:
    1. Removed duplicate periods from subtarget feature descriptions.
    2. Many of the instructions had bad machine code information
       in the tablegen files. Much of this has been fixed.

llvm-svn: 116986
2010-10-21 03:09:55 +00:00
Evan Cheng
0b9eaaf45d Add missing scheduling itineraries for transfers between core registers and VFP registers.
llvm-svn: 116983
2010-10-21 01:12:00 +00:00
Owen Anderson
a685f8e90a Implement correct encodings for NEON vadd, both integer and floating point.
llvm-svn: 116981
2010-10-21 00:48:00 +00:00
Bill Wendling
c7ef66fcf2 Add encoding for moving a value between two ARM core registers and a doublework
extension register.

llvm-svn: 116970
2010-10-20 23:37:40 +00:00
Bill Wendling
0f96ff63b3 Add encodings for movement between ARM core registers and single-precision
registers.

llvm-svn: 116961
2010-10-20 22:44:54 +00:00
Dan Gohman
afaaf2f56b Add some comments.
llvm-svn: 116957
2010-10-20 22:04:02 +00:00
Evan Cheng
9a06e4c7c8 More accurate estimate / tracking of register pressure.
- Initial register pressure in the loop should be all the live defs into the
  loop. Not just those from loop preheader which is often empty.
- When an instruction is hoisted, update register pressure from loop preheader
  to the original BB.
- Treat only use of a virtual register as kill since the code is still SSA.

llvm-svn: 116956
2010-10-20 22:03:58 +00:00
Dale Johannesen
a324c8c6bd Fix crash introduced in 116852. 8573915.
llvm-svn: 116955
2010-10-20 22:03:37 +00:00
Jason W Kim
3dc75181ae Cut unneeded global variable.
llvm-svn: 116953
2010-10-20 22:01:39 +00:00
Rafael Espindola
0a50bbaee1 Handle _GLOBAL_OFFSET_TABLE_ correctly.
llvm-svn: 116932
2010-10-20 16:46:08 +00:00
Dale Johannesen
ee87cbe4e9 Enable using vdup for vector constants which are splat of
integers by default, and remove the controlling flag, now
that LICM will hoist such vdup's.  8003375.

llvm-svn: 116852
2010-10-19 20:00:17 +00:00
Evan Cheng
1c8dafd12a Re-enable register pressure aware machine licm with fixes. Hoist() may have
erased the instruction during LICM so UpdateRegPressureAfter() should not
reference it afterwards.

llvm-svn: 116845
2010-10-19 18:58:51 +00:00
Jason W Kim
ccbc75257a Fixing r116753 r116756 r116777
The failures in r116753 r116756 were caused by a python issue -
Python likes to append 'L' suffix to stringified numbers if the number
is larger than a machine int. Unfortunately, this causes a divergence of
behavior between 32 and 64 bit python versions.

I re-crafted elf-dump/common_dump to take care of these issues by:

1. always printing 0x (makes for easy sed/regex)
2. always print fixed length (exactly 2 + numBits/4 digits long)
   by mod ((2^numBits) - 1)
3. left-padded with '0'

There is a residual common routine that is also used by
macho-dump (dataToHex) , so I left the 'section_data' test values alone.

llvm-svn: 116823
2010-10-19 17:39:10 +00:00
Daniel Dunbar
6ff550c84d Revert r116781 "- Add a hook for target to determine whether an instruction def
is", which breaks some nightly tests.

llvm-svn: 116816
2010-10-19 17:14:24 +00:00